changeset 61a0b02aa800 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=61a0b02aa800
description:
cpu: Remove all notion that we know when the cpu is misspeculating.
We have no way of knowing if a CPU model is on the wrong path with
our
changeset 3c42be107634 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3c42be107634
description:
arm: always set the IsFirstMicroop flag
While the IsFirstMicroop flag exists it was only occasionally used in
the ARM
instructions that gem5 microOps and
changeset aef704eaedd2 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=aef704eaedd2
description:
sim: Clean up InstRecord
Track memory size and flags as well as add some comments and consts.
diffstat:
src/cpu/base_dyn_inst.hh| 10 +-
changeset fae54a666162 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=fae54a666162
description:
cpu: Put all CPU instruction tracers in a single file
diffstat:
src/arch/arm/ArmNativeTrace.py | 2 +-
src/arch/sparc/SparcNativeTrace.py | 2 +-
changeset c3fd4c020e49 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c3fd4c020e49
description:
cpu: remove legion tracer
If someone wants to debug with legion again they can restore the
code from the repository, but no need to have it hang around
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing passed.
* build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing
passed.
*
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
passed.
*