Jason Lowe-Power has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/71758?usp=email )
Change subject: misc: Add release notes for v23.0
......................................................................
misc: Add release notes for v23.0
Change-Id: I003f170339e69a445586fe0486a1db595a10683f
Signed-off-by: Jason Lowe-Power <ja...@lowepower.com>
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+# Version 23.0
+
+This release has approximately 500 contributions from 50 unique
contributors.
+This release incorporates ...
+
+The big news in this release is gem5's migration from Gerrit (at
gem5.googlesource.com) to GitHub (at github.com/gem5/).
+From now on, please issue *pull requests* to GitHub instead of change
requests on Gerrit.
+Gerrit will be available in read-only mode to access prior conversations.
+
+## Significant API and user-facing changes
+
+### Major renaming of CPU stats
+
+The CPU stats have been renamed.
+See <https://gem5.atlassian.net/browse/GEM5-1304> for details.
+
+Now, each stage (fetch, execute, commit) have their own stat group.
+Stats that are shared between the different CPU model (O3, Minor, Simple)
now have the exact same names.
+
+**Important:** Some stat names were misleading before this change.
+With this change, stats with the same names between different CPU models
have the same meaning.
+
+### `fs.py` and `se.py` deprecated
+
+These scripts have not been well supported for many gem5 releases.
+With gem5 23.0, we have officially deprecated these scripts.
+They have been moved into the `deprecated` directory, **but they will be
removed in a future release.**
+As a replacement, we strongly suggest using the gem5 standard library.
+
+### Other API changes
+
+- Removed deprecated namespaces. Namespace names were updated a couple of
releases ago. This release removes the old names.
+- *Use `MemberEventWrapper` in favor of `EventWrapper` for instance member
functions
+- Add an extension mechanism to `Packet` and `Request`
+- Set x86 CPU vendor string to "HygoneGenuine" to better support GLIBC
+
+## New features and improvements
+
+### Large improvements to gem5 resources and gem5 vision website
+
+We now have a new web portal for the gem5 resources:
<https://resources.gem5.org>
+
+This web portal will allow users to browse the resources available (e.g.,
disk images, kernels, workloads, binaries, simpoints, etc.) to use
out-of-the-box with the gem5 standard library.
+You can filter based on architecture, resource type, and compatible gem5
versions.
+
+For each resource, there are examples of how to use the resource and
pointers to examples using the resource in the gem5 codebase.
+
+More information can be found on gem5's website:
<https://www.gem5.org/documentation/general_docs/gem5_resources/>
+
+For instance, you can now add the following code to your config script to
run the "ubuntu-boot" workload.
+
+```python
+board.set_workload(Workload("x86-ubuntu-18.04-boot"))
+```
+
+We will be expanding gem5 resources with more workloads over the course of
the next release.
+If you would like to contribute to gem5 resources by uploading your own
workloads, disk images, etc., please create and issue on GitHub.
+
+In addition to the new gem5 Resources web portal, the gem5 Resources API
has been significantly updated and improved.
+There are now much simpler functions for getting resources such as
`obtain_resource(<name>)` that will download the resource by name and
return a reference that can be used (e.g., as a binary in `set_se_workload`
function on the board).
+We also added the `set_workload` function that is a function of the
`Board` that allows you to use a `Workload` from gem5 Resources with a
board.
+This function will set up the workload including the disk image, kernel,
and command line for full system workloads.
+Additionally, we have added support for SimPoints and checkpoints as
workloads.
+
+### Arm v9 improvements
+
+Many improvements to Arm so that gem5 is mostly compatible with Armv9.2.
+
+Support for some Arm SME (matrix extensions) has been added and more
support for Arm SVE is included this release.
+
+### Add support for DRAMSys
+
+gem5 can now use DRAMSys <https://github.com/tukl-msd/DRAMSys> as a DRAM
backend.
+
+### Standard library improvements and new components
+
+- Add MESI_Three_Level component.
+- The gem5 standard library now supports both SimPoint and LoopPoint
resources.
+- gem5 also now supports ELFies and LoopPoint analysis output from Sniper.
+- DRAMSys is supported in the stdlib.
+
+## Bugfixes and other small improvements
+
+- Lots of RISC-V bugfixes and improvements. Applications should be more
stable now.
+- Fully implement RISC-V zbkb, Zk extension
+- Implement rv32 zicsr.
+- Remove deprecated python libraries
+- Add a DDR5 model
+- Add AMD GPU MI200/gfx90a support
+- Default build no longer "duplicates sources" in build/ which improves
support for some IDEs and code analysis. If you still need to duplicate
sources you can use the `--duplicate-sources` option to `scons`
+- can use `--debug-activate=<object name>` to enable debug trace for only
a single SimObject (the opposite of `--debug-ignore`). See `--debug-help`
for more information.
+- Add support to exit the simulation loop based on Arm-PMU events.
+- gem5 now support Python 3.11
+- Add the idea of a CpuCluster to gem5
+
+
# Version 22.1.0.0
This release has 500 contributions from 48 unique contributors and marks
our second major release of 2022.
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Gerrit-MessageType: newchange
Gerrit-Project: public/gem5
Gerrit-Branch: release-staging-v23-0
Gerrit-Change-Id: I003f170339e69a445586fe0486a1db595a10683f
Gerrit-Change-Number: 71758
Gerrit-PatchSet: 1
Gerrit-Owner: Jason Lowe-Power <power...@gmail.com>
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