changeset 50eceddc2286 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=50eceddc2286 description: hsail: add popcount type and generate popcount instructions
diffstat: src/arch/hsail/Brig_new.hpp | 2 ++ src/arch/hsail/gen.py | 7 +++++-- src/arch/hsail/insts/decl.hh | 20 ++++++++++++++++++++ 3 files changed, 27 insertions(+), 2 deletions(-) diffs (80 lines): diff -r c33d3607683c -r 50eceddc2286 src/arch/hsail/Brig_new.hpp --- a/src/arch/hsail/Brig_new.hpp Fri Dec 02 18:01:52 2016 -0500 +++ b/src/arch/hsail/Brig_new.hpp Fri Dec 02 18:01:55 2016 -0500 @@ -1455,6 +1455,8 @@ uint16_t reserved; //.defValue=0 }; +typedef BrigInstSourceType BrigInstPopcount; + struct BrigOperandAddress { BrigBase base; BrigCodeOffset32_t symbol; //.wtype=ItemRef<DirectiveVariable> diff -r c33d3607683c -r 50eceddc2286 src/arch/hsail/gen.py --- a/src/arch/hsail/gen.py Fri Dec 02 18:01:52 2016 -0500 +++ b/src/arch/hsail/gen.py Fri Dec 02 18:01:55 2016 -0500 @@ -211,6 +211,7 @@ 'ExtractInsertInst': header_template_1dt, 'CmpInst': header_template_2dt, 'CvtInst': header_template_2dt, + 'PopcountInst': header_template_2dt, 'LdInst': '', 'StInst': '', 'SpecialInstNoSrc': header_template_nodt, @@ -426,6 +427,7 @@ 'ClassInst': exec_template_1dt_2src_1dest, 'CmpInst': exec_template_2dt, 'CvtInst': exec_template_2dt, + 'PopcountInst': exec_template_2dt, 'LdInst': '', 'StInst': '', 'SpecialInstNoSrc': exec_template_nodt_nosrc, @@ -555,7 +557,7 @@ dest_is_src_flag = str(dest_is_src).lower() # for C++ if base_class in ['ShiftInst']: expr = re.sub(r'\bsrc(\d)\b', r'src_val\1', expr) - elif base_class in ['ArithInst', 'CmpInst', 'CvtInst']: + elif base_class in ['ArithInst', 'CmpInst', 'CvtInst', 'PopcountInst']: expr = re.sub(r'\bsrc(\d)\b', r'src_val[\1]', expr) else: expr = re.sub(r'\bsrc(\d)\b', r'src_val\1', expr) @@ -674,7 +676,8 @@ gen('Bitselect', bit_types, '(src1 & src0) | (src2 & ~src0)') gen('Firstbit',bit_types, 'firstbit(src0)') -gen('Popcount', ('B32', 'B64'), '__builtin_popcount(src0)') +gen('Popcount', ('U32',), '__builtin_popcount(src0)', 'PopcountInst', \ + ('sourceType', ('B32', 'B64'))) gen('Shl', arith_int_types, 'src0 << (unsigned)src1', 'ShiftInst') gen('Shr', arith_int_types, 'src0 >> (unsigned)src1', 'ShiftInst') diff -r c33d3607683c -r 50eceddc2286 src/arch/hsail/insts/decl.hh --- a/src/arch/hsail/insts/decl.hh Fri Dec 02 18:01:52 2016 -0500 +++ b/src/arch/hsail/insts/decl.hh Fri Dec 02 18:01:55 2016 -0500 @@ -725,6 +725,26 @@ } }; + template<typename DestDataType, typename SrcDataType> + class PopcountInst : + public CommonInstBase<typename DestDataType::OperandType, + typename SrcDataType::OperandType, 1> + { + public: + std::string opcode_suffix() + { + return csprintf("_%s_%s", DestDataType::label, SrcDataType::label); + } + + PopcountInst(const Brig::BrigInstBase *ib, const BrigObject *obj, + const char *_opcode) + : CommonInstBase<typename DestDataType::OperandType, + typename SrcDataType::OperandType, + 1>(ib, obj, _opcode) + { + } + }; + class SpecialInstNoSrcNoDest : public HsailGPUStaticInst { public: _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev