* build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
FAILED!
* build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
FAILED!
* build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp
FAILED!
*
changeset 570b44fe6e04 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=570b44fe6e04
description:
Atomic: Remove the physmem_port and access memory directly
This patch removes the physmem_port from the Atomic CPU and instead
uses the system pointer to
On March 26, 2012, 3:23 a.m., Andreas Hansson wrote:
Is it not possible to use the Ruby sequencers for all the connections to
the DMA devices, i.e. config, pio and dma?
Nilay Vaish wrote:
I think Ruby, as of now, cannot allow pio accesses to flow through it. I
have talked to Brad
On March 26, 2012, 3:23 a.m., Andreas Hansson wrote:
Is it not possible to use the Ruby sequencers for all the connections to
the DMA devices, i.e. config, pio and dma?
Nilay Vaish wrote:
I think Ruby, as of now, cannot allow pio accesses to flow through it. I
have talked to Brad
On April 2, 2012, 9:07 a.m., Ali Saidi wrote:
src/mem/physical.cc, line 468
http://reviews.gem5.org/r/1113/diff/2/?file=25181#file25181line468
might want to consider caching the latest start/end here to avoid the
constant lookup.
Basic caching is added and a new diff is
On April 1, 2012, 11:25 a.m., Andreas Hansson wrote:
No comments? It's not very controversial, but some feedback would be much
appreciated. Thanks.
Given that this is only used to get all the memories in the system, can we
agree on this without any name changes? Nate, any suggestions, or
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Ship it!
Ship It!
- Ali Saidi
On April 2, 2012, 2:34 p.m., Andreas
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Ship it!
Seems fine to me.
src/mem/bus.cc
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Ship it!
Ship It!
- Brad Beckmann
On March 24, 2012, 1:27 p.m.,
I propose that Nilay checks in the current patch so that all of us Ruby user
can continue to use gem5 in x86 FS mode. Supporting config and pio requests in
Ruby will take some time and ruby_fs hasn't been working for several weeks now.
Brad
-Original Message-
From:
I think you need to create a SlavePort like the EtherLink device has.
Again, this code has likely undergone a lot of bitrot. You're just
going to have to work on it a while to get it going.
Nate
On Tue, Apr 3, 2012 at 1:00 PM, Anirudh Sivaraman sk.anir...@gmail.com wrote:
I tried hooking up
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(Updated April 3, 2012, 4:21 p.m.)
Review request for Default.
Description
On April 3, 2012, 3:29 p.m., Brad Beckmann wrote:
Ship It!
Andreas Hansson wrote:
I understand the urgency, and if we are indeed going with this fix for
now, then I'd suggest we create a list of dma ports rather than a list of dma
devices. That is, do not add the ide device to a
Hey guys,
I've tried searching around, but I'm having trouble finding any help on
this. Anyone have insights or pointers? Is checkpoint restore supposed to
be working?
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joel@vein:~/research/gem5/gem5-latest$ ./build/X86/gem5.debug
Joel, you might know that system being restored from a check point starts
with an atomic cpu by default. I think the problem you are facing is in
initializing a timing CPU. IIRC, the interrupt controller is moved from
atomic CPU to timing CPU after X number of ticks. You might want to try
Hmm...timing cpu restoring a checkpoint created by the atomic cpu used to work?
What changed with regards to interrupts broke it?
It would be great if we could maintain atomic - timing checkpoint capability.
It is really useful to use the atomic cpu to fast-forward to an interesting
point in
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Just a quick pass since I didn't want to dig too much into the actual
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Review request for Default and Brad Beckmann.
Description
---
Changeset
What I wrote was more of a hypothesis that might explain / help debug the
problem Joel is facing. I might be incorrect, though I faintly recall
facing some such problem my self.
I am more in favor of moving towards storing only architectural state in
the checkpoint so that we can restore from
I haven't looked at the code in depth, but I think locked describes
whether or not you're in the middle of a locked (roughly atomic)
operation. Not keeping track of that would be bad, although transferring
that to timing mode would be tricky. On the other hand, timing mode
doesn't implement locked
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