[gem5-dev] Change in gem5/gem5[stable]: scons: Fix gem5 v20.1.0.3 failed to build with scons 4.1.0

2021-02-18 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41594 )



Change subject: scons: Fix gem5 v20.1.0.3 failed to build with scons 4.1.0
..

scons: Fix gem5 v20.1.0.3 failed to build with scons 4.1.0

SCons failed to find m5 module while loading m5.util.terminal
from site_scons/gem5_scons/util.py.

Change-Id: I3817f39ebc3021fb6fc89bcd09a96999f8ca2841
Signed-off-by: Hoa Nguyen 
---
M SConstruct
M site_scons/site_tools/default.py
2 files changed, 1 insertion(+), 7 deletions(-)



diff --git a/SConstruct b/SConstruct
index 0d8159b..bb038b8 100755
--- a/SConstruct
+++ b/SConstruct
@@ -139,7 +139,7 @@
 #
 

-main = Environment()
+main = Environment(tools=['default', 'git'])

 from gem5_scons.util import get_termcap
 termcap = get_termcap()
diff --git a/site_scons/site_tools/default.py  
b/site_scons/site_tools/default.py

index 1965a20..88a6932 100644
--- a/site_scons/site_tools/default.py
+++ b/site_scons/site_tools/default.py
@@ -78,15 +78,9 @@
 # as well
 env.AppendENVPath('PYTHONPATH', extra_python_paths)

-gem5_tool_list = [
-'git',
-]
-
 def generate(env):
 common_config(env)
 SCons.Tool.default.generate(env)
-for tool in gem5_tool_list:
-SCons.Tool.Tool(tool)(env)

 def exists(env):
 return 1

--
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Gerrit-Branch: stable
Gerrit-Change-Id: I3817f39ebc3021fb6fc89bcd09a96999f8ca2841
Gerrit-Change-Number: 41594
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen 
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[gem5-dev] Change in gem5/gem5[develop]: scons: Use SCons' built in CXXVERSION instead of detecting our own.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41596 )



Change subject: scons: Use SCons' built in CXXVERSION instead of detecting  
our own.

..

scons: Use SCons' built in CXXVERSION instead of detecting our own.

It's not guaranteed that every compiler will set CXXVERSION, but both
gcc and clang do, and for any check of CXXVERSION to be meaningful, we
have to first check which compiler we're talking about.

Change-Id: Icd15e12832920fec6fa8634bc0fde16cc48e3f41
---
M SConstruct
M src/systemc/dt/int/SConscript
2 files changed, 5 insertions(+), 9 deletions(-)



diff --git a/SConstruct b/SConstruct
index 4752d9e..f2fbafb 100755
--- a/SConstruct
+++ b/SConstruct
@@ -345,12 +345,9 @@
   "src/SConscript to support that compiler.")))

 if main['GCC']:
-gcc_version = readCommand([main['CXX'], '-dumpversion'],  
exception=False)

-if compareVersions(gcc_version, "5") < 0:
+if compareVersions(main['CXXVERSION'], "5") < 0:
 error('gcc version 5 or newer required.\n'
-  'Installed version:', gcc_version)
-
-main['GCC_VERSION'] = gcc_version
+  'Installed version:', main['CXXVERSION'])

 # If not disabled, set the Link-Time Optimization (LTO) flags.
 if not GetOption('no_lto'):
@@ -362,10 +359,9 @@
   '-fno-builtin-realloc', '-fno-builtin-free'])

 elif main['CLANG']:
-clang_version = readCommand([main['CXX'], '-dumpversion'],  
exception=False)

-if compareVersions(clang_version, "3.9") < 0:
+if compareVersions(main['CXXVERSION'], "3.9") < 0:
 error('clang version 3.9 or newer required.\n'
-  'Installed version:', clang_version)
+  'Installed version:', main['CXXVERSION'])

 # If not disabled, set the Link-Time Optimization (LTO) flags.
 if not GetOption('no_lto'):
diff --git a/src/systemc/dt/int/SConscript b/src/systemc/dt/int/SConscript
index 92c0f07..b052f04 100644
--- a/src/systemc/dt/int/SConscript
+++ b/src/systemc/dt/int/SConscript
@@ -28,7 +28,7 @@
 from m5.util import compareVersions

 if env['USE_SYSTEMC']:
-if main['GCC'] and compareVersions(main['GCC_VERSION'], '10.0') >= 0:
+if main['GCC'] and compareVersions(main['CXXVERSION'], '10.0') >= 0:
 disable_false_positives = {
 "CCFLAGS": [ "-Wno-array-bounds",
  "-Wno-stringop-overflow" ]

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icd15e12832920fec6fa8634bc0fde16cc48e3f41
Gerrit-Change-Number: 41596
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: misc: Remove unused params() definitions

2021-02-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41613 )



Change subject: misc: Remove unused params() definitions
..

misc: Remove unused params() definitions

Lots of times the params() helper has been defined but not used

Change-Id: Id71829aca71341d46964d8f071099342b946b62f
Signed-off-by: Giacomo Travaglini 
---
M src/arch/arm/fastmodel/iris/interrupts.hh
M src/arch/arm/freebsd/se_workload.hh
M src/arch/arm/interrupts.hh
M src/arch/arm/linux/se_workload.hh
M src/arch/arm/nativetrace.hh
M src/arch/arm/se_workload.hh
M src/arch/arm/tlb.hh
M src/arch/generic/interrupts.hh
M src/arch/mips/interrupts.hh
M src/arch/mips/isa.hh
M src/arch/mips/linux/se_workload.hh
M src/arch/mips/se_workload.hh
M src/arch/power/interrupts.hh
M src/arch/power/isa.hh
M src/arch/power/linux/se_workload.hh
M src/arch/power/se_workload.hh
M src/arch/riscv/interrupts.hh
M src/arch/riscv/isa.hh
M src/arch/riscv/linux/se_workload.hh
M src/arch/riscv/pagetable_walker.hh
M src/arch/riscv/se_workload.hh
M src/arch/sparc/interrupts.hh
M src/arch/sparc/isa.hh
M src/arch/sparc/linux/se_workload.hh
M src/arch/x86/fs_workload.hh
M src/arch/x86/interrupts.hh
M src/arch/x86/isa.hh
M src/arch/x86/linux/se_workload.hh
M src/arch/x86/pagetable_walker.hh
M src/dev/arm/gic_v2.hh
M src/dev/arm/pl111.hh
M src/dev/arm/realview.hh
M src/dev/arm/rtc_pl031.hh
M src/dev/arm/timer_a9global.hh
M src/dev/arm/timer_sp804.hh
M src/dev/arm/vgic.hh
M src/dev/baddev.hh
M src/dev/io_device.hh
M src/dev/mips/malta_cchip.hh
M src/dev/net/dist_etherlink.hh
M src/dev/net/etherbus.hh
M src/dev/net/etherdevice.hh
M src/dev/net/etherlink.hh
M src/dev/net/etherswitch.hh
M src/dev/net/ethertap.hh
M src/dev/serial/uart.hh
M src/dev/serial/uart8250.hh
M src/dev/sparc/dtod.hh
M src/dev/sparc/mm_disk.hh
M src/dev/x86/i8042.hh
M src/dev/x86/i82094aa.hh
M src/dev/x86/i8237.hh
M src/dev/x86/i8254.hh
M src/dev/x86/i8259.hh
M src/dev/x86/south_bridge.hh
M src/dev/x86/speaker.hh
M src/gpu-compute/lds_state.hh
M src/mem/comm_monitor.hh
M src/mem/mem_checker_monitor.hh
M src/mem/qos/policy_pf.hh
M src/mem/ruby/network/fault_model/FaultModel.hh
M src/sim/clocked_object.hh
M src/sim/se_workload.hh
63 files changed, 68 insertions(+), 69 deletions(-)



diff --git a/src/arch/arm/fastmodel/iris/interrupts.hh  
b/src/arch/arm/fastmodel/iris/interrupts.hh

index 344d9c5..c73a628 100644
--- a/src/arch/arm/fastmodel/iris/interrupts.hh
+++ b/src/arch/arm/fastmodel/iris/interrupts.hh
@@ -38,7 +38,7 @@
 class Interrupts : public BaseInterrupts
 {
   public:
-PARAMS(IrisInterrupts);
+using Params = IrisInterruptsParams;

 Interrupts(const Params ) : BaseInterrupts(p) {}

diff --git a/src/arch/arm/freebsd/se_workload.hh  
b/src/arch/arm/freebsd/se_workload.hh

index 82d3659..a228ee0 100644
--- a/src/arch/arm/freebsd/se_workload.hh
+++ b/src/arch/arm/freebsd/se_workload.hh
@@ -46,7 +46,7 @@
 class EmuFreebsd : public SEWorkload
 {
   public:
-PARAMS(ArmEmuFreebsd);
+using Params = ArmEmuFreebsdParams;

 EmuFreebsd(const Params ) : SEWorkload(p) {}

diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh
index ce28879..aba39cd 100644
--- a/src/arch/arm/interrupts.hh
+++ b/src/arch/arm/interrupts.hh
@@ -73,8 +73,7 @@
 uint64_t intStatus;

   public:
-
-PARAMS(ArmInterrupts);
+using Params = ArmInterruptsParams;

 Interrupts(const Params ) : BaseInterrupts(p)
 {
diff --git a/src/arch/arm/linux/se_workload.hh  
b/src/arch/arm/linux/se_workload.hh

index 1473803..6156661 100644
--- a/src/arch/arm/linux/se_workload.hh
+++ b/src/arch/arm/linux/se_workload.hh
@@ -40,7 +40,8 @@
 class EmuLinux : public SEWorkload
 {
   public:
-PARAMS(ArmEmuLinux);
+using Params = ArmEmuLinuxParams;
+
 EmuLinux(const Params ) : SEWorkload(p) {}

 struct BaseSyscallABI {};
diff --git a/src/arch/arm/nativetrace.hh b/src/arch/arm/nativetrace.hh
index 84d835d..14ab303 100644
--- a/src/arch/arm/nativetrace.hh
+++ b/src/arch/arm/nativetrace.hh
@@ -96,7 +96,7 @@
 bool stopOnPCError;

   public:
-PARAMS(ArmNativeTrace);
+using Params = ArmNativeTraceParams;

 ArmNativeTrace(const Params ) :
 NativeTrace(p), stopOnPCError(p.stop_on_pc_error)
diff --git a/src/arch/arm/se_workload.hh b/src/arch/arm/se_workload.hh
index 8f6b639..70a85b0 100644
--- a/src/arch/arm/se_workload.hh
+++ b/src/arch/arm/se_workload.hh
@@ -38,7 +38,8 @@
 class SEWorkload : public ::SEWorkload
 {
   public:
-PARAMS(ArmSEWorkload);
+using Params = ArmSEWorkloadParams;
+
 SEWorkload(const Params ) : ::SEWorkload(p) {}

 ::Loader::Arch getArch() const override { return ::Loader::Arm64; }
diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh
index d71df7e..e06939e 100644
--- a/src/arch/arm/tlb.hh
+++ b/src/arch/arm/tlb.hh
@@ -204,7 +204,7 @@
 int rangeMRU; //On lookup, only move entries ahead when outside  
rangeMRU

[gem5-dev] Change in gem5/gem5[develop]: sim: Define PARAMS macro utility

2021-02-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39898 )


Change subject: sim: Define PARAMS macro utility
..

sim: Define PARAMS macro utility

To reduce code duplication and to ensure that the result of [1] will not
deteriorate, define a macro to be used in every descendant of SimObject
that needs its own params().

[1] 91d83cc8a12883f2d7493b37f50487cd7f03a9e6

Change-Id: I1a1a0dedf91ae228ea27b8ed324577ee3439ea68
Signed-off-by: Alexander Klimov 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39898
Reviewed-by: Daniel Carvalho 
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/sim/sim_object.hh
1 file changed, 36 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, but someone else must approve
  kokoro: Regressions pass



diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh
index a75f8dd..9bab952 100644
--- a/src/sim/sim_object.hh
+++ b/src/sim/sim_object.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 ARM Limited
+ * Copyright (c) 2015, 2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -117,6 +117,26 @@
  * If you don't have a constructor with that signature at all, then you  
must

  * implement the create method with that signature which will build your
  * object in some other way.
+ *
+ * A reference to the SimObjectParams will be returned via the params()
+ * API. It is quite common for a derived class (DerivSimObject) to access  
its
+ * derived parameters by downcasting the SimObjectParam to  
DerivSimObjectParams

+ *
+ * \code{.cpp}
+ * using Params = DerivSimObjectParams;
+ * const Params &
+ * params() const
+ * {
+ * return reinterpret_cast(_params);
+ * }
+ * \endcode
+ *
+ * We provide the PARAMS(..) macro as syntactic sugar to replace the code
+ * above with a much simpler:
+ *
+ * \code{.cpp}
+ * PARAMS(DerivSimObject);
+ * \endcode
  */
 class SimObject : public EventManager, public Serializable, public  
Drainable,

   public Stats::Group
@@ -314,6 +334,21 @@
 static SimObject *find(const char *name);
 };

+/* Add PARAMS(ClassName) to every descendant of SimObject that needs
+ * params.
+ *
+ * Strictly speaking, we need static_cast here, because the types are
+ * related by inheritance, but since the target type may be
+ * incomplete, the compiler does not know the relation.
+ */
+#define PARAMS(type) \
+using Params = type ## Params;   \
+const Params &   \
+params() const   \
+{\
+return reinterpret_cast(_params); \
+}
+
 /**
  * Base class to wrap object resolving functionality.
  *

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1a1a0dedf91ae228ea27b8ed324577ee3439ea68
Gerrit-Change-Number: 39898
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Boris Shingarov 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons,systemc: Drop the check for gcc version when building systemc.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41595 )



Change subject: scons,systemc: Drop the check for gcc version when building  
systemc.

..

scons,systemc: Drop the check for gcc version when building systemc.

The minimum version of gcc is 5, and the check would only fail if gcc
was older than that.

Change-Id: I20f4f42661baf415b7cbe80ec0ace4e427666348
---
M src/systemc/SConsopts
1 file changed, 1 insertion(+), 6 deletions(-)



diff --git a/src/systemc/SConsopts b/src/systemc/SConsopts
index 13636cd..4864944 100644
--- a/src/systemc/SConsopts
+++ b/src/systemc/SConsopts
@@ -30,12 +30,7 @@
 from gem5_scons import warning

 def use_systemc_check(env, warn=False):
-if ('GCC_VERSION' in env and
-compareVersions(env['GCC_VERSION'], '5.0') < 0):
-if warn:
-warning('Systemc may not work on gcc versions less than 5.0.')
-return False
-elif env['PLATFORM'] == 'darwin':
+if env['PLATFORM'] == 'darwin':
 if warn:
 warning('Warning: Systemc may not work on Mac OS.')
 return False

--
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Gerrit-Change-Id: I20f4f42661baf415b7cbe80ec0ace4e427666348
Gerrit-Change-Number: 41595
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Use std::abs() in traffic_gen.cc.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41597 )



Change subject: cpu: Use std::abs() in traffic_gen.cc.
..

cpu: Use std::abs() in traffic_gen.cc.

When building with clang with the --without-tcmalloc flag set, the
-fno-builtin flag is not used, and clang can then detect that the
integer version of abs(), apparently the C version, is being used on a
floating point value in traffic_gen.cc.

This change takes clang's suggestion to use std::abs instead, and also
includes a header file which will provide it.

Change-Id: Ic28ed7454b2ac00c89328d9d0314aed74e946643
---
M src/cpu/testers/traffic_gen/traffic_gen.cc
1 file changed, 3 insertions(+), 1 deletion(-)



diff --git a/src/cpu/testers/traffic_gen/traffic_gen.cc  
b/src/cpu/testers/traffic_gen/traffic_gen.cc

index 1ea4d5e..97b6e65 100644
--- a/src/cpu/testers/traffic_gen/traffic_gen.cc
+++ b/src/cpu/testers/traffic_gen/traffic_gen.cc
@@ -39,6 +39,7 @@
 #include 
 #include 

+#include 
 #include 
 #include 

@@ -331,9 +332,10 @@
 }

 // avoid comparing floating point numbers
-if (abs(sum - 1.0) > 0.001)
+if (std::abs(sum - 1.0) > 0.001) {
 fatal("%s has transition probability != 1 for state %d\n",
   name(), i);
+}
 }

 // close input file

--
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Gerrit-Change-Id: Ic28ed7454b2ac00c89328d9d0314aed74e946643
Gerrit-Change-Number: 41597
Gerrit-PatchSet: 1
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[gem5-dev] Change in gem5/gem5[develop]: python,scons: Move readCommand and compareVersions into site_scons.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41599 )



Change subject: python,scons: Move readCommand and compareVersions into  
site_scons.

..

python,scons: Move readCommand and compareVersions into site_scons.

These functions are only used by scons, so it makes sense to move them
to site_scons/gem5_scons/util.py.

Change-Id: If2b3995f208cb71adf3c59aac4eabe378c47f94f
---
M SConstruct
M ext/libelf/SConscript
M site_scons/gem5_scons/util.py
M site_scons/site_tools/git.py
M src/SConscript
M src/proto/SConsopts
M src/python/m5/util/__init__.py
M src/systemc/dt/int/SConscript
8 files changed, 64 insertions(+), 68 deletions(-)



diff --git a/SConstruct b/SConstruct
index adb7f0c..4308b72 100755
--- a/SConstruct
+++ b/SConstruct
@@ -90,8 +90,6 @@
 import SCons.Node
 import SCons.Node.FS

-from m5.util import compareVersions, readCommand
-

 
 #
@@ -131,6 +129,7 @@
 from gem5_scons import TempFileSpawn, EnvDefaults, MakeAction,  
MakeActionTool

 import gem5_scons
 from gem5_scons.builders import ConfigFile, AddLocalRPATH, SwitchingHeaders
+from gem5_scons.util import compareVersions, readCommand

 Export('MakeAction')

diff --git a/ext/libelf/SConscript b/ext/libelf/SConscript
index e2cc847..f3dbe6a 100644
--- a/ext/libelf/SConscript
+++ b/ext/libelf/SConscript
@@ -32,8 +32,6 @@

 Import('main')

-from m5.util import compareVersions
-
 elf_files = []
 def ElfFile(filename):
 elf_files.append(File(filename))
diff --git a/site_scons/gem5_scons/util.py b/site_scons/gem5_scons/util.py
index 1a196c2..b62cc01 100644
--- a/site_scons/gem5_scons/util.py
+++ b/site_scons/gem5_scons/util.py
@@ -38,6 +38,8 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+import itertools
+import re
 import sys

 import SCons.Script
@@ -50,3 +52,60 @@

 def get_termcap():
 return  
m5.util.terminal.get_termcap(SCons.Script.GetOption('use_colors'))

+
+def readCommand(cmd, **kwargs):
+"""
+run the command cmd, read the results and return them
+this is sorta like `cmd` in shell
+
+:param cmd: command to run with Popen
+:type cmd: string, list
+:returns: command stdout
+:rtype: string
+"""
+from subprocess import Popen, PIPE, STDOUT
+
+if isinstance(cmd, str):
+cmd = cmd.split()
+
+no_exception = 'exception' in kwargs
+exception = kwargs.pop('exception', None)
+
+kwargs.setdefault('shell', False)
+kwargs.setdefault('stdout', PIPE)
+kwargs.setdefault('stderr', STDOUT)
+kwargs.setdefault('close_fds', True)
+try:
+subp = Popen(cmd, **kwargs)
+except Exception as e:
+if no_exception:
+return -1, exception
+raise
+
+output = subp.communicate()[0].decode('utf-8')
+return output
+
+def compareVersions(v1, v2):
+"""helper function: compare arrays or strings of version numbers.
+E.g., compare_version((1,3,25), (1,4,1)')
+returns -1, 0, 1 if v1 is <, ==, > v2
+"""
+def make_version_list(v):
+if isinstance(v, (list,tuple)):
+return v
+elif isinstance(v, str):
+return list(map(lambda x: int(re.match('\d+', x).group()),
+v.split('.')))
+else:
+raise TypeError()
+
+v1 = make_version_list(v1)
+v2 = make_version_list(v2)
+
+# Compare corresponding elements of lists
+# The shorter list is filled with 0 till the lists have the same length
+for n1,n2 in itertools.zip_longest(v1, v2, fillvalue=0):
+if n1 < n2: return -1
+if n1 > n2: return  1
+
+return 0
diff --git a/site_scons/site_tools/git.py b/site_scons/site_tools/git.py
index a77cffb..3a71c9f 100644
--- a/site_scons/site_tools/git.py
+++ b/site_scons/site_tools/git.py
@@ -42,7 +42,6 @@
 import sys

 import gem5_scons.util
-from m5.util import readCommand

 git_style_message = """
 You're missing the gem5 style or commit message hook. These hooks help
@@ -52,7 +51,7 @@

 def install_style_hooks(env):
 try:
-gitdir = env.Dir(readCommand(
+gitdir = env.Dir(gem5_scons.util.readCommand(
 ["git", "rev-parse", "--git-dir"]).strip("\n"))
 except Exception as e:
 print("Warning: Failed to find git repo directory: %s" % e)
diff --git a/src/SConscript b/src/SConscript
index 5fe0ab2..dc07279 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -63,7 +63,7 @@

 build_env = [(opt, env[opt]) for opt in export_vars]

-from m5.util import code_formatter, compareVersions, readCommand
+from m5.util import code_formatter

 
 # Code for adding source files of various types
diff --git a/src/proto/SConsopts b/src/proto/SConsopts
index

[gem5-dev] Change in gem5/gem5[develop]: python: Collapse away the now unused readCommandWithReturn function.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41598 )



Change subject: python: Collapse away the now unused readCommandWithReturn  
function.

..

python: Collapse away the now unused readCommandWithReturn function.

This had been used when detecting python versions, but can now be
absorbed into readCommand.

Change-Id: I4385357c3ce33a0f1b58e741067aa7ae3a7daa3b
---
M src/python/m5/util/__init__.py
1 file changed, 4 insertions(+), 16 deletions(-)



diff --git a/src/python/m5/util/__init__.py b/src/python/m5/util/__init__.py
index 74c0ec0..a0fe63d 100644
--- a/src/python/m5/util/__init__.py
+++ b/src/python/m5/util/__init__.py
@@ -173,15 +173,15 @@
 line += item
 print(line)

-def readCommandWithReturn(cmd, **kwargs):
+def readCommand(cmd, **kwargs):
 """
 run the command cmd, read the results and return them
 this is sorta like `cmd` in shell

 :param cmd: command to run with Popen
 :type cmd: string, list
-:returns: pair consisting on Popen retcode and the command stdout
-:rtype: (int, string)
+:returns: command stdout
+:rtype: string
 """
 from subprocess import Popen, PIPE, STDOUT

@@ -203,19 +203,7 @@
 raise

 output = subp.communicate()[0].decode('utf-8')
-return subp.returncode, output
-
-def readCommand(cmd, **kwargs):
-"""
-run the command cmd, read the results and return them
-this is sorta like `cmd` in shell
-
-:param cmd: command to run with Popen
-:type cmd: string, list
-:returns: command stdout
-:rtype: string
-"""
-return readCommandWithReturn(cmd, **kwargs)[1]
+return output

 def makeDir(path):
 """Make a directory if it doesn't exist.  If the path does exist,

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/41598
To unsubscribe, or for help writing mail filters, visit  
https://gem5-review.googlesource.com/settings


Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4385357c3ce33a0f1b58e741067aa7ae3a7daa3b
Gerrit-Change-Number: 41598
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: sim: Simplify some code in the guest ABI mechanism.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41600 )



Change subject: sim: Simplify some code in the guest ABI mechanism.
..

sim: Simplify some code in the guest ABI mechanism.

Instead of using recursively applied templates to accumulate a series of
wrapper lambdas which dispatch to a call, use pure parameter pack
expansion. This has two benefits. One, it makes the code simpler(ish) and
easier to understand. The parameter pack machinery is still intrinsically
fairly tricky, but there's less of it and it's a fairly straightforward
application of that mechanism.

Also, a nice side benefit is that the template for simcall dispatch will
expand to a small fixed number of functions which do all their work
locally, instead of having a new function for each layer of the onion,
one per parameter, and no calls through lambdas. That should hopefully
make debugging easier, and produce less bookkeeping overhead as far as
really long names, lots of functions, etc.

This code, specifically the code in dispatch.hh, can be simplified even
further in the future once we start using c++17 which is if constexpr,
and std::apply which explodes a tuple and uses its components as
arguments to a function, something I'm doing manually here.

Change-Id: If7c9234cc1014101211474c2ec20362702cf78c2
---
M src/sim/guest_abi.hh
M src/sim/guest_abi/dispatch.hh
M src/sim/guest_abi/layout.hh
3 files changed, 51 insertions(+), 112 deletions(-)



diff --git a/src/sim/guest_abi.hh b/src/sim/guest_abi.hh
index ea3325f..75c4e00 100644
--- a/src/sim/guest_abi.hh
+++ b/src/sim/guest_abi.hh
@@ -51,7 +51,7 @@
 // types will be zero initialized.
 auto state = GuestABI::initializeState(tc);
 GuestABI::prepareForFunction(tc, state);
-return GuestABI::callFrom(tc, state,  
target);
+return GuestABI::callFrom(tc, state,  
target);

 }

 template 
@@ -86,7 +86,7 @@
 // types will be zero initialized.
 auto state = GuestABI::initializeState(tc);
 GuestABI::prepareForArguments(tc, state);
-GuestABI::callFrom(tc, state, target);
+GuestABI::callFrom(tc, state, target);
 }

 template 
@@ -113,7 +113,7 @@

 GuestABI::prepareForFunction(tc, state);
 ss << name;
-GuestABI::dumpArgsFrom(0, ss, tc, state);
+GuestABI::dumpArgsFrom(ss, tc, state);
 return ss.str();
 }

diff --git a/src/sim/guest_abi/dispatch.hh b/src/sim/guest_abi/dispatch.hh
index bc365b9..93480db 100644
--- a/src/sim/guest_abi/dispatch.hh
+++ b/src/sim/guest_abi/dispatch.hh
@@ -30,8 +30,11 @@

 #include 
 #include 
+#include 
 #include 
+#include 

+#include "base/compiler.hh"
 #include "sim/guest_abi/definition.hh"
 #include "sim/guest_abi/layout.hh"

@@ -50,114 +53,63 @@
  * still possible to support by redefining these functions..
  */

-// With no arguments to gather, call the target function and store the
-// result.
-template 
-static typename std::enable_if_t::value && store_ret,  
Ret>

-callFrom(ThreadContext *tc, typename ABI::State ,
-std::function target)
+template 
+static inline typename std::enable_if_t
+callFromHelper(Target , ThreadContext *tc, State , Args  
&,

+std::index_sequence)
 {
-Ret ret = target(tc);
+return target(tc, std::get(args)...);
+}
+
+template 
+static inline typename std::enable_if_t
+callFromHelper(Target , ThreadContext *tc, State , Args  
&,

+std::index_sequence)
+{
+Ret ret = target(tc, std::get(args)...);
 storeResult(tc, ret, state);
 return ret;
 }

-template 
-static typename std::enable_if_t::value && !store_ret,  
Ret>

+template 
+static inline Ret
 callFrom(ThreadContext *tc, typename ABI::State ,
-std::function target)
+std::function target)
 {
-return target(tc);
+// Extract all the arguments from the thread context. Braced  
initializers

+// are evaluated from left to right.
+auto args = std::tuple{getArgument(tc, state)...};
+
+// Call the wrapper which will call target.
+return callFromHelper(
+target, tc, state, std::move(args),
+std::make_index_sequence{});
 }

-// With no arguments to gather and nothing to return, call the target  
function.

-template 
-static void
-callFrom(ThreadContext *tc, typename ABI::State ,
-std::function target)
-{
-target(tc);
-}
-
-// Recursively gather arguments for target from tc until we get to the base
-// case above.
-template 
-static typename std::enable_if_t::value, Ret>
-callFrom(ThreadContext *tc, typename ABI::State ,
-std::function target)
-{
-// Extract the next argument from the thread context.
-NextArg next = getArgument(tc, state);
-
-// Build a partial function which adds the next argument to the call.
-std::function partial =
-[target,next](ThreadContext *_tc, Args... args) {
-return target(_tc, next, args...);
-};
-
-// Recursively

[gem5-dev] Build failed in Jenkins: Compiler-Checks #47

2021-02-18 Thread jenkins-no-reply--- via gem5-dev 
See 


Changes:

[gabe.black] cpu: Factor MaxInst(SrcDest)Regs out of the trace CPU.

[gabe.black] cpu: Track flat register indices in the Minor CPU with a vector.

[gabe.black] cpu: Track misc regs in vectors in the O3 CPU instruction class.

[hoanguyen] base-stats: Add Units to Stats

[hoanguyen] mem: Fix/Improve stats in src/mem

[hoanguyen] cpu,mem: Converting stats to supported units

[hoanguyen] mem: Add Units to mem stats

[hoanguyen] sim: Add units to src/sim

[hoanguyen] dev,dev-arm: Add units to stats in /src/dev

[hoanguyen] arch-arm,arch-riscv,arch-x86: Add units to stats

[hoanguyen] learning-gem5: Add units to stats

[hoanguyen] cpu: Add Units to cpu stats

[hoanguyen] mem: Change warmupCycle stat to warmupTick

[hoanguyen] base-stats: Print Units in Stats dump

[hoanguyen] mem: Remove units from stats description

[hoanguyen] dev,dev-arm: Remove units from stats description

[hoanguyen] arch-riscv: Fixed the style of stats variable names in TlbStats

[hoanguyen] cpu: Remove units from stats description

[gabe.black] scons: Add support for debug info compression.

[Giacomo Travaglini] dev-arm: Add VRAM to VExpress_GEM5_Base

[gabe.black] cpu: Delete the empty, default off "nocpu".

[gabe.black] scons: Remove partial linking.

[gabe.black] scons: Update the Check(Cxx|Link)Flag checks to set their vars.

[gabe.black] scons: Remove "TIMEOUT" variable and checks.

[gabe.black] scons: Trim down a check for mac OS and arch setting flags.

[gabe.black] scons: Extract the gem5 specific Configure call to its own file.

[odanrc] base: Fix copyright of base/stats/SConscript

[gabe.black] scons: Pull Configure() to earlier in SConstruct so we can use it 
more.

[hoanguyen] mem: Initialize pendingWrites stat of NVMStats

[Giacomo Travaglini] arch-arm: Fix CPTR_EL2 writes

[tiago.muck] mem-ruby: warns on masked functional writes

[tiago.muck] mem-ruby: fixes for masked writes

[tiago.muck] mem-ruby: fix functional reads in abstract ctrl

[tiago.muck] mem-ruby: fix Sequencer latency reporting

[gabe.black] scons: In Check(Cxx|Link)Flag, only install the flag if it exists.

[gabe.black] scons: Use conf to determine if some flags are supported.

[gabe.black] scons: Move a displaced have_posix_clock check back where it goes.

[gabe.black] scons: Simplify check for have_posix_clock.

[gabe.black] scons: Simplify backtrace implementation detection.

[gabe.black] scons: Simplify the check for hdf5 support.

[gabe.black] scons: Create a Configure checker for pkg-config.

[gabe.black] scons: Simplify the check for protoc.

[gabe.black] scons: Merge redundant checks for the socket library.

[gabe.black] scons: Simplify kvm architecture compatibility check.

[kyleroarty1716] arch-gcn3: Fix sign extension for branches with multiplied 
offset

[tiago.muck] python: more readable Ruby dot topology

[tiago.muck] mem-ruby: add andMask to WriteMask

[tiago.muck] mem-ruby: add wakeup_port statement

[tiago.muck] mem-ruby: intToTick helper

[gabe.black] arch: Stop including unnecessary FP headers.

[gabe.black] arch-x86: Use popCount from bitfields.hh.

[gabe.black] scons: Work around a scons bug when calling TryCompile.

[odanrc] base: Add enum to_number tests

[Giacomo Travaglini] dev-arm: Fix GICv3 address range

[gabe.black] arch: Get rid of global maximums for numbers of source/dest/misc 
regs.

[Giacomo Travaglini] dev-arm: Fix PL111 address range

[Giacomo Travaglini] python: Sort py sources in alphabetical order

[matthew.poremba] mem-ruby: Make DMASequencer aware of Atomics

[matthew.poremba] cpu: Rename GpuThread in gpu_ruby_test tester

[matthew.poremba] cpu,configs: Add DMA thread to Ruby GPU tester

[tiago.muck] mem-ruby: removes data ptr from RubyRequest

[gabe.black] util: Delete the very obsolete "compile" script.

[gabe.black] util: Delete the ccdrv kernel module.


--
Started by timer
Running as SYSTEM
Building in workspace 
Selected Git installation does not exist. Using Default
The recommended git tool is: NONE
No credentials specified
 > git rev-parse --is-inside-work-tree # timeout=10
Fetching changes from the remote Git repository
 > git config remote.origin.url https://gem5.googlesource.com/public/gem5 # 
 > timeout=10
Fetching upstream changes from https://gem5.googlesource.com/public/gem5
 > git --version # timeout=10
 > git --version # 'git version 2.25.1'
 > git fetch --tags --force --progress -- 
 > https://gem5.googlesource.com/public/gem5 
 > +refs/heads/*:refs/remotes/origin/* # timeout=10
 > git rev-parse refs/remotes/origin/develop^{commit} # timeout=10
Checking out Revision 6bcb68e07ca630e59cc40b89096e930a64cd4d16 
(refs/remotes/origin/develop)
 > git config core.sparsecheckout # timeout=10
 > git checkout -f 6bcb68e07ca630e59cc40b89096e930a64cd4d16 # timeout=10
Commit message: "util: Delete the ccdrv kernel module."
 > git

[gem5-dev] Change in gem5/gem5[develop]: ext: Add SoftFloat Library to ext directory

2021-02-18 Thread Kai Ren (Gerrit) via gem5-dev 
Kai Ren has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/39357 )


Change subject: ext: Add SoftFloat Library to ext directory
..

ext: Add SoftFloat Library to ext directory

This patch adds Softfloat library for supporting RISCV
float operation implement.

Using SoftFloat Package to reinplement Riscv FPops.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-373

Change-Id: Ic96e6c8adec0713bdbd744d581c750034b88246c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39357
Reviewed-by: Bobby R. Bruce 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
A ext/softfloat/SConscript
A ext/softfloat/f128_add.c
A ext/softfloat/f128_classify.c
A ext/softfloat/f128_div.c
A ext/softfloat/f128_eq.c
A ext/softfloat/f128_eq_signaling.c
A ext/softfloat/f128_isSignalingNaN.c
A ext/softfloat/f128_le.c
A ext/softfloat/f128_le_quiet.c
A ext/softfloat/f128_lt.c
A ext/softfloat/f128_lt_quiet.c
A ext/softfloat/f128_mul.c
A ext/softfloat/f128_mulAdd.c
A ext/softfloat/f128_rem.c
A ext/softfloat/f128_roundToInt.c
A ext/softfloat/f128_sqrt.c
A ext/softfloat/f128_sub.c
A ext/softfloat/f128_to_f16.c
A ext/softfloat/f128_to_f32.c
A ext/softfloat/f128_to_f64.c
A ext/softfloat/f128_to_i32.c
A ext/softfloat/f128_to_i32_r_minMag.c
A ext/softfloat/f128_to_i64.c
A ext/softfloat/f128_to_i64_r_minMag.c
A ext/softfloat/f128_to_ui32.c
A ext/softfloat/f128_to_ui32_r_minMag.c
A ext/softfloat/f128_to_ui64.c
A ext/softfloat/f128_to_ui64_r_minMag.c
A ext/softfloat/f16_add.c
A ext/softfloat/f16_div.c
A ext/softfloat/f16_eq.c
A ext/softfloat/f16_eq_signaling.c
A ext/softfloat/f16_isSignalingNaN.c
A ext/softfloat/f16_le.c
A ext/softfloat/f16_le_quiet.c
A ext/softfloat/f16_lt.c
A ext/softfloat/f16_lt_quiet.c
A ext/softfloat/f16_mul.c
A ext/softfloat/f16_mulAdd.c
A ext/softfloat/f16_rem.c
A ext/softfloat/f16_roundToInt.c
A ext/softfloat/f16_sqrt.c
A ext/softfloat/f16_sub.c
A ext/softfloat/f16_to_f128.c
A ext/softfloat/f16_to_f32.c
A ext/softfloat/f16_to_f64.c
A ext/softfloat/f16_to_i32.c
A ext/softfloat/f16_to_i32_r_minMag.c
A ext/softfloat/f16_to_i64.c
A ext/softfloat/f16_to_i64_r_minMag.c
A ext/softfloat/f16_to_ui32.c
A ext/softfloat/f16_to_ui32_r_minMag.c
A ext/softfloat/f16_to_ui64.c
A ext/softfloat/f16_to_ui64_r_minMag.c
A ext/softfloat/f32_add.c
A ext/softfloat/f32_classify.c
A ext/softfloat/f32_div.c
A ext/softfloat/f32_eq.c
A ext/softfloat/f32_eq_signaling.c
A ext/softfloat/f32_isSignalingNaN.c
A ext/softfloat/f32_le.c
A ext/softfloat/f32_le_quiet.c
A ext/softfloat/f32_lt.c
A ext/softfloat/f32_lt_quiet.c
A ext/softfloat/f32_mul.c
A ext/softfloat/f32_mulAdd.c
A ext/softfloat/f32_rem.c
A ext/softfloat/f32_roundToInt.c
A ext/softfloat/f32_sqrt.c
A ext/softfloat/f32_sub.c
A ext/softfloat/f32_to_f128.c
A ext/softfloat/f32_to_f16.c
A ext/softfloat/f32_to_f64.c
A ext/softfloat/f32_to_i32.c
A ext/softfloat/f32_to_i32_r_minMag.c
A ext/softfloat/f32_to_i64.c
A ext/softfloat/f32_to_i64_r_minMag.c
A ext/softfloat/f32_to_ui32.c
A ext/softfloat/f32_to_ui32_r_minMag.c
A ext/softfloat/f32_to_ui64.c
A ext/softfloat/f32_to_ui64_r_minMag.c
A ext/softfloat/f64_add.c
A ext/softfloat/f64_classify.c
A ext/softfloat/f64_div.c
A ext/softfloat/f64_eq.c
A ext/softfloat/f64_eq_signaling.c
A ext/softfloat/f64_isSignalingNaN.c
A ext/softfloat/f64_le.c
A ext/softfloat/f64_le_quiet.c
A ext/softfloat/f64_lt.c
A ext/softfloat/f64_lt_quiet.c
A ext/softfloat/f64_mul.c
A ext/softfloat/f64_mulAdd.c
A ext/softfloat/f64_rem.c
A ext/softfloat/f64_roundToInt.c
A ext/softfloat/f64_sqrt.c
A ext/softfloat/f64_sub.c
A ext/softfloat/f64_to_f128.c
A ext/softfloat/f64_to_f16.c
A ext/softfloat/f64_to_f32.c
A ext/softfloat/f64_to_i32.c
A ext/softfloat/f64_to_i32_r_minMag.c
A ext/softfloat/f64_to_i64.c
A ext/softfloat/f64_to_i64_r_minMag.c
A ext/softfloat/f64_to_ui32.c
A ext/softfloat/f64_to_ui32_r_minMag.c
A ext/softfloat/f64_to_ui64.c
A ext/softfloat/f64_to_ui64_r_minMag.c
A ext/softfloat/i32_to_f128.c
A ext/softfloat/i32_to_f16.c
A ext/softfloat/i32_to_f32.c
A ext/softfloat/i32_to_f64.c
A ext/softfloat/i64_to_f128.c
A ext/softfloat/i64_to_f16.c
A ext/softfloat/i64_to_f32.c
A ext/softfloat/i64_to_f64.c
A ext/softfloat/internals.h
A ext/softfloat/platform.h
A ext/softfloat/primitiveTypes.h
A ext/softfloat/primitives.h
A ext/softfloat/s_add128.c
A ext/softfloat/s_add256M.c
A ext/softfloat/s_addCarryM.c
A ext/softfloat/s_addComplCarryM.c
A ext/softfloat/s_addM.c
A ext/softfloat/s_addMagsF128.c
A ext/softfloat/s_addMagsF16.c
A ext/softfloat/s_addMagsF32.c
A ext/softfloat/s_addMagsF64.c
A ext/softfloat/s_approxRecip32_1.c
A ext/softfloat/s_approxRecipSqrt32_1.c
A ext/softfloat/s_approxRecipSqrt_1Ks.c
A ext/softfloat/s_approxRecip_1Ks.c
A ext/softfloat/s_commonNaNToF128UI.c
A ext/softfloat/s_commonNaNToF16UI.c
A ext/softfloat/s_commonNaNToF32UI.c
A ext/softfloat/s_commonNaNToF64UI.c
A ext/softfloat/s_compare128M.c
A ext/softfloat/s_compare96M.c
A ext/softfloat/s_countLeadingZeros16.c

[gem5-dev] Change in gem5/gem5[develop]: cpu,mem: Add or remove parenthesis to make the compiler happy.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40956 )


Change subject: cpu,mem: Add or remove parenthesis to make the compiler  
happy.

..

cpu,mem: Add or remove parenthesis to make the compiler happy.

Remove extraneous parenthesis in an if condition, and add some
parenthesis where an assignment was being used as a condition in a while
loop.

Change-Id: Ie12c74ac681ef042138e3b41f257ea1bb2ce4267
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40956
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/o3/inst_queue_impl.hh
M src/cpu/pred/tage_base.cc
2 files changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 8472597..0f8716b 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -773,12 +773,12 @@
 IssueStruct *i2e_info = issueToExecuteQueue->access(0);

 DynInstPtr mem_inst;
-while (mem_inst = std::move(getDeferredMemInstToExecute())) {
+while ((mem_inst = std::move(getDeferredMemInstToExecute( {
 addReadyMemInst(mem_inst);
 }

 // See if any cache blocked instructions are able to be executed
-while (mem_inst = std::move(getBlockedMemInstToExecute())) {
+while ((mem_inst = std::move(getBlockedMemInstToExecute( {
 addReadyMemInst(mem_inst);
 }

diff --git a/src/cpu/pred/tage_base.cc b/src/cpu/pred/tage_base.cc
index 108f6a2..791f5d4 100644
--- a/src/cpu/pred/tage_base.cc
+++ b/src/cpu/pred/tage_base.cc
@@ -467,7 +467,7 @@
 //Allocate entries
 unsigned numAllocated = 0;
 for (int i = X; i <= nHistoryTables; i++) {
-if ((gtable[i][bi->tableIndices[i]].u == 0)) {
+if (gtable[i][bi->tableIndices[i]].u == 0) {
 gtable[i][bi->tableIndices[i]].tag = bi->tableTags[i];
 gtable[i][bi->tableIndices[i]].ctr = (taken) ? 0 : -1;
 ++numAllocated;



7 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

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Gerrit-Reviewer: Gabe Black 
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[gem5-dev] Change in gem5/gem5[develop]: scons,systemc: Drop the check for gcc version when building systemc.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41595 )


Change subject: scons,systemc: Drop the check for gcc version when building  
systemc.

..

scons,systemc: Drop the check for gcc version when building systemc.

The minimum version of gcc is 5, and the check would only fail if gcc
was older than that.

Change-Id: I20f4f42661baf415b7cbe80ec0ace4e427666348
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41595
Maintainer: Gabe Black 
Tested-by: kokoro 
Reviewed-by: Andreas Sandberg 
---
M src/systemc/SConsopts
1 file changed, 1 insertion(+), 8 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/systemc/SConsopts b/src/systemc/SConsopts
index bd9f1da..26a15dd 100644
--- a/src/systemc/SConsopts
+++ b/src/systemc/SConsopts
@@ -25,17 +25,10 @@

 Import('*')

-from m5.util import compareVersions
-
 from gem5_scons import warning

 def use_systemc_check(env, warn=False):
-if ('GCC_VERSION' in env and
-compareVersions(env['GCC_VERSION'], '5.0') < 0):
-if warn:
-warning('Systemc may not work on gcc versions less than 5.0.')
-return False
-elif env['PLATFORM'] == 'darwin':
+if env['PLATFORM'] == 'darwin':
 if warn:
 warning('Warning: Systemc may not work on Mac OS.')
 return False



2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

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Gerrit-Change-Number: 41595
Gerrit-PatchSet: 4
Gerrit-Owner: Gabe Black 
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Use std::abs() in traffic_gen.cc.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41597 )


Change subject: cpu: Use std::abs() in traffic_gen.cc.
..

cpu: Use std::abs() in traffic_gen.cc.

When building with clang with the --without-tcmalloc flag set, the
-fno-builtin flag is not used, and clang can then detect that the
integer version of abs(), apparently the C version, is being used on a
floating point value in traffic_gen.cc.

This change takes clang's suggestion to use std::abs instead, and also
includes a header file which will provide it.

Change-Id: Ic28ed7454b2ac00c89328d9d0314aed74e946643
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41597
Reviewed-by: Andreas Sandberg 
Maintainer: Andreas Sandberg 
Tested-by: kokoro 
---
M src/cpu/testers/traffic_gen/traffic_gen.cc
1 file changed, 3 insertions(+), 1 deletion(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/testers/traffic_gen/traffic_gen.cc  
b/src/cpu/testers/traffic_gen/traffic_gen.cc

index 1ea4d5e..6e1a00a 100644
--- a/src/cpu/testers/traffic_gen/traffic_gen.cc
+++ b/src/cpu/testers/traffic_gen/traffic_gen.cc
@@ -39,6 +39,7 @@
 #include 
 #include 

+#include 
 #include 
 #include 

@@ -331,9 +332,10 @@
 }

 // avoid comparing floating point numbers
-if (abs(sum - 1.0) > 0.001)
+if (std::fabs(sum - 1.0) > 0.001) {
 fatal("%s has transition probability != 1 for state %d\n",
   name(), i);
+}
 }

 // close input file

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Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
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[gem5-dev] Change in gem5/gem5[develop]: base: Exclude the end of ChannelAddrRange

2021-02-18 Thread Giacomo Travaglini (Gerrit) via gem5-dev 

Attention is currently required from: Nikos Nikoleris.
Hello Nikos Nikoleris,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/41653

to review the following change.


Change subject: base: Exclude the end of ChannelAddrRange
..

base: Exclude the end of ChannelAddrRange

Since [1] has changed the end of AddrRange to be excluded from the
range, we need to do the same for ChannelAddrRange.

[1] Idd1e75d5771d198c4b8142b28de0f3a6e9007a52

Change-Id: I901a03409f2204a502133a1d763d8112b1d08f8f
Reviewed-by: Nikos Nikoleris 
---
M src/base/channel_addr.hh
M src/base/channel_addr.test.cc
2 files changed, 8 insertions(+), 7 deletions(-)



diff --git a/src/base/channel_addr.hh b/src/base/channel_addr.hh
index 55d227b..9384a39 100644
--- a/src/base/channel_addr.hh
+++ b/src/base/channel_addr.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, 2021 ARM Limited
+ * Copyright (c) 2019, 2021 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -154,6 +154,7 @@
 /**
  * The ChanneelAddrRange class describes a contiguous range of
  * addresses in a contiguous channel-local address space.
+ * The start is inclusive, the end is not.
  */
 class ChannelAddrRange
 {
@@ -173,15 +174,15 @@

 constexpr ChannelAddrRange(const ChannelAddrRange &) = default;

-constexpr ChannelAddr size() const { return _end - _start + 1; }
+constexpr ChannelAddr size() const { return _end - _start; }

-constexpr bool valid() const { return _start <= _end; }
+constexpr bool valid() const { return _start < _end; }

 constexpr ChannelAddr start() const { return _start; }
 constexpr ChannelAddr end() const { return _end; }

 constexpr bool contains(ChannelAddr a) const {
-return a >= _start && a <= _end;
+return a >= _start && a < _end;
 }

 /** @} */ // end of api_channel_addr
diff --git a/src/base/channel_addr.test.cc b/src/base/channel_addr.test.cc
index 47ec0ab..c166b542 100644
--- a/src/base/channel_addr.test.cc
+++ b/src/base/channel_addr.test.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019 ARM Limited
+ * Copyright (c) 2019, 2021 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -50,7 +50,7 @@
 /* Ensure that range bounds are inclusive */
 TEST(ChannelAddrRange, Range)
 {
-ChannelAddrRange range(ChannelAddr(1), ChannelAddr(3));
+ChannelAddrRange range(ChannelAddr(1), ChannelAddr(4));

 EXPECT_FALSE(range.contains(ChannelAddr(0)));
 EXPECT_TRUE(range.contains(ChannelAddr(1)));
@@ -59,6 +59,6 @@
 EXPECT_FALSE(range.contains(ChannelAddr(4)));

 EXPECT_EQ(range.start(), ChannelAddr(1));
-EXPECT_EQ(range.end(), ChannelAddr(3));
+EXPECT_EQ(range.end(), ChannelAddr(4));
 EXPECT_EQ(range.size(), ChannelAddr(3));
 }

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[gem5-dev] Change in gem5/gem5[develop]: configs: Updates for SMP X86KvmCPU boot

2021-02-18 Thread Kevin Loughlin (Gerrit) via gem5-dev 
Kevin Loughlin has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41602 )



Change subject: configs: Updates for SMP X86KvmCPU boot
..

configs: Updates for SMP X86KvmCPU boot

The prior example config for FS fails SMP boot on the KVMX86CPU.
These updates incorporate logic x86-boot-tests/system/
[system.py|run_exit.py] as well as configs/example/arm/
fs_bigLITTLE.py to enable both single processor and SMP boot.
Each KVM VM now uses its own eventq and a non-zero sim_quantum.

Change-Id: I9c73a2f6f2ca604aecd31f45570423c58f85020f
Signed-off-by: Kevin Loughlin 
---
M configs/example/fs.py
1 file changed, 22 insertions(+), 4 deletions(-)



diff --git a/configs/example/fs.py b/configs/example/fs.py
index f388503..32e7471 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -144,10 +144,6 @@
 test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain,  
cpu_id=i)

 for i in range(np)]

-if ObjectList.is_kvm_cpu(TestCPUClass) or \
-ObjectList.is_kvm_cpu(FutureClass):
-test_sys.kvm_vm = KvmVM()
-
 if options.ruby:
 bootmem = getattr(test_sys, '_bootmem', None)
 Ruby.create_system(options, True, test_sys, test_sys.iobus,
@@ -220,6 +216,20 @@

 MemConfig.config_mem(options, test_sys)

+if ObjectList.is_kvm_cpu(TestCPUClass) or \
+ObjectList.is_kvm_cpu(FutureClass):
+# Assign KVM CPUs to their own event queues / threads. This
+# has to be done after creating caches and other child objects
+# since these mustn't inherit the CPU event queue.
+for i,cpu in enumerate(test_sys.cpu):
+# Child objects usually inherit the parent's event
+# queue. Override that and use the same event queue for
+# all devices.
+for obj in cpu.descendants():
+obj.eventq_index = 0
+cpu.eventq_index = i + 1
+test_sys.kvm_vm = KvmVM()
+
 return test_sys

 def build_drive_system(np):
@@ -324,6 +334,7 @@
 np = options.num_cpus

 test_sys = build_test_system(np)
+
 if len(bm) == 2:
 drive_sys = build_drive_system(np)
 root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
@@ -345,6 +356,13 @@
 print("Error I don't know how to create more than 2 systems.")
 sys.exit(1)

+if ObjectList.is_kvm_cpu(TestCPUClass) or \
+ObjectList.is_kvm_cpu(FutureClass):
+# Required for running kvm on multiple host cores.
+# Uses gem5's parallel event queue feature
+# Note: The simulator is quite picky about this number!
+root.sim_quantum = int(1e9) # 1 ms
+
 if options.timesync:
 root.time_sync_enable = True


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[gem5-dev] Change in gem5/gem5[develop]: scons: Move imports below version checks in site_init.py.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40966 )


Change subject: scons: Move imports below version checks in site_init.py.
..

scons: Move imports below version checks in site_init.py.

Without knowing for sure we're using python 3, it's dangerous to start
pulling in code which may make that assumption.

Change-Id: Ic13af74a686ee0fb8f36bb672beadea4334b431c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40966
Maintainer: Gabe Black 
Tested-by: kokoro 
Reviewed-by: Andreas Sandberg 
---
M site_scons/site_init.py
1 file changed, 2 insertions(+), 1 deletion(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/site_scons/site_init.py b/site_scons/site_init.py
index 2f7cbf1..3507373 100644
--- a/site_scons/site_init.py
+++ b/site_scons/site_init.py
@@ -39,7 +39,6 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 from __future__ import print_function
-from gem5_python_paths import extra_python_paths

 # Check for recent-enough Python and SCons versions.
 try:
@@ -85,4 +84,6 @@
 """)
 raise

+from gem5_python_paths import extra_python_paths
+
 sys.path[1:1] = extra_python_paths



7 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

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Gerrit-Change-Number: 40966
Gerrit-PatchSet: 9
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Adds rdtscp flag to cpuid for X86KvmCPU

2021-02-18 Thread Kevin Loughlin (Gerrit) via gem5-dev 
Kevin Loughlin has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41633 )



Change subject: arch-x86: Adds rdtscp flag to cpuid for X86KvmCPU
..

arch-x86: Adds rdtscp flag to cpuid for X86KvmCPU

The rdtscp instruction is supported by gem5, so the X86KvmCPU
cpuid flags should be updated accordingly. Otherwise, KVM
needlessly crashes upon executing rdtscp.

Change-Id: If79017e60cbdf0757e929f07e56dba64322846bb
Signed-off-by: Kevin Loughlin 
---
M src/arch/x86/cpuid.cc
1 file changed, 2 insertions(+), 2 deletions(-)



diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index 2a560f5..ae1ba2e 100644
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -104,7 +104,7 @@
 break;
   case FamilyModelSteppingBrandFeatures:
 result = CpuidResult(0x00020f51, 0x0405,
- 0xe3d3fbff, 0x0001);
+ 0xebd3fbff, 0x0001);
 break;
   case NameString1:
   case NameString2:
@@ -165,7 +165,7 @@
 break;
   case FamilyModelStepping:
 result = CpuidResult(0x00020f51, 0x0805,
- 0xe7dbfbff, 0x0209);
+ 0xefdbfbff, 0x0209);
 break;
   case ExtendedFeatures:
 result = CpuidResult(0x, 0x0180,

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[gem5-dev] Potential v20.1 hot-fix --- Fixing build errors while compiling gem5 with scons 4.0.1 and scons 4.1.0

2021-02-18 Thread Hoa Nguyen via gem5-dev 
Hi all,

A bug has been identified, here: https://gem5.atlassian.net/browse/GEM5-916,
where compiling gem5 with scons 4.0.1 and 4.1.0 results in build errors. A
fix has been
produced:

https://gem5-review.googlesource.com/c/public/gem5/+/41594

It has been suggested that this should be added to gem5 as a hotfix to
ensure those running v20.1 have this fix ASAP. I began the procedure to do
so.

Please feel free to contribute to/comment on the review above if you wish
to have a say on this matter.

Regards,
Hoa Nguyen
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[gem5-dev] Change in gem5/gem5[develop]: python: Add find function to pystats groups

2021-02-18 Thread Jason Lowe-Power (Gerrit) via gem5-dev 
Jason Lowe-Power has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41603 )



Change subject: python: Add find function to pystats groups
..

python: Add find function to pystats groups

The `find` function allows users to "search" for a statistic or group
within a group. For instance, you might want to find all of the groups
within the system which have the name "cpu{i}". This is useful for
aggregate statistic values across multiple components.

Example:
total_instruuctions = sum([cpu.exec_context.thread_0.numInsts.value
   for cpu in simstat.system.find('cpu')])

The find functino matches based on substring. If the name given the find
function is a substring of the stat name or the group name the
stat/group will be returned. I considered making this perform the same
as the `like` operator in SQL or as a full regex, but decided this
simple implementation will cover almost all use cases.

Change-Id: I31c2a029d8a6b1d97225ab4efa34a4d13147ea32
Signed-off-by: Jason Lowe-Power 
---
M src/python/m5/pystats/group.py
1 file changed, 26 insertions(+), 2 deletions(-)



diff --git a/src/python/m5/pystats/group.py b/src/python/m5/pystats/group.py
index 0316d23..b72ab2f 100644
--- a/src/python/m5/pystats/group.py
+++ b/src/python/m5/pystats/group.py
@@ -24,7 +24,7 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-from typing import Dict, List, Optional, Union
+from typing import Dict, Iterator, List, Optional, Union

 from .jsonserializable import JsonSerializable
 from .statistic import Scalar, Statistic
@@ -53,6 +53,30 @@
 for key,value in kwargs.items():
 setattr(self, key, value)

+def find(self, name: str) -> Iterator[Union["Group", Statistic]]:
+""" Find all stats that match the name
+
+This function searches all of the "children" in this group. It  
yields
+the set of attributes (children) that have the `name` as a  
substring.

+The order of the objects returned by the generator is arbitrary.
+
+```
+system.find('cpu') -> [cpu0, cpu1, cpu2, cpu3, other_cpu, ...]
+```
+
+This is useful for performing aggregates over substats. For  
instance:

+
+```
+total_instruuctions = sum([cpu.exec_context.thread_0.numInsts.value
+   for cpu in simstat.system.find('cpu')])
+```
+"""
+for attr in self.__dict__:
+if name in attr:
+obj = getattr(self, attr)
+if isinstance(obj, Group) or isinstance(obj, Statistic):
+yield obj
+
 class Vector(Group):
 """
 This Vector class is used to store vector information. However, in gem5
@@ -66,4 +90,4 @@
  type="Vector",
  timeConversion=None,
  **scalar_map,
-)
\ No newline at end of file
+)

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[gem5-dev] Change in gem5/gem5[develop]: base: Introduce a version of reverseBits for 8 bit types.

2021-02-18 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41593 )


Change subject: base: Introduce a version of reverseBits for 8 bit types.
..

base: Introduce a version of reverseBits for 8 bit types.

These types shouldn't be shifted by 8, since shifting a type by its
width is technically undefined behavior. We never actually use the
result from this shift, but it still upsets certain versions of clang.

Change-Id: I425431473fa44a6e0de2edf780c265ff4e3f440e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41593
Reviewed-by: Gabe Black 
Reviewed-by: Jason Lowe-Power 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/base/bitfield.hh
1 file changed, 9 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/base/bitfield.hh b/src/base/bitfield.hh
index 1ec684f..470941a 100644
--- a/src/base/bitfield.hh
+++ b/src/base/bitfield.hh
@@ -209,7 +209,7 @@
  * @ingroup api_bitfield
  */
 template 
-std::enable_if_t::value, T>
+std::enable_if_t::value && sizeof(T) != 1, T>
 reverseBits(T val, size_t size=sizeof(T))
 {
 assert(size <= sizeof(T));
@@ -223,6 +223,14 @@
 return output;
 }

+template 
+std::enable_if_t::value && sizeof(T) == 1, T>
+reverseBits(T val, size_t size=sizeof(T))
+{
+assert(size == 1);
+return reverseBitsLookUpTable[val];
+}
+
 /**
  * Returns the bit position of the MSB that is set in the input
  *

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I425431473fa44a6e0de2edf780c265ff4e3f440e
Gerrit-Change-Number: 41593
Gerrit-PatchSet: 5
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons: Fix gem5 failed to build with scons 4.0.1 and 4.1.0

2021-02-18 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/41601 )



Change subject: scons: Fix gem5 failed to build with scons 4.0.1 and 4.1.0
..

scons: Fix gem5 failed to build with scons 4.0.1 and 4.1.0

SCons failed to find m5 module while loading m5.util.terminal
from site_scons/gem5_scons/util.py.

This results in the current version of gem5 stable failed to
build with scons 4.0.1 and 4.1.0.

The nature of the bug and the explaination for the fix can be
found here,
https://gem5-review.googlesource.com/c/public/gem5/+/38616

Jira: https://gem5.atlassian.net/browse/GEM5-916

Change-Id: I3817f39ebc3021fb6fc89bcd09a96999f8ca2841
Signed-off-by: Hoa Nguyen 
---
M SConstruct
M site_scons/site_tools/default.py
2 files changed, 1 insertion(+), 7 deletions(-)



diff --git a/SConstruct b/SConstruct
index 0d8159b..bb038b8 100755
--- a/SConstruct
+++ b/SConstruct
@@ -139,7 +139,7 @@
 #
 

-main = Environment()
+main = Environment(tools=['default', 'git'])

 from gem5_scons.util import get_termcap
 termcap = get_termcap()
diff --git a/site_scons/site_tools/default.py  
b/site_scons/site_tools/default.py

index 1965a20..88a6932 100644
--- a/site_scons/site_tools/default.py
+++ b/site_scons/site_tools/default.py
@@ -78,15 +78,9 @@
 # as well
 env.AppendENVPath('PYTHONPATH', extra_python_paths)

-gem5_tool_list = [
-'git',
-]
-
 def generate(env):
 common_config(env)
 SCons.Tool.default.generate(env)
-for tool in gem5_tool_list:
-SCons.Tool.Tool(tool)(env)

 def exists(env):
 return 1

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3817f39ebc3021fb6fc89bcd09a96999f8ca2841
Gerrit-Change-Number: 41601
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen 
Gerrit-MessageType: newchange
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