[gem5-dev] Re: Add AVX512 Support?

2020-05-31 Thread Gabe Black via gem5-dev
https://docs.google.com/document/d/1O_u_Xq14TgreYThuZcbM3kuXFCrKvaFHA2O9poCeHSk/edit#heading=h.r067bn3rmydo On Sun, May 31, 2020 at 9:31 PM Zhengrong Wang via gem5-dev < gem5-dev@gem5.org> wrote: > Hi Gabe, > > Thanks for your reply. For the vector register file, I agree it is probably > a better

[gem5-dev] Re: Add AVX512 Support?

2020-05-31 Thread Zhengrong Wang via gem5-dev
Hi Gabe, Thanks for your reply. For the vector register file, I agree it is probably a better idea to stick with current approach, at least it does not require changing the SSE instructions. I cound not find your plan to redesign the register handling mechanism. If you could provide a link I would

[gem5-dev] Re: ISA description structure

2020-05-31 Thread Gabe Black via gem5-dev
Hi Jasmin. There is some documentation, although it's not as complete as it could be. I think you can find most of it on the gem5 website. ISA generation is one of the more complex areas of gem5 (part of what I'm hoping to improve), and is probably particularly hard to learn and understand just fro

[gem5-dev] Re: ISA description structure

2020-05-31 Thread Gabe Black via gem5-dev
Yeah, the way the decoder itself is generated also needs to be revamped for exactly the reason you're describing, although I don't want to bite off too much at a time. I'm definitely aware of that issue though, and hope to get to it at some point. Gabe On Sun, May 31, 2020 at 1:23 AM Ciro Santill

[gem5-dev] Re: Add AVX512 Support?

2020-05-31 Thread Gabe Black via gem5-dev
Hi Sean. I'm not aware of anyone working on AVX-512, but it would be nice if the AMD folks could chime in and confirm that. The x86 microcode was originally based off of the microcode for the K6 as described in a patent. The floating point parts of that patent were very vague and hand wavy, so I mo

[gem5-dev] Add AVX512 Support?

2020-05-31 Thread Sean Wong via gem5-dev
Hello, This is my first time posting here, so apologies if I made any mistakes. The last time I checked the develop branch, gem5 has not yet supported the AVX512. And searching the mail list I do not see any plan for that. Is there any ongoing development to support that? If not, I am happy to co

[gem5-dev] Re: ISA description structure

2020-05-31 Thread Jasmin Jahic via gem5-dev
Hello, is there some sort of documentation of the architecture of the whole project? If no, I would be happy to help with this (is my research topic and have experience with industry projects). Best regards, Jasmin JAHIC On 5/31/20 10:22 AM, Ciro Santilli via gem5-dev wrote: Gabe, I just

[gem5-dev] Re: ISA description structure

2020-05-31 Thread Ciro Santilli via gem5-dev
Gabe, I just want to say, I would be REALLY happy if those monolithic files were split up somehow, to improve rebuild times and not crash my debuggers/IDEs, if someone manages that it would be amazing. I was also thinking about the scons approach you mentioned, where we can generate one .cc/.hh