[gem5-dev] Change in gem5/gem5[develop]: arch-arm: add missing override for remote_gdb

2021-11-10 Thread Yu-hsin Wang (Gerrit) via gem5-dev 
Yu-hsin Wang has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52685 )



Change subject: arch-arm: add missing override for remote_gdb
..

arch-arm: add missing override for remote_gdb

Change-Id: Iecbf56d97784367e416f950658515343734f3bec
---
M src/arch/arm/remote_gdb.hh
1 file changed, 14 insertions(+), 4 deletions(-)



diff --git a/src/arch/arm/remote_gdb.hh b/src/arch/arm/remote_gdb.hh
index 847dee7..5c5a37d 100644
--- a/src/arch/arm/remote_gdb.hh
+++ b/src/arch/arm/remote_gdb.hh
@@ -63,7 +63,7 @@
 class RemoteGDB : public BaseRemoteGDB
 {
   protected:
-bool acc(Addr addr, size_t len);
+bool acc(Addr addr, size_t len) override;

 class AArch32GdbRegCache : public BaseGdbRegCache
 {
@@ -119,13 +119,14 @@

   public:
 RemoteGDB(System *_system, int _port);
-BaseGdbRegCache *gdbRegs();
+BaseGdbRegCache *gdbRegs() override;
 std::vector
-availableFeatures() const
+availableFeatures() const override
 {
 return {"qXfer:features:read+"};
 };
-bool getXferFeaturesRead(const std::string , std::string  
);

+bool getXferFeaturesRead(const std::string ,
+ std::string ) override;
 };

 } // namespace ArmISA

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iecbf56d97784367e416f950658515343734f3bec
Gerrit-Change-Number: 52685
Gerrit-PatchSet: 1
Gerrit-Owner: Yu-hsin Wang 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: fastmodel: CortexR52 support gdb

2021-11-10 Thread Yu-hsin Wang (Gerrit) via gem5-dev 
Yu-hsin Wang has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52623 )


Change subject: fastmodel: CortexR52 support gdb
..

fastmodel: CortexR52 support gdb

We change several things to support basic gdb.

1. Correct the memory translation.
memory_getUsefulAddressTranslations returns an empty list. So there's no
memory translation in R52.

2. Implement FPSCR for gdb collecting status.

3. Correct the breakpoint memory space.

Change-Id: Icc824502faec5ac228003f0de7e9dbe26babe7ef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52623
Reviewed-by: Gabe Black 
Reviewed-by: Earl Ou 
Maintainer: Gabe Black 
Tested-by: kokoro 
---
M src/arch/arm/fastmodel/CortexR52/thread_context.cc
M src/arch/arm/fastmodel/CortexR52/thread_context.hh
2 files changed, 47 insertions(+), 29 deletions(-)

Approvals:
  Earl Ou: Looks good to me, but someone else must approve
  Gabe Black: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/fastmodel/CortexR52/thread_context.cc  
b/src/arch/arm/fastmodel/CortexR52/thread_context.cc

index 0f2dfa0..269baf5 100644
--- a/src/arch/arm/fastmodel/CortexR52/thread_context.cc
+++ b/src/arch/arm/fastmodel/CortexR52/thread_context.cc
@@ -49,31 +49,9 @@
 bool
 CortexR52TC::translateAddress(Addr , Addr vaddr)
 {
-// Determine what memory spaces are currently active.
-Iris::CanonicalMsn in_msn;
-switch (ArmISA::currEL(this)) {
-  case ArmISA::EL3:
-in_msn = Iris::SecureMonitorMsn;
-break;
-  case ArmISA::EL2:
-in_msn = Iris::NsHypMsn;
-break;
-  default:
-in_msn = Iris::GuestMsn;
-break;
-}
-
-Iris::CanonicalMsn out_msn = ArmISA::isSecure(this) ?
-Iris::PhysicalMemorySecureMsn : Iris::PhysicalMemoryNonSecureMsn;
-
-// Figure out what memory spaces match the canonical numbers we need.
-iris::MemorySpaceId in = getMemorySpaceId(in_msn);
-iris::MemorySpaceId out = getMemorySpaceId(out_msn);
-
-panic_if(in == iris::IRIS_UINT64_MAX || out == iris::IRIS_UINT64_MAX,
-"Canonical IRIS memory space numbers not found.");
-
-return ThreadContext::translateAddress(paddr, out, vaddr, in);
+// No MMU here.
+paddr = vaddr;
+return true;
 }

 void
@@ -89,6 +67,23 @@
 extractResourceMap(ccRegIds, resources, ccRegIdxNameMap);
 }

+void
+CortexR52TC::sendFunctional(PacketPtr pkt)
+{
+  auto msn = Iris::PhysicalMemoryMsn;
+  auto id = getMemorySpaceId(msn);
+
+  auto addr = pkt->getAddr();
+  auto size = pkt->getSize();
+  auto data = pkt->getPtr();
+
+  pkt->makeResponse();
+  if (pkt->isRead())
+  readMem(id, addr, data, size);
+  else
+  writeMem(id, addr, data, size);
+}
+
 RegVal
 CortexR52TC::readIntReg(RegIndex reg_idx) const
 {
@@ -148,9 +143,7 @@
 CortexR52TC::getBpSpaceIds() const
 {
 if (bpSpaceIds.empty()) {
-std::vector msns{
-Iris::SecureMonitorMsn, Iris::GuestMsn, Iris::NsHypMsn,
-Iris::HypAppMsn};
+std::vector msns{Iris::GuestMsn,  
Iris::NsHypMsn};

 for (auto  : msns) {
 auto id = getMemorySpaceId(msn);
 if (id != iris::IRIS_UINT64_MAX)
@@ -609,7 +602,7 @@
 // ArmISA::MISCREG_NZCV?
 // ArmISA::MISCREG_DAIF?
 // ArmISA::MISCREG_FPCR?
-// ArmISA::MISCREG_FPSR?
+{ ArmISA::MISCREG_FPSCR, "FPSCR" },
 // ArmISA::MISCREG_DSPSR_EL0?
 // ArmISA::MISCREG_DLR_EL0?
 // ArmISA::MISCREG_SPSR_EL2?
diff --git a/src/arch/arm/fastmodel/CortexR52/thread_context.hh  
b/src/arch/arm/fastmodel/CortexR52/thread_context.hh

index eb12fee..7126a37 100644
--- a/src/arch/arm/fastmodel/CortexR52/thread_context.hh
+++ b/src/arch/arm/fastmodel/CortexR52/thread_context.hh
@@ -56,6 +56,7 @@
 bool translateAddress(Addr , Addr vaddr) override;

 void initFromIrisInstance(const ResourceMap ) override;
+void sendFunctional(PacketPtr pkt) override;

 // Since this CPU doesn't support aarch64, we override these two  
methods

 // and always assume we're 32 bit. More than likely we could be more

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icc824502faec5ac228003f0de7e9dbe26babe7ef
Gerrit-Change-Number: 52623
Gerrit-PatchSet: 2
Gerrit-Owner: Yu-hsin Wang 
Gerrit-Reviewer: Earl Ou 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: tests: Fix boot_kvm_fork_run.py

2021-11-10 Thread Bobby R. Bruce (Gerrit) via gem5-dev 
Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52663 )



Change subject: tests: Fix boot_kvm_fork_run.py
..

tests: Fix boot_kvm_fork_run.py

The patch
https://gem5-review.googlesource.com/c/public/gem5/+/51949
changed the way in which kernel arguments were passed to the
'set_kernel_disk_workload' function. The 'kernel_args' parameter
overrides the kernel arguments, not amends them as before. This test
script was not updated to take into account this functionality, and, as
such, the test failed. This patch fixes this.

Change-Id: I737c59329acde3a064f933bc4d31e20cf6ca55ae
---
M tests/gem5/configs/boot_kvm_fork_run.py
1 file changed, 20 insertions(+), 1 deletion(-)



diff --git a/tests/gem5/configs/boot_kvm_fork_run.py  
b/tests/gem5/configs/boot_kvm_fork_run.py

index 507acee..edbd26e 100644
--- a/tests/gem5/configs/boot_kvm_fork_run.py
+++ b/tests/gem5/configs/boot_kvm_fork_run.py
@@ -203,6 +203,8 @@

 motherboard.connect_things()

+kernal_args = motherboard.get_default_kernel_args() + [args.kernel_args]
+
 # Set the Full System workload.
 motherboard.set_kernel_disk_workload(
 kernel=Resource(
@@ -221,7 +223,7 @@
 m5 exit # exit in children and parent
 """
 ),
-kernel_args=[args.kernel_args]
+kernel_args=kernal_args
 )



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Gerrit-Change-Id: I737c59329acde3a064f933bc4d31e20cf6ca55ae
Gerrit-Change-Number: 52663
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby R. Bruce 
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[gem5-dev] Change in gem5/gem5[develop]: tests: Fix riscv boot exit tests

2021-11-10 Thread Bobby R. Bruce (Gerrit) via gem5-dev 
Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52644 )



Change subject: tests: Fix riscv boot exit tests
..

tests: Fix riscv boot exit tests

Due to this change:
https://gem5-review.googlesource.com/c/public/gem5/+/52089
full RISCV boot tests were added, which makes the "tick_exit" parameter
optional (left to 'None' if simulating a full boot). However, the
simulation function was not updated to not pass the "tick_exit"
parameter if not set. This cause an error. This patch fixes this.

Change-Id: I9c62a6a46d9334a2e9fbad2221b42a1ff4843a54
---
M tests/gem5/configs/riscv_boot_exit_run.py
1 file changed, 20 insertions(+), 1 deletion(-)



diff --git a/tests/gem5/configs/riscv_boot_exit_run.py  
b/tests/gem5/configs/riscv_boot_exit_run.py

index 4f0c49f..8add619 100644
--- a/tests/gem5/configs/riscv_boot_exit_run.py
+++ b/tests/gem5/configs/riscv_boot_exit_run.py
@@ -159,7 +159,10 @@

 m5.instantiate()

-exit_event = m5.simulate(args.tick_exit)
+if args.tick_exit:
+exit_event = m5.simulate(args.tick_exit)
+else:
+exit_event = m5.simulate()
 print(
 "Exiting @ tick {} because {}.".format(m5.curTick(),  
exit_event.getCause())

 )

--
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Gerrit-Change-Id: I9c62a6a46d9334a2e9fbad2221b42a1ff4843a54
Gerrit-Change-Number: 52644
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby R. Bruce 
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[gem5-dev] Change in gem5/gem5[develop]: tests: Remove 'override-download' flag from insttest

2021-11-10 Thread Bobby R. Bruce (Gerrit) via gem5-dev 
Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52643 )



Change subject: tests: Remove 'override-download' flag from insttest
..

tests: Remove 'override-download' flag from insttest

This flag was previously passed to the 'simple_binary_run.py' to
override downloads. However, since this patch:
https://gem5-review.googlesource.com/c/public/gem5/+/52086
we no longer use the flag. It appears in this patch the insttest test
was not updated and, as such, this test failed:
https://jenkins.gem5.org/job/nightly/38/

This, in part, will fix the nightly build.

Change-Id: I4fb5ab175c73687304c04fe426f81519d23574a7
---
M tests/gem5/insttest_se/test.py
1 file changed, 18 insertions(+), 1 deletion(-)



diff --git a/tests/gem5/insttest_se/test.py b/tests/gem5/insttest_se/test.py
index 0464a9e..25c8823 100644
--- a/tests/gem5/insttest_se/test.py
+++ b/tests/gem5/insttest_se/test.py
@@ -60,7 +60,6 @@
 config_args=[
 binary,
 cpu,
-"--override-download",
 "--resource-directory",
 resource_path,
 ],

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[gem5-dev] Build failed in Jenkins: nightly #38

2021-11-10 Thread jenkins-no-reply--- via gem5-dev 
See 

Changes:

[gabe.black] misc: Use python 3's argumentless super().

[Jason Lowe-Power] ext: Update pybind11 to v2.8.1

[Bobby R. Bruce] tests: Move MI_Example tests to Long/Nightly

[gabe.black] dev-arm: Ensure all fields of GicV2 are initialized.

[fcrh] arch-riscv: Add NMI support

[gabe.black] cpu-o3: Manually flatten the index for vector reg elements.


--
[...truncated 1.45 MB...]
[   OK ] SerializableFixture.SCSChangeCptOutSingle (0 ms)
[ RUN  ] SerializableFixture.SCSChangeCptOutMultiple
[   OK ] SerializableFixture.SCSChangeCptOutMultiple (1 ms)
[ RUN  ] SerializableFixture.SCSChangeCptOutLarge
[   OK ] SerializableFixture.SCSChangeCptOutLarge (0 ms)
[ RUN  ] SerializableFixture.SectionSerializationSimple
[   OK ] SerializableFixture.SectionSerializationSimple (0 ms)
[ RUN  ] SerializableFixture.ParamOutIn
[   OK ] SerializableFixture.ParamOutIn (0 ms)
[ RUN  ] SerializableFixture.ParamOutInMultipleSections
[   OK ] SerializableFixture.ParamOutInMultipleSections (1 ms)
[--] 6 tests from SerializableFixture (2 ms total)

[--] Global test environment tear-down
[==] 33 tests from 8 test suites ran. (161 ms total)
[  PASSED  ] 33 tests.

  YOU HAVE 1 DISABLED TEST

[   OK ] LoggingDeathTest.PanicLoggerExitHelper (151 ms)
[ RUN  ] LoggingDeathTest.ExitMessage
[   OK ] LoggingDeathTest.ExitMessage (150 ms)
[ RUN  ] LoggingDeathTest.Panic
[   OK ] LoggingDeathTest.Panic (150 ms)
[ RUN  ] LoggingDeathTest.Fatal
[   OK ] LoggingDeathTest.Fatal (3 ms)
[ RUN  ] LoggingDeathTest.PanicIf
[   OK ] LoggingDeathTest.PanicIf (153 ms)
[ RUN  ] LoggingDeathTest.FatalIf
[   OK ] LoggingDeathTest.FatalIf (2 ms)
[ RUN  ] LoggingDeathTest.gem5Assert
[  SKIPPED ] LoggingDeathTest.gem5Assert (1 ms)
[--] 13 tests from LoggingDeathTest (1223 ms total)

[--] 21 tests from LoggingFixture
[ RUN  ] LoggingFixture.BasicPrint
[   OK ] LoggingFixture.BasicPrint (0 ms)
[ RUN  ] LoggingFixture.VariadicCharPrint
[   OK ] LoggingFixture.VariadicCharPrint (0 ms)
[ RUN  ] LoggingFixture.VariadicStringPrint
[   OK ] LoggingFixture.VariadicStringPrint (0 ms)
[ RUN  ] LoggingFixture.VariadicCharMissingPrint
[   OK ] LoggingFixture.VariadicCharMissingPrint (0 ms)
[ RUN  ] LoggingFixture.VariadicStringMissingPrint
[   OK ] LoggingFixture.VariadicStringMissingPrint (0 ms)
[ RUN  ] LoggingFixture.DisabledPrint
[   OK ] LoggingFixture.DisabledPrint (0 ms)
[ RUN  ] LoggingFixture.WarnLoggerPrint
[   OK ] LoggingFixture.WarnLoggerPrint (0 ms)
[ RUN  ] LoggingFixture.InfoLoggerPrint
[   OK ] LoggingFixture.InfoLoggerPrint (0 ms)
[ RUN  ] LoggingFixture.HackLoggerPrint
[   OK ] LoggingFixture.HackLoggerPrint (0 ms)
[ RUN  ] LoggingFixture.FatalLoggerPrint
[   OK ] LoggingFixture.FatalLoggerPrint (0 ms)
[ RUN  ] LoggingFixture.PanicLoggerPrint
[   OK ] LoggingFixture.PanicLoggerPrint (0 ms)
[ RUN  ] LoggingFixture.BaseMessage
[   OK ] LoggingFixture.BaseMessage (0 ms)
[ RUN  ] LoggingFixture.BaseMessageOnce
[   OK ] LoggingFixture.BaseMessageOnce (0 ms)
[ RUN  ] LoggingFixture.Warn
[   OK ] LoggingFixture.Warn (0 ms)
[ RUN  ] LoggingFixture.Inform
[   OK ] LoggingFixture.Inform (0 ms)
[ RUN  ] LoggingFixture.Hack
[   OK ] LoggingFixture.Hack (0 ms)
[ RUN  ] LoggingFixture.WarnOnce
[   OK ] LoggingFixture.WarnOnce (0 ms)
[ RUN  ] LoggingFixture.InformOnce
[   OK ] LoggingFixture.InformOnce (0 ms)
[ RUN  ] LoggingFixture.HackOnce
[   OK ] LoggingFixture.HackOnce (0 ms)
[ RUN  ] LoggingFixture.WarnIf
[   OK ] LoggingFixture.WarnIf (0 ms)
[ RUN  ] LoggingFixture.WarnIfOnce
[   OK ] LoggingFixture.WarnIfOnce (0 ms)
[--] 21 tests from LoggingFixture (0 ms total)

[--] Global test environment tear-down
[==] 34 tests from 2 test suites ran. (1223 ms total)
[  PASSED  ] 32 tests.
[  SKIPPED ] 2 tests, listed below:
[  SKIPPED ] LoggingDeathTest.EmptyPrefix
[  SKIPPED ] LoggingDeathTest.gem5Assert
scons: done building targets.
*** Summary of Warnings ***
Warning: Deprecated namespaces are not supported by this compiler.
 Please make sure to check the mailing list for deprecation
 announcements.
+ docker run -u 118: --volume 
/nobackup/jenkins/workspace/nightly/tests/..:/nobackup/jenkins/workspace/nightly/tests/..
 -w /nobackup/jenkins/workspace/nightly/tests/../tests --rm 
gcr.io/gem5-test/ubuntu-20.04_all-dependencies ./main.py run --length long -j16 
-t16
Running the new gem5 testing script.
For more information see TESTING.md.
To see details as the testing scripts are running, use the option -v, -vv, or 
-vvv

Loading Tests

[gem5-dev] Change in gem5/gem5[develop]: configs: Replace connectAllPorts with connectCachedPorts

2021-11-10 Thread Giacomo Travaglini (Gerrit) via gem5-dev 
Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52583 )


Change subject: configs: Replace connectAllPorts with connectCachedPorts
..

configs: Replace connectAllPorts with connectCachedPorts

Uncached ports are not used in Arm configs (X86 only [1])

[1]: https://github.com/gem5/gem5/blob/stable/src/cpu/BaseCPU.py#L181

Change-Id: I0f71f605ef73d9adc418414c891569bc475b2587
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52583
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M configs/example/arm/devices.py
1 file changed, 20 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py
index f729fb5..788c268 100644
--- a/configs/example/arm/devices.py
+++ b/configs/example/arm/devices.py
@@ -150,7 +150,7 @@
 self.toL2Bus = L2XBar(width=64, clk_domain=clk_domain)
 self.l2 = self._l2_type()
 for cpu in self.cpus:
-cpu.connectAllPorts(self.toL2Bus)
+cpu.connectCachedPorts(self.toL2Bus)
 self.toL2Bus.mem_side_ports = self.l2.cpu_side

 def addPMUs(self, ints, events=[]):
@@ -184,7 +184,7 @@
 self.l2.mem_side = bus.cpu_side_ports
 except AttributeError:
 for cpu in self.cpus:
-cpu.connectAllPorts(bus)
+cpu.connectCachedPorts(bus)


 class AtomicCluster(CpuCluster):

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0f71f605ef73d9adc418414c891569bc475b2587
Gerrit-Change-Number: 52583
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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