changeset 00965520c9f5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=00965520c9f5
description:
mem: Fix event scheduling issue for prefetches
The cache's MemSidePacketQueue schedules a sendEvent based upon
nextMSHRReadyTime() which is the time when the next MSHR is ready or
whenever
a future prefetch is ready. However, a prefetch being ready does not
guarentee
that it can obtain an MSHR. So, when all MSHRs are full,
the simulation ends up unnecessiciarly scheduling a sendEvent every
picosecond
until an MSHR is finally freed and the prefetch can happen.
This patch fixes this by not signaling the prefetch ready time if the
prefetch
could not be generated. The event is rescheduled as soon as a MSHR
becomes
available.
diffstat:
src/mem/cache/cache_impl.hh | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
diffs (30 lines):
diff -r 97aa1ee1c2d9 -r 00965520c9f5 src/mem/cache/cache_impl.hh
--- a/src/mem/cache/cache_impl.hh Tue Dec 23 09:31:18 2014 -0500
+++ b/src/mem/cache/cache_impl.hh Tue Dec 23 09:31:18 2014 -0500
@@ -1197,6 +1197,15 @@
if (wasFull && !mq->isFull()) {
clearBlocked((BlockedCause)mq->index);
}
+
+ // Request the bus for a prefetch if this deallocation freed enough
+ // MSHRs for a prefetch to take place
+ if (prefetcher && mq == &mshrQueue && mshrQueue.canPrefetch()) {
+ Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(),
+ curTick());
+ if (next_pf_time != MaxTick)
+ requestMemSideBus(Request_PF, next_pf_time);
+ }
}
// copy writebacks to write buffer
@@ -1955,7 +1964,9 @@
Tick nextReady = std::min(mshrQueue.nextMSHRReadyTime(),
writeBuffer.nextMSHRReadyTime());
- if (prefetcher) {
+ // Don't signal prefetch ready time if no MSHRs available
+ // Will signal once enoguh MSHRs are deallocated
+ if (prefetcher && mshrQueue.canPrefetch()) {
nextReady = std::min(nextReady,
prefetcher->nextPrefetchReadyTime());
}
_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev
