[m5-dev] Undelivered Mail Returned to Sender

2009-01-25 Thread Mail Delivery System
This is the mail system at host daystrom.m5sim.org. I'm sorry to have to inform you that your message could not be delivered to one or more recipients. It's attached below. For further assistance, please send mail to postmaster. If you do so, please include this problem report. You can delete

Re: [m5-dev] debugging user level code in FS

2009-01-25 Thread Gabe Black
I figured part of this out (objdump is my new best friend), but I ran into another mystery. The problem I'm trying to diagnose is that the init process gets a segfault at some point as it comes up because it jumps to a totally bizarre and meaningless pc. The dynamic linker has finished

Re: [m5-dev] debugging user level code in FS

2009-01-25 Thread Gabe Black
I figured out what's going on. This is a glibc security measure where they scramble pointers people might try to maliciously tamper with. If you change the pointer, you (supposedly) can't easily tell what you're changing it too. The problem here is that the pointer it's unscrambling is just a

Re: [m5-dev] Cron m5t...@zizzer /z/m5/regression/do-regression --scratch all

2009-01-25 Thread Ali Saidi
I figured this out The inotify extension in mercurial was enabled by default with mercurial 1.1. It uses OS specific notification systems to get information about when files changed rather than just checking always. This was causing an issue because inotify would be running in the .hg

Re: [m5-dev] debugging user level code in FS

2009-01-25 Thread Clint Smullen
Is it part of ASR (address-space randomization)? If so, then it couldn't be used in static linking, which would explain the discrepancy. On Jan 25, 2009, at 4:21 AM, Gabe Black wrote: I figured out what's going on. This is a glibc security measure where they scramble pointers people might

Re: [m5-dev] debugging user level code in FS

2009-01-25 Thread Gabe Black
That was what I had thought at one point but it doesn't randomize the address, it makes it totally invalid. The end result is actually in a class of illegal addresses as defined by the architecture. I found a comment having to do with it where they said they encrypted (their quote marks) the

[m5-dev] Undelivered Mail Returned to Sender

2009-01-25 Thread Mail Delivery System
This is the mail system at host daystrom.m5sim.org. I'm sorry to have to inform you that your message could not be delivered to one or more recipients. It's attached below. For further assistance, please send mail to postmaster. If you do so, please include this problem report. You can delete

Re: [m5-dev] build failure in head

2009-01-25 Thread nathan binkert
If a class has *any* virtual functions, it should have a virtual destructor because the assumption is that you will use the class polymorphically and you might delete the class with a pointer to the base class. Nate On Sun, Jan 25, 2009 at 7:52 PM, Ali Saidi sa...@umich.edu wrote: Gabe, I

Re: [m5-dev] build failure in head

2009-01-25 Thread Gabe Black
I'll just make the destructor virtual then. I can't imagine that would break anything. Gabe nathan binkert wrote: If a class has *any* virtual functions, it should have a virtual destructor because the assumption is that you will use the class polymorphically and you might delete the class

[m5-dev] changeset in m5: CPU: Add a setCPU function to the interrupt obj...

2009-01-25 Thread Gabe Black
changeset 606de5b3d116 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=606de5b3d116 description: CPU: Add a setCPU function to the interrupt objects. diffstat: 4 files changed, 30 insertions(+), 3 deletions(-) src/arch/alpha/interrupts.hh |9 -

[m5-dev] changeset in m5: X86: Make the interrupt object wake up the CPU ...

2009-01-25 Thread Gabe Black
changeset 219a39f70082 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=219a39f70082 description: X86: Make the interrupt object wake up the CPU when something becomes pending. diffstat: 1 file changed, 1 insertion(+) src/arch/x86/interrupts.cc |1 + diffs (11

[m5-dev] changeset in m5: X86: Implement the bswap instruction.

2009-01-25 Thread Gabe Black
changeset a9e8668557bf in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=a9e8668557bf description: X86: Implement the bswap instruction. diffstat: 2 files changed, 24 insertions(+), 2 deletions(-) src/arch/x86/isa/decoder/two_byte_opcodes.isa

[m5-dev] changeset in m5: X86: Add fake devices for non-existant serial p...

2009-01-25 Thread Gabe Black
changeset b35d43e2e303 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=b35d43e2e303 description: X86: Add fake devices for non-existant serial ports. diffstat: 1 file changed, 8 insertions(+) src/dev/x86/Pc.py |8 diffs (23 lines): diff -r 18ed7aa8e8e1 -r

[m5-dev] changeset in m5: Dev: Make the RTC device ignore writes to a rea...

2009-01-25 Thread Gabe Black
changeset 624566640d7c in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=624566640d7c description: Dev: Make the RTC device ignore writes to a read only bit. diffstat: 1 file changed, 4 insertions(+), 2 deletions(-) src/dev/mc146818.cc |6 -- diffs (24 lines):

[m5-dev] changeset in m5: X86: Add a device to back the non-existant flop...

2009-01-25 Thread Gabe Black
changeset b6d0cab9890a in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=b6d0cab9890a description: X86: Add a device to back the non-existant floppy drive controller. diffstat: 1 file changed, 4 insertions(+) src/dev/x86/Pc.py |4 diffs (21 lines): diff -r

[m5-dev] changeset in m5: X86: Prevent Linux for probing for non-existant...

2009-01-25 Thread Gabe Black
changeset f4a1bcc3b7bc in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=f4a1bcc3b7bc description: X86: Prevent Linux for probing for non-existant IDE controllers. diffstat: 1 file changed, 4 insertions(+), 2 deletions(-) configs/common/FSConfig.py |6 -- diffs