[m5-dev] Cron m5t...@zizzer /z/m5/regression/do-regression quick

* build/ARM_SE/tests/fast/quick/00.hello/arm/linux/simple-atomic passed. * build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing passed. * build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing-ruby passed. *

[m5-dev] changeset in m5: ARM: Make sure the target process doesn't run a...

changeset fbc8d1e996d9 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=fbc8d1e996d9 description: ARM: Make sure the target process doesn't run away from statetrace. diffstat: 2 files changed, 25 insertions(+), 14 deletions(-) src/arch/arm/nativetrace.cc|

[m5-dev] changeset in m5: Simple CPU: Make the simple CPU handle the IntR...

changeset 4836ec6b73a1 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=4836ec6b73a1 description: Simple CPU: Make the simple CPU handle the IntRegs trace flag. diffstat: 1 file changed, 4 insertions(+), 1 deletion(-) src/cpu/simple_thread.hh |5 - diffs (22

[m5-dev] changeset in m5: ARM: Make the ARM native tracer stop M5 if cont...

changeset 2192dac4ad82 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=2192dac4ad82 description: ARM: Make the ARM native tracer stop M5 if control diverges. If the control flow of M5's executable and statetrace's target process get out of sync even a

[m5-dev] changeset in m5: ARM: Get rid of a stray line in the set_tls han...

changeset 7d0e7547be5e in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=7d0e7547be5e description: ARM: Get rid of a stray line in the set_tls handler. diffstat: 1 file changed, 1 deletion(-) src/arch/arm/linux/process.cc |1 - diffs (11 lines): diff -r 2192dac4ad82

[m5-dev] changeset in m5: ARM: Fix an instruction in the cmpxchg kernel p...

changeset 1aa0b4673699 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=1aa0b4673699 description: ARM: Fix an instruction in the cmpxchg kernel provided routine. The instruction was encoded as a load instead of the intended store. diffstat: 1 file changed, 1

[m5-dev] changeset in m5: Statetrace: Make sure the current state is load...

changeset b35ef789e6f6 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=b35ef789e6f6 description: Statetrace: Make sure the current state is loaded to print the initial stack frame. The early call to child-step() was removed earlier because it confused the

[m5-dev] MIPS_SE compile error

Hello not sure if this is the proper place to send packages, but here it goes currently building for MIPS_SE fails. It looks like a = instead of a == error, but the code is pretty dense so I can't tell if it's trying to be overly clever. patch attached below. Vince diff -r b35ef789e6f6

[m5-dev] SPARC_SE hook up a few more syscalls

Hello I'm trying to run gcc from spec2k under SPARC_SE and ran into a few unimplemented syscalls. Attached is a patch that enables getrlimit and getrusage and sets setrlimit to be ignored. The code is modeled on the Alpha code and seems to work. gcc.spec2k still doesn't work though. On

[m5-dev] repository access

As we're adding users, we decided that it is a pain to give everyone a shell account on daystrom, so we're switching to the shared ssh mechanism of access control for committing to the repository. We're doing this for several reasons: 1) ease of management 2) much more secure 3) easier user