Re: [m5-dev] changeset in m5: Fix setting of INST_FETCH flag for O3 CPU.

2009-08-02 Thread nathan binkert
Also, I think with this flag in place we ought to be able to get rid of the tlb_mode setting; the TLB can just look and see whether isInstFetch() is true to decide how to handle the request... does anyone agree or disagree? Well, mode is read/write/execute. You're proposing figuring just

[m5-dev] changeset in m5: Fix setting of INST_FETCH flag for O3 CPU.

2009-08-01 Thread Steve Reinhardt
changeset 7ed8937e375a in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=7ed8937e375a description: Fix setting of INST_FETCH flag for O3 CPU. It's still broken in inorder. Also enhance DPRINTFs in cache and physical memory so we can see more easily

Re: [m5-dev] changeset in m5: Fix setting of INST_FETCH flag for O3 CPU.

2009-08-01 Thread Steve Reinhardt
Korey: I was going to fix this in inorder too, but there are two places where Request objects are allocated (tlb_unit.hh and cache_unit.cc) and I wasn't sure why there were two, if both needed to be fixed, or what. Also, I think with this flag in place we ought to be able to get rid of the