[m5-dev] Cron m5t...@zizzer /z/m5/regression/do-regression quick

2009-03-20 Thread Cron Daemon
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/o3-timing passed. * build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/simple-atomic passed. * build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/simple-timing passed. *

Re: [m5-dev] calling hypervisor

2009-03-20 Thread Ali Saidi
The changes should only affect the portions of the system that the hypervisor is calling. There shouldn't be any changes required within the hypervisor code. Ali On Mar 19, 2009, at 1:22 PM, Polina Dudnik wrote: Hi, So, to make sparc_fs work Ali and later I swizzled the processor

Re: [m5-dev] thread context status

2009-03-20 Thread Ali Saidi
On Mar 17, 2009, at 3:10 PM, Steve Reinhardt wrote: 2009/3/17 Korey Sewell ksew...@umich.edu: I'd go with Active, Suspended, and Unallocated. In my interpretation, the threads start in Suspended state because that meant that you've allocated registers for that thread but it currently

Re: [m5-dev] calling hypervisor

2009-03-20 Thread Ali Saidi
Yea, that makes sense. You should probably look at the TLBs (that is where a lot of the miscellaneous system registers live). The confusion probably comes from reading one of those and the ids not being swizzeled, or perhaps there is an interrupt message with a CPU id or something as well.

Re: [m5-dev] calling hypervisor

2009-03-20 Thread Polina Dudnik
On Fri, Mar 20, 2009 at 1:11 PM, Ali Saidi sa...@umich.edu wrote: Yea, that makes sense. You should probably look at the TLBs (that is where a lot of the miscellaneous system registers live). The confusion probably comes from reading one of those and the ids not being swizzeled, or perhaps

Re: [m5-dev] calling hypervisor

2009-03-20 Thread Polina Dudnik
Regarding running one processor with two threads, now that I think about it, OpenSparc definitely assigns thread numbers and not processor numbers in hardware description file. Niagara does not have 32 processors, but can have 32 threads. So, by assigning thread numbers to be 0 and 4, it ensures

Re: [m5-dev] calling hypervisor

2009-03-20 Thread Polina Dudnik
Ali, Just to be clear: do or you do not simulate multithreading? There are two options that I can imagine: 1. When I pass -n 2 there are two multithreaded processors, each of which has four thread contexts. In that case, seeing the ipi for cpu_id 4 is completely right, because the ipi's come in

Re: [m5-dev] calling hypervisor

2009-03-20 Thread Steve Reinhardt
By default, we do not simulate multithreading. The SimpleCPU models are single-threaded. The O3 model does have SMT capability, but it's not enabled by default, and I'm not sure it's ever been used in FS mode so there may well be bugs there. Steve 2009/3/20 Polina Dudnik pdud...@gmail.com: