Hi all,
So now I've posted my PowerPC ISA patches, I'm trying to get it all
working with O3CPU :-). I've come up against a difficulty right away. The
processor is deadlocked because a branch instruction at the head of the
ROB isn't marked as ready to execute. This is because it depends on a
In PowerPC, a lot of branches depend on a miscreg (the control register,
possibly also the count register) so this could be a problem for me.
A question would be: is it reasonable to consider the misc. registers that
you are referring to in PowerPC as integer registers? For example, in MIPS
I don't know where this happens, but I second Korey's suggestion. The
O3 cpu doesn't speculate around misc registers, so if you want to be
able to speculate at all with an ISA that has a condition code or
other such register, renaming it (or part of it) as an integer
register is normally
I agree with both Ali and Korey that MiscRegs that don't actually
control anything and just pass around data (like condition codes)
should be honorary integer registers. There are a number of examples
of this, some of which are in SPARC specifically.
One issue, though, is that by my
