[gem5-dev] Change in gem5/gem5[develop]: mem: Re-remove the arch/isa_traits.hh include in the base prefetcher.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34166 ) Change subject: mem: Re-remove the arch/isa_traits.hh include in the base prefetcher. .. mem: Re-remove the

[gem5-dev] Re: Use of page size and TLBs in the prefetchers

2020-09-07 Thread Isaac Sánchez Barrera via gem5-dev
Hi, I'm not using Ruby, so just talking about classic. Before the code included support for the TLBs, the prefetchers used the page size to detect page-crossing prefetches in order to discard them. Now it uses that to decide if it can do a direct prefetch or it needs to check the TLB for a

[gem5-dev] Re: Use of page size and TLBs in the prefetchers

2020-09-07 Thread Gabe Black via gem5-dev
Actually that's not *quite* the end for isa_traits.hh since the system class uses the PageBytes and PageShift internally to allocate physical memory. It's still very close though. Gabe On Mon, Sep 7, 2020 at 1:06 AM Gabe Black wrote: > Hi folks. I've *almost* eliminated use of the getPageBytes

[gem5-dev] ChunkGenerator granularity, interface

2020-09-07 Thread Gabe Black via gem5-dev
Hi folks. In gem5, there is a simple but useful utility class called the ChunkGenerator which takes a region of memory and a size, and breaks the region into chunks which are broken on that size aligned boundaries. So for instance, if you wanted to translate every page that some big array was

[gem5-dev] Change in gem5/gem5[develop]: null,sim: Add name() to the dummy CPU and remove two #if THE_ISAs.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34168 ) Change subject: null,sim: Add name() to the dummy CPU and remove two #if THE_ISAs. .. null,sim: Add name() to

[gem5-dev] Use of page size and TLBs in the prefetchers

2020-09-07 Thread Gabe Black via gem5-dev
Hi folks. I've *almost* eliminated use of the getPageBytes and getPageShift functions in the System class, which in combination with a change from Andreas will eliminate the need for the isa_traits.hh switching header file. The only use left is in the Ruby and cache prefetchers:

[gem5-dev] Change in gem5/gem5[develop]: arch: Move many of the generic files outside an NULL guard.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34169 ) Change subject: arch: Move many of the generic files outside an NULL guard. .. arch: Move many of the generic

[gem5-dev] Change in gem5/gem5[develop]: sparc,sim: Remove special handling of SPARC in the clone system call.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34167 ) Change subject: sparc,sim: Remove special handling of SPARC in the clone system call. .. sparc,sim: Remove

[gem5-dev] Change in gem5/gem5[develop]: python: Add the ability to check if a debug flag has been enabled

2020-09-07 Thread Andreas Sandberg (Gerrit) via gem5-dev
Andreas Sandberg has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34119 ) Change subject: python: Add the ability to check if a debug flag has been enabled .. python: Add the ability to

[gem5-dev] Change in gem5/gem5[develop]: base: Cleanup debug flags API

2020-09-07 Thread Andreas Sandberg (Gerrit) via gem5-dev
Andreas Sandberg has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34118 ) Change subject: base: Cleanup debug flags API .. base: Cleanup debug flags API The debug flags API has a couple of

[gem5-dev] Change in gem5/gem5[develop]: base: Cleanup Debug::CompoundFlag

2020-09-07 Thread Andreas Sandberg (Gerrit) via gem5-dev
Andreas Sandberg has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34115 ) Change subject: base: Cleanup Debug::CompoundFlag .. base: Cleanup Debug::CompoundFlag Compound flags are currently

[gem5-dev] Change in gem5/gem5[develop]: base: Remove unused Debug::All flag

2020-09-07 Thread Andreas Sandberg (Gerrit) via gem5-dev
Andreas Sandberg has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34117 ) Change subject: base: Remove unused Debug::All flag .. base: Remove unused Debug::All flag The Debug::All flag

[gem5-dev] Change in gem5/gem5[develop]: python: Remove unused debug APIs

2020-09-07 Thread Andreas Sandberg (Gerrit) via gem5-dev
Andreas Sandberg has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34120 ) Change subject: python: Remove unused debug APIs .. python: Remove unused debug APIs The following APIs are not

[gem5-dev] Change in gem5/gem5[develop]: scons: Simplify arch enum generation

2020-09-07 Thread Andreas Sandberg (Gerrit) via gem5-dev
Andreas Sandberg has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34116 ) Change subject: scons: Simplify arch enum generation .. scons: Simplify arch enum generation C++ allows a trailing

[gem5-dev] Change in gem5/gem5[develop]: mem: Add HTM fields to Request

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30316 ) Change subject: mem: Add HTM fields to Request .. mem: Add HTM fields to Request This starts the support of

[gem5-dev] Change in gem5/gem5[develop]: base: Minor cleanup of the ChunkGenerator.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34177 ) Change subject: base: Minor cleanup of the ChunkGenerator. .. base: Minor cleanup of the ChunkGenerator. Minor

[gem5-dev] Change in gem5/gem5[develop]: dev: Stop using the OS page size in the IDE controller.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34178 ) Change subject: dev: Stop using the OS page size in the IDE controller. .. dev: Stop using the OS page size in

[gem5-dev] Change in gem5/gem5[develop]: arch: Report the page size from the TLB.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34175 ) Change subject: arch: Report the page size from the TLB. .. arch: Report the page size from the TLB. The TLB

[gem5-dev] Change in gem5/gem5[develop]: gpu: Use X86ISA instead of TheISA in compute_unit.cc.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34174 ) Change subject: gpu: Use X86ISA instead of TheISA in compute_unit.cc. .. gpu: Use X86ISA instead of TheISA in

[gem5-dev] Change in gem5/gem5[develop]: mem: Use the page size from the TLB in the translating port proxy.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34176 ) Change subject: mem: Use the page size from the TLB in the translating port proxy. .. mem: Use the page size

[gem5-dev] Change in gem5/gem5[develop]: arm: Replicate the PageBytes constant in the ArmSystem class.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34170 ) Change subject: arm: Replicate the PageBytes constant in the ArmSystem class. .. arm: Replicate the PageBytes

[gem5-dev] Change in gem5/gem5[develop]: gpu: Stop using TheISA in the GPU TLB.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34173 ) Change subject: gpu: Stop using TheISA in the GPU TLB. .. gpu: Stop using TheISA in the GPU TLB. This class is

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM Instruction Flags

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30321 ) Change subject: cpu: Add HTM Instruction Flags .. cpu: Add HTM Instruction Flags IsHtmStart: Starts a HTM

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM CPU API

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30322 ) Change subject: cpu: Add HTM CPU API .. cpu: Add HTM CPU API JIRA: https://gem5.atlassian.net/browse/GEM5-587

[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HtmCpu DebugFlag

2020-09-07 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/30320 ) Change subject: cpu: Add HtmCpu DebugFlag .. cpu: Add HtmCpu DebugFlag JIRA:

[gem5-dev] Change in gem5/gem5[develop]: dev,arm: Use the ArmSystem::PageBytes constant in the generic timer.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34171 ) Change subject: dev,arm: Use the ArmSystem::PageBytes constant in the generic timer. .. dev,arm: Use the

[gem5-dev] Change in gem5/gem5[develop]: mem,sim: Get the page size from the page table in SE mode.

2020-09-07 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34172 ) Change subject: mem,sim: Get the page size from the page table in SE mode. .. mem,sim: Get the page size from the

[gem5-dev] Re: Use of page size and TLBs in the prefetchers

2020-09-07 Thread Nikos Nikoleris via gem5-dev
Hi Gabe, I agree with Isaac, some prefetchers use the page size to avoid crossing page boundaries. These are prefetchers operate on the PA space and have no access to the TLB to avoid the extra complexity or because they are far from the core (e.g., L3 prefetcher). Some other prefetchers