Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/25303 )
Change subject: cpu: Counting instructions & ops with stats
......................................................................
cpu: Counting instructions & ops with stats
The global sim_ops and sim_insts stats, counting the global number of
executed instruction and ops are relying on the totalInsts, totalOps cpu
methods.
Every cpu model implements them in a fairly similar way: looping over
every thread, accumulating the number of insts/ops, and returning the
final value.
For an unknown reason the underlying thread class is keeping two
versions of the stat: one is the real stat, and the other one is a
counter which gets increased together with the real stat:
/** Number of instructions committed. */
Counter numInst;
/** Stat for number instructions committed. */
Stats::Scalar numInsts;
/** Number of ops (including micro ops) committed. */
Counter numOp;
/** Stat for number ops (including micro ops) committed. */
Stats::Scalar numOps;
One could think this is only a redundancy problem, however the fact that the
totalInsts makes use of the NON-stat (Counter) variable creates a lot of
confusion.
In fact resetting stats during simulation will only affect the real
stat. A following stat dump, by calling totalInst, will produce a
sim_insts/sim_ops from the unreset value; in other words, sim_insts
and sim_ops won't be reset.
This patch is fixing this by making the totalInsts/totalOps use the
Stat version (numInsts and numOps)
Change-Id: I03b1b3452e818c0ee26f015ffb21fdbcf7185a7c
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
---
M src/cpu/minor/cpu.cc
M src/cpu/o3/cpu.cc
M src/cpu/simple/base.cc
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/cpu/minor/cpu.cc b/src/cpu/minor/cpu.cc
index 5edc570..a1c07e8 100644
--- a/src/cpu/minor/cpu.cc
+++ b/src/cpu/minor/cpu.cc
@@ -328,7 +328,7 @@
Counter ret = 0;
for (auto i = threads.begin(); i != threads.end(); i ++)
- ret += (*i)->numInst;
+ ret += (*i)->numInsts.value();
return ret;
}
@@ -339,7 +339,7 @@
Counter ret = 0;
for (auto i = threads.begin(); i != threads.end(); i ++)
- ret += (*i)->numOp;
+ ret += (*i)->numOps.value();
return ret;
}
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index e4f1c04..ad13799 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -668,7 +668,7 @@
ThreadID size = thread.size();
for (ThreadID i = 0; i < size; i++)
- total += thread[i]->numInst;
+ total += thread[i]->numInsts.value();
return total;
}
@@ -681,7 +681,7 @@
ThreadID size = thread.size();
for (ThreadID i = 0; i < size; i++)
- total += thread[i]->numOp;
+ total += thread[i]->numOps.value();
return total;
}
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 06dd773..f27c115 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -182,7 +182,7 @@
{
Counter total_inst = 0;
for (auto& t_info : threadInfo) {
- total_inst += t_info->numInst;
+ total_inst += t_info->numInsts.value();
}
return total_inst;
@@ -193,7 +193,7 @@
{
Counter total_op = 0;
for (auto& t_info : threadInfo) {
- total_op += t_info->numOp;
+ total_op += t_info->numOps.value();
}
return total_op;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I03b1b3452e818c0ee26f015ffb21fdbcf7185a7c
Gerrit-Change-Number: 25303
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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