Re: [gem5-dev] Review Request 3668: riscv: [Patch 6/5] Improve Linux emulation for RISC-V
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3668/#review9012 --- Ship it! Ship It! - Jason Lowe-Power On Oct. 21, 2016, 6:33 p.m., Alec Roelke wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3668/ > --- > > (Updated Oct. 21, 2016, 6:33 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11693:ac593e3451c7 > --- > riscv: [Patch 6/5] Improve Linux emulation for RISC-V > > This is an add-on patch for the original series that implemented RISC-V > that improves the implementation of Linux emulation for SE mode. Basically > it cleans up linux/linux.hh by removing constants that haven't been > defined for the RISC-V Linux proxy kernel and rearranging the stat > struct so it aligns with RISC-V's implementation of it. It also adds > placeholders for system calls that have been given numbers in RISC-V > but haven't been given implementations yet. These system calls are > as follows: > - readlinkat > - sigprocmask > - ioctl > - clock_gettime > - getrusage > - getrlimit > - setrlimit > > The first five patches implemented RISC-V with the base ISA and multiply, > floating point, and atomic extensions and added support for detailed > CPU models with memory timing. > > [Fixed incompatibility with changes made from patch 1.] > Signed-off by: Alec Roelke > > > Diffs > - > > src/arch/riscv/linux/linux.hh PRE-CREATION > src/arch/riscv/linux/process.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/3668/diff/ > > > Testing > --- > > > Thanks, > > Alec Roelke > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 3668: riscv: [Patch 6/5] Improve Linux emulation for RISC-V
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3668/ --- (Updated Oct. 21, 2016, 6:33 p.m.) Review request for Default. Repository: gem5 Description (updated) --- Changeset 11693:ac593e3451c7 --- riscv: [Patch 6/5] Improve Linux emulation for RISC-V This is an add-on patch for the original series that implemented RISC-V that improves the implementation of Linux emulation for SE mode. Basically it cleans up linux/linux.hh by removing constants that haven't been defined for the RISC-V Linux proxy kernel and rearranging the stat struct so it aligns with RISC-V's implementation of it. It also adds placeholders for system calls that have been given numbers in RISC-V but haven't been given implementations yet. These system calls are as follows: - readlinkat - sigprocmask - ioctl - clock_gettime - getrusage - getrlimit - setrlimit The first five patches implemented RISC-V with the base ISA and multiply, floating point, and atomic extensions and added support for detailed CPU models with memory timing. [Fixed incompatibility with changes made from patch 1.] Signed-off by: Alec Roelke Diffs (updated) - src/arch/riscv/linux/linux.hh PRE-CREATION src/arch/riscv/linux/process.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3668/diff/ Testing --- Thanks, Alec Roelke ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Review Request 3668: riscv: [Patch 6/5] Improve Linux emulation for RISC-V
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3668/ --- Review request for Default. Repository: gem5 Description --- Changeset 11660:61bbdcf4217d --- riscv: [Patch 6/5] Improve Linux emulation for RISC-V This is an add-on patch for the original series that implemented RISC-V that improves the implementation of Linux emulation for SE mode. Basically it cleans up linux/linux.hh by removing constants that haven't been defined for the RISC-V Linux proxy kernel and rearranging the stat struct so it aligns with RISC-V's implementation of it. It also adds placeholders for system calls that have been given numbers in RISC-V but haven't been given implementations yet. These system calls are as follows: - readlinkat - sigprocmask - ioctl - clock_gettime - getrusage - getrlimit - setrlimit The first five patches implemented RISC-V with the base ISA and multiply, floating point, and atomic extensions and added support for detailed CPU models with memory timing. Signed-off by: Alec Roelke Diffs - src/arch/riscv/linux/process.cc PRE-CREATION src/arch/riscv/linux/linux.hh PRE-CREATION Diff: http://reviews.gem5.org/r/3668/diff/ Testing --- Thanks, Alec Roelke ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
