[gem5-users] Re: How to use the new libm5.a

Hi Wenqi. You do still need to call map_m5_mem(), but as you found, now that there isn't one baked in call mechanism in the library you need to call the version of the function that will use the invocation mechanism you need. The header doesn't have declarations for them all, but if you declare

[gem5-users] Re: Configure multi-bank cache in ruby ​mode with MESI coherence protocol

Hello, For (1), yes. You can set this *in the python configuration file*. You should not modify the SimObject description file to change a default parameter. For (2), yes, that's exactly where you should modify. Cheers, Jason On Wed, Oct 28, 2020 at 9:47 AM zhen bang via gem5-users <

[gem5-users] Re: SE Mode and Std::thread

Looks like this is related to this change: https://gem5-review.googlesource.com/c/public/gem5/+/8184 I'm a bit behind develop because of custom changes and don't have this patch merged yet. Cherry picking this might work, but merging would probably be the best solution, if time consuming.

[gem5-users] Re: Implementing Cache Replacement Policies

Hello, A few years ago I have implemented a few PC-reliant RPs for fun, but did not merge them upstream because I did not have time to fully test them. One day they shall see the light of day, though :) I don't remember what is required for the PC change in particular, but here are the changes

[gem5-users] Re: How to use the new libm5.a

Hi Hoa, Gabe, Thanks for your help! But just want to confirm this: what I did in the past is calling map_m5_mem() in my code first and then call specific m5 functions, and it seems to work. The guest in running on KvmCPU. When I am trying to do the same thing with the new libm5.a, it gave an

[gem5-users] Re: How to use the new libm5.a

Hi Ciro, I don’t think things changed and your method should still work. However, my use case is a bit different as I need to call m5 ops when my guest is running on KVM cpu. My understanding is in virtual environment the magic Inst won’t work (I tested and it gave me Illegal Instruction

[gem5-users] Re: Configure multi-bank cache in ruby ​mode with MESI coherence protocol

Hello Jason: I would use the resource stalls to model banking, I have read src/mem/ruby/structures/Rubycache.py and src/mem/ruby/structures/BankedArray.cc (1) I have seen dataArrayBanks = Param.Int(1, "Number of banks for the data array") tagArrayBanks = Param.Int(1, "Number of banks for the

[gem5-users] Re: Implementing Cache Replacement Policies

Hi, I think you should check already implemented policies in src/mem/cache/replacement_policies and then design yours taking that as an template/example. In order to get information which you mentioned, you might have to change/add arguments to accessBlock, findBlock, insertBlock, etc function

[gem5-users] Implementing Cache Replacement Policies

Hi, I'm trying to evaluate a cache replacement policy with classic memory in SE mode. A few questions: 1. The policy requires PC, address, and access type (demand read/writeback/prefetch) to be made visible. However, I don't see these exposed to the replacement policies. Where may I find

[gem5-users] Re: Multi-level TLB is implemented in performance

Yes, this is possible, and I believe it's already implemented for Arm. The best place to start is src/arch//tlb.cc Cheers, Jason On Wed, Oct 28, 2020 at 1:27 AM Laney Laney via gem5-users < gem5-users@gem5.org> wrote: > Hi,all. I would like to know if it is possible to implement multi-level >

[gem5-users] Multi-level TLB is implemented in performance

Hi,all. I would like to know if it is possible to implement multi-level TLB on gem5 performance by modeling the latency of TLB. If so, which files or functions should I start with? ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send