[gem5-users] Re: Why it has to specify one more CPU for gem5 to run a multi-thread program in SE mode when using RUBY caches?

The program from “https://www.gem5.org/documentation/learning_gem5/part3/running/“ saying that “(note: as of this writing there is a bug in gem5 preventing this code from executing).” Is this bug exists in every multi-thread program running in gem5 with Ruby? Does anyone know what the bug is?

[gem5-users] Why it has to specify one more CPU for gem5 to run a multi-thread program in SE mode when using RUBY caches?

Hi guys, My gem5 version is the newest v21.0. I build gem5 with command “scons build/X86_MSI/gem5.debug --default=X86 PROTOCOL=MESI_Three_Level SLICC_HTML=True” And I write a simple multi-thread program. #define THREAD 16 uint64_t sharei[8*THREAD]; //1 cachelines each thread void work(void*

[gem5-users] does KVMCPU be supported on aarch64 in SE mode?

Hi All: I would like to use KVMCPU in SE mode on aarch64 so that I can use -fast-forward more quickly to fastforward non-interested instrutions, but I have seen that "fatal("KvmCPU can only be used in SE mode with x86")" in se.py, so any plans to support it on aarch64?

[gem5-users] ruby_mem_test

I am trying to run the example ruby_mem_test config and I am hitting the following panic: panic: system.cpu: read of 40fac0 (blk 40fac0) @ cycle 11 returns b9, expected 0 Memory Usage: 672492 KBytes Program aborted at tick 11 cmd: ./build/NULL/gem5.debug configs/example/ruby_mem_test.py -m

[gem5-users] Re: When using clwb “panic: Tried to write unmapped address” in Gem5 X86

Hi Arun, Two quick ideas... 1. The address 0x56318e53ed40 looks suspect. That's not on the stack, in the OS, on the heap... I think it's probably a bad address. Most likely some other instruction before this one is causing a bad address to be emitted. 2. CLWB/CLFLUSH/CLFLUSHOPT may or may not

[gem5-users] Statistics for TBE Table in Ruby

Hello, I wanted to get the Avg TBE Size as a statistic for each of L1, L2, Dir and DMA for all cores. Please help me with some pointers as to where I should add code for TBE related statistics, I tried to get hints by looking at the L1Cache_Controller.cc file generated by build. I also tried

[gem5-users] Peak Bandwidth in Garnet

I am simulating a 4x4 Mesh_XY (16 nodes) with neighbor traffic pattern and following parameters: --cacheline_size=512 --sim-cycles=100 --sys-clock=1GHz --injectionrate=1.0 --ruby-clock=1GHz --inj-vnet=2 --routing-algorithm=1 --link-width-bits=256 --link-latency=1 --router-latency=1

[gem5-users] no committedInsts in stats.txt with fastforward option in SE mode

Hi All: When I simulate with the fastforward and maxinsts parameters in SE mod, I only see sim_insts=my fastforward instructions in stats.txt after the maximum number of instructions exits. The value of committedInsts is not always 0 in switch_cpu.committedInsts, but if fastforward is

[gem5-users] Re: Ruby in Arm?

Hi Adrian, > -Original Message- > From: adrian via gem5-users > Sent: 07 May 2021 09:36 > To: gem5-users@gem5.org > Cc: adrian.barre...@gmail.com > Subject: [gem5-users] Ruby in Arm? > > Hi guys, > > I've always used the classic memory model when running timing simulations > using Arm,

[gem5-users] Ruby in Arm?

Hi guys, I've always used the classic memory model when running timing simulations using Arm, but I'd like to run some experiments using Ruby. I've seen some people using it and asking questions about it, but my current version of gem5 shows this warning when enabling it: "warn: You are