[gem5-users] Unable to boot Linux in FS mode

2023-07-27 Thread Zhewen Hu via gem5-users
Hello, My OS is Ubuntu 22 and I am using gem5 v22.0.0.1, when I boot a Ubuntu 22 image I got error: *Kernel panic - not syncing: Attempted to kill init! exitcode=0x7f00* Attached are the logs, could anyone help to find the problem? Thanks in advance. Best regards, Zhenwen Hu gem5 Simulator

[gem5-users] Re: Using Traffic Generators with Ruby

2023-07-27 Thread Jason Lowe-Power via gem5-users
Hi Vishnu, I do not believe there is any way to direct traffic to a particular message buffer (e.g, `requestToDir`). Ruby is in some sense a "black box" that only has port inputs (which are directed to a sequencer) and port output (via `requestToMemory`). That said, this is a cool idea! I would

[gem5-users] Re: stopping simulation via ThreadContext::halt()

2023-07-27 Thread Jason Lowe-Power via gem5-users
Hi David, I think you want to call the function `exitSimLoopNow` or `exitSimLoop`. You can call this function from an instruction implementation, (e.g., halt), I believe. See https://github.com/search?q=repo%3Agem5%2Fgem5+exitSimLoop+=code Cheers, Jason On Wed, Jul 26, 2023 at 9:39 AM David

[gem5-users] Re: Facing issue while trying to use PARSEC benchmark using Gem5

2023-07-27 Thread Jason Lowe-Power via gem5-users
Hi Abhinav, I would suggest using the most recent version of gem5 (v23.0) and use the gem5-resources version of parsec. See https://resources.gem5.org/resources/x86-parsec/example?database=gem5-resources=1.0.0 for an example using parsec. Cheers, Jason On Thu, Jul 27, 2023 at 2:14 AM Abhinav

[gem5-users] Re: Inquiry about using RiscvTimingSimpleCPU to connect with TLM memory in Gem5

2023-07-27 Thread Jason Lowe-Power via gem5-users
Hi Zitai, You should be able to use any CPU model with the TLM interface. You can write your own configuration file / run script that creates a TimingSimpleCPU and connects the I/D ports to the TLM interface. Cheers, Jason On Thu, Jul 27, 2023 at 2:44 AM 泰。 via gem5-users wrote: > Hi: > > I

[gem5-users] Inquiry about using RiscvTimingSimpleCPU to connect with TLM memory in Gem5

2023-07-27 Thread 泰。 via gem5-users
Hi: I am a Gem5 user and currently working on system-level modeling and simulation using Gem5. I have encountered an issue and would greatly appreciate your assistance and advice. Currently, I amusing tlm_slave.py to connect with TLM memory successfully. However, I noticed that when using

[gem5-users] Facing issue while trying to use PARSEC benchmark using Gem5

2023-07-27 Thread Abhinav Kumar via gem5-users
Hi everyone, I'm trying to run the PARSEC benchmark using gem5. I followed the tutorial on the site. But, currently I'm facing one issue, the simerr file contains the following: Traceback (most recent call last): File "", line 1, in File "build/X86/python/m5/main.py", line 457, in main