Hi All,
In the AMD_MOESI protocol, when working with syscall emulation, I run into an
issue where the Corepair controller memory port is unconnected, giving me the
following message:
src/sim/port.cc:62: fatal: system.cp_cntrl0.memory: Unconnected port!
After doing some digging, I was able to
Hi All,
In some environments, access latencies are set in both SLICC (for enqueueing
the latency on responses) and at the same time within cache objects in Python
(to create resource stalls when banks are not available in Ruby). I think I'm
having trouble figuring out, why do it in both places?
Hi Folks,
I am attempting to get a better handle on the statistics collection within the
cache protocols, and one thing I noticed while browsing around the MOESI AMD
protocol was that some functions, such as functionalRead/Write,
checkResourceAvailable and recordRequestType are defined, but
Hi Folks,
I am working through debugging a bug I am running while trying to run syscall
mode in gem5 on the Ruby MOESI_AMD_BASE protocol. To start, the bug I am
running into is as follows:
src/sim/port.cc:62: fatal: system.cp_cntrl0.memory: Unconnected port!
A few notes to describe what I
Hi Folks,
I am currently working on modeling a system in which the L3 Cache is
dynamically set. As a simple example of this, say there were two sets of
addresses. If I get a LD/ST request to the first set, it takes twice as long as
it would for retrieval in the second set. In any case, I have
, this->create() will return a Gem5ToTlmBridge type which is
incompatible with SimObject as below declared, any comments? Thanks a lot!
SimObject *
Gem5ToTlmBridge32CxxConfigParams::simObjectCreate()
{
return this->create();
}
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G
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Replied Message
| From | G via gem5
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G
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Replied Message
| From | G via gem5-users |
| Date | 7/14/2023 17:24 |
| To | gem5-users@gem5.org |
| Cc | G |
| Subject | [gem5-users] Re: GEM5 within SystemC build issue |
Hello, Anyone hit same issue when building "GEM5 within SystemC"? Or just
succeeding?
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G
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ect *
Gem5ToTlmBridge32CxxConfigParams::simObjectCreate()
{
return this->create();
}
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G
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Replied Message
| From | G via gem5-users |
| Date | 7/14/2023 17:24 |
| To | gem5-users@gem5.org |
| Cc | G |
| Subject | [gem5-users] Re: GEM5 within SystemC build issue |
Hello, Anyone hit same issu
Hello, Anyone hit same issue when building "GEM5 within SystemC"? Or just
succeeding?
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G
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ginger...@163.com
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Replied Message
| From | G via gem5-users |
| Date | 7/3/2023 10:35 |
| To | gem5-users@gem5.org |
| Cc | gingerluo |
| Subject | [gem5-users] GEM5 within Sys
Hello,
Anyone went well with GEM5 and SystemC integration?
I triied to build libgem5_debug.so so I can integrate GEM5 in a standalone
systemc environment with below commandline:
python3 `which scons` --with-cxx-config --without-python --without-tcmalloc
USE_SYSTEMC=1
understanding, I think if you configure multiple load functional
units that would be equivalent to multiple dcache ports. However, using
multiple LQs might require changes in the source code.
-Ayaz
On Mon, Apr 24, 2023 at 11:42 PM G via gem5-users wrote:
Hello,
Seems default O3 CPU has
Hello,
Seems default O3 CPU has single load queue and have single port to dcache, is
there way we can configure dual port dcache and have 2 LQs working in parallel?
Thanks
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G
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ginger...@163.com
|___
gem5-users mailing list --
Hello,
GEM5 seems C++ wrapping Python, means C++ is on top.
I can easily debug with gdb setting in VSCODE, but anyone knows how to debug
into those emeded python codes?
Such as se.py?
Thanks!
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G
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ginger...@163.com
|___
gem5-users mailing
Thanks!
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G
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ginger...@163.com
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Replied Message
| From | Eliot Moss |
| Date | 3/10/2023 21:00 |
| To | The gem5 Users mailing list |
| Cc | G |
| Subject | Re: [gem5-users] Re: building of different GEM5 binary type |
On 3/10/2023 2:18 AM, G via gem5-users wrote:
Hello,
I build
Hello,
I build binary of gem5.opt firstly output at build/RISCV/gem5.opt, then I build
another binary of gem5.debug, but seems it's still at build/RISCV dir, looks
like all the build outputs shares same directories.
Even though I ran both with my workloads an they all worked properly, I'm
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