[gem5-users] Re: KVM test regressions?

2020-08-24 Thread Gabe Black via gem5-users
I don't think so, although I don't know that for certain. Bobby? Andreas? Gabe On Mon, Aug 24, 2020 at 8:47 PM mike upton via gem5-users < gem5-users@gem5.org> wrote: > > Is there a defined regression for KVM cpu tests? > For both X86 and ARM. > > >

[gem5-users] KVM test regressions?

2020-08-24 Thread mike upton via gem5-users
Is there a defined regression for KVM cpu tests? For both X86 and ARM. ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: SLICC: Main memory overwhelmed by requests?

2020-08-24 Thread tolausso--- via gem5-users
Thank you (once again) for your helpful answers, Jason! After having done some more experimenting following your suggestions, I've found that increasing the deadlock threshold (by several orders of magnitude) does not make the problem go away, nor does only increasing the number of memory

[gem5-users] Re: [ARM system] Question about the cleassic cache system

2020-08-24 Thread chenboya via gem5-users
HI, Nikos Thank you very much. I will try to use these two configuration files to test my cache structures. Best Regards Boya -Original Message- From: Nikos Nikoleris [mailto:nikos.nikole...@arm.com] Sent: 2020年8月24日 10:48 To: gem5 users mailing list Cc: chenboya Subject: Re:

[gem5-users] Re: [ARM system] Question about the cleassic cache system

2020-08-24 Thread Nikos Nikoleris via gem5-users
Assymetric cache hierachies should work in the classic memory system. The problem you run into is data corruption (the reported addresses are most likely invalid) but it's hard to say anything about the cause of it without more info. One quick way to test your assymetric memory hierarchy would