[gem5-users] 答复: Re: SPEC CPU 2017 taking days to simulate

2022-11-08 Thread yaogang via gem5-users
Hi Jason, Is there any roadmap (near future not long term) to take gem5 to multi thread accerleration? Regards Yao 发件人: Jason Lowe-Power via gem5-users [mailto:gem5-users@gem5.org] 发送时间: 2022年11月9日 3:02 收件人: The gem5 Users mailing list 抄送: Markus Bichl ; Jason Lowe-Power 主题: [gem5-users]

[gem5-users] svc halt

2022-01-20 Thread yaogang via gem5-users
Hi It seems that my gem5 run on one spec06 is very likely to hang on SVC instruction. Is there any hint? 648549545000: system.cpu: T0 : 0x1e9e10 @mmap64+99. 1 : subi_uop sp, sp, #4 : IntAlu : D=0xbefff65c 648549547000: system.cpu: T0 : 0x1e9e12 @munmap+1: mov.w r7, #91

[gem5-users] 答复: gem5

2022-01-10 Thread yaogang via gem5-users
t it finds the header just fine but can't link against the library for some reason. In any case, if you look at that log file, it should give you an error message which will help you get started figuring this out. Gabe On Thu, Jan 6, 2022 at 2:27 AM yaogang via gem5-users mailto:gem5-user

[gem5-users] gem5

2022-01-06 Thread yaogang via gem5-users
Hi, My gem5 used to work fine but suddenly can not build due to the following warning I think( it will complain shm_open not finding the library) [cid:image001.png@01D8032A.6C57C1F0] I set the /usr/include into my path variable and it should be there . I saw there is a jira ticket on

[gem5-users] gem5 build extra

2021-12-28 Thread yaogang via gem5-users
Hi, I have a device which incorporated another model in the GEM5 interface. This is put into another directory and I use EXTRAS to include the directory. It seems working fine until compiling to this extra #include "dev/io_device.hh" class BaseGpu : public BasicPioDevice It appears the gem5

[gem5-users] 答复: Re: some problem about IO device's write or read function's return tick

2021-12-27 Thread yaogang via gem5-users
Hi Jason, A side question regarding to the performance of the GEM5. To a single threaded workload, GEM5 is normally running as the single thread in the host processor as well. Do we have any road map on the lower level library which could split the multiple sim events into different

[gem5-users] Re: how gem5 loads binaries on SE mode?

2021-12-12 Thread yaogang via gem5-users
Hi Jason & All I am simulating Spec2006 milc workload on ARM taeget. It hangs on SVC instruction. I.saw this.is supported on the model. What is the normal cause of the hang and any quick start for.debug such issues? Regards Yao 姚刚 YaoGang Mobile: