Re: [gem5-users] CPU scheduler

Hi Yuan. In SE mode, there is no scheduler. If you need a scheduler, you should use FS mode which uses the simulated OS's scheduler. Gabe On Thu, Feb 20, 2020 at 8:13 PM Shougang Yuan wrote: > Dear All, > > I am trying to find the code about cpu scheduler in SE mode about > multi-core

Re: [gem5-users] Exact meaning of ExtMachInst

Hi Yuan. ExtMachInst is the contextualized, canonical version of an instruction. In x86 for instance, it holds all the information needed to decode an instruction in a single fixed structure instead of a sequence of bytes. It includes contextual information like how big addresses and operands are

[gem5-users] Annotating Region of Interest for RISCV ISA

Hi all, As far as I see there is no m5op_riscv.S file in util/m5 which is needed to annotate the region of interest. Is there any other way that I can annotate an application for riscv isa? Best, Muhammet ___ gem5-users mailing list gem5-users@gem5.org

Re: [gem5-users] CPU scheduler

A bit more precisely, every fork syscall starts on a new free CPU. If there are no new free CPUs, the call fails in the guest. Once the thread ends, the CPU is freed and becomes available for new threads. Also mentioned at:

[gem5-users] Fw: Asim benchmarks on gem5

From: gem5-users on behalf of ABD ALRHMAN ABO ALKHEEL Sent: Friday, February 21, 2020 5:04:09 AM To: gem5 users mailing list ; gem5-users Subject: [gem5-users] Asim benchmarks on gem5 I have followed the instructions provided in the gem5.org website to run

Re: [gem5-users] Fw: Asim benchmarks on gem5

Thanks Ciro for your email. I can build new image and new kernel but the problem is how to get the benchmarks from the old image? Is there anyway to get the image working on qemu to take copy of the benchmarks ? Best Regards From: Ciro Santilli Sent: Friday,

Re: [gem5-users] Fw: Asim benchmarks on gem5

How to extract files from images can be found easily by Googling. But I would instead recommend that you actually build/install the app yourself to know what you are actually getting. And in that case, yes, QEMU is possibly your best option in that case, as it can alter the disk image. On

Re: [gem5-users] Stream benchmark mismatch stats

My bad, I was missing a simple point. There are also 5K writes, meaning there would be additional 5K read from main memory to obtain an exclusive copy of the blocks before write (15K/8=1875). So, the simulator is fairly accurate. For different RPs, during initialization some blocks are kept in the

Re: [gem5-users] ARM DerivO3CPU assertion failed

I observe the following behavior on se.py ARM and X86, which depends on --restore-with-cpu. I have used a minimal userland executable that only does two things in assembly: m5 checkpoint and m5 exit (total of only 5 instructions in aarch64) @Jason: can you confirm the difference between se.py

Re: [gem5-users] Fw: Asim benchmarks on gem5

I'm afraid I don't have a super automated setup that just works for Android, and haven't done this myself specifically, but here are some thoughts: - those instructions are like large part of the wiki old and may have stopped working --machine-type=VExpress_EMM is not recommended anymore,