Re: Is there a "reverse bits" hardware instruction?

So, no need for any macro at all to generate the byte bit reversal TRT table! I must have skipped over or forgotten the 2003 posting. This is just totally awesome, especially the redundant unary "+"'s to force decent alignment for readability. Had to actually run it with PRINT DATA to convince m

Re: Is there a "reverse bits" hardware instruction?

In , on 07/23/2013 at 08:07 PM, John Gilmore said: >I am happy to have David join in my recommendation, and I can imagine >a circumstance in which RLLG would be more useful than RLL, but RLL >itself does 64-bit rotations. "For ROTATE LEFT SINGLE LOGICAL (RLL), bits 0-31 of general registers R

Re: Is there a "reverse bits" hardware instruction?

In , on 07/24/2013 at 11:29 AM, John Gilmore said: >Here, however, we have for a TROO Why TROO rather than TR? -- Shmuel (Seymour J.) Metz, SysProg and JOAT Atid/2 We don't care. We don't have to care, we're Congress. (S877: The Shut up and Eat

Re: Is there a "reverse bits" hardware instruction?

In <023901ce8876$0099c900$01cd5b00$@mcn.org>, on 07/24/2013 at 09:59 AM, Charles Mills said: >Agreed in principle. I would probably use Rexx to create it. I would create the TR table in a macro, or the inline equivalent. -- Shmuel (Seymour J.) Metz, SysProg and JOAT Atid/2

Re: Is there a "reverse bits" hardware instruction?

In <51ef18aa.2060...@gmail.com>, on 07/24/2013 at 07:58 AM, David Crayford said: >There's a RLLG instruction to rotate the bits in a 64-bit integer. It doesn't *reverse* the bits, which is what the OP needs. -- Shmuel (Seymour J.) Metz, SysProg and JOAT Atid/2

Re: Is there a "reverse bits" hardware instruction?

In <1482096876342980.wa.paulgboulderaim@listserv.ua.edu>, on 07/24/2013 at 09:25 AM, Paul Gilmartin said: >One TR to reverse the bytes, Why, Isn't LRVG a lor faster and more concise? -- Shmuel (Seymour J.) Metz, SysProg and JOAT Atid/2 We do

Re: Is there a "reverse bits" hardware instruction?

In <000b01ce87ee$711f3580$535da080$@mcn.org>, on 07/23/2013 at 05:49 PM, Charles Mills said: >I guess you could do it with TR (to reverse the bits) and then LRVG >(to reverse the bytes) but that is overly complex and probably slow >(IMHO). It's faster than move inverse, translate and load (-;

Re: Is there a "reverse bits" hardware instruction?

In , on 07/23/2013 at 07:11 PM, John Gilmore said: >Look at the Rotate instructions in the PrOp. RLL will do come >close to doing what you want to do. FSVO close. Rotate has noting to do with reversing the bit order; it's just a circular shift. -- Shmuel (Seymour J.) Metz, SysProg an

Re: Is there a "reverse bits" hardware instruction?

amp;J SETA &J+&L > .BYTEFT ANOP > &L SETA &L*2 NEXT ADDEND > &N SETA &N/2 NEXT COMPARAND > &M SETA &M+1 NEED EIGHT BITS > AIF (&M LE 8).BYTELP > &I SETA &I+1 > &K SETA &K+1 >

Re: Is there a "reverse bits" hardware instruction?

Here's a single DC instruction I've posted May 2003 [search for "what's your most difficult assembler concept"] BYTE_FLIP DS 0CL256 TDC 256AL1*-T)/001)-((*-T)/002)*2)*X'80' (((*-T)/002)-((*-T)/004)*2)*X'40' (((*

Re: Is there a "reverse bits" hardware instruction?

On Wed, 24 Jul 2013 12:54:06 -0500, Kenneth Wilkerson wrote: >The macro at the end of my reply will generate a reverse translate table. (snip) > >MACRO >&LABEL REVTABLE , >* Construct reverse bits translate table (snip) That's a beauty. Bill

Re: Is there a "reverse bits" hardware instruction?

On 24 Jul 2013 07:32:08 -0700, Paul Gilmartin wrote: >On Wed, 24 Jul 2013 08:42:55 -0500, Kenneth Wilkerson wrote: >> >>However, in your initial post you talked about the above sequence involving >>the TR being complex. I assume you're talking about the translate table >>itself. When I need transl

Re: Is there a "reverse bits" hardware instruction?

On 7/24/2013 11:59 AM, Charles Mills wrote: He's reading the op? Charles Composed on a mobile: please excuse my brevity "Lynd, Eugene C." wrote: Of course there is. XI (EXCLUSIVE OR IMMEDIATE) and XC (EXCLUSIVE OR CHARACTER). Where's Steve Comstock when you need him? Gene Lynd He's

Re: Is there a "reverse bits" hardware instruction?

He's reading the op? Charles Composed on a mobile: please excuse my brevity "Lynd, Eugene C." wrote: >Of course there is. XI (EXCLUSIVE OR IMMEDIATE) and XC (EXCLUSIVE OR >CHARACTER). > >Where's Steve Comstock when you need him? > > > >Gene Lynd > > >

Re: Is there a "reverse bits" hardware instruction?

27;&X'.'&J'.')' DC &X AIF (&I LT 256).TABLOOP MEND -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of John Gilmore Sent: Wednesday, July 24, 2013 10:29 AM To: IBM-MAIN@LIST

Is there a "reverse bits" hardware instruction?

Of course there is. XI (EXCLUSIVE OR IMMEDIATE) and XC (EXCLUSIVE OR CHARACTER). Where's Steve Comstock when you need him? Gene Lynd -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to list

Re: Is there a "reverse bits" hardware instruction?

) is a little counterintuitive. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of retired mainframer Sent: Wednesday, July 24, 2013 10:09 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Is there a "reverse bits" hardwar

Re: Is there a "reverse bits" hardware instruction?

The construction of arbitrary translation tables can be error-prone, and when it is it is better done procedurally. I use the HLASM macro language, which is entirely adequate to such tasks; mais à chacun son goût. Here, however, we have for a TROO only the 256 permutations taken two at a time of

Re: Is there a "reverse bits" hardware instruction?

MVCIN will reverse the bytes. On Wed, Jul 24, 2013 at 9:25 AM, Paul Gilmartin wrote: > On Wed, 24 Jul 2013 04:27:16 -0400, David L. Craig wrote: > > > >A TR instruction that uses a 256-byte table of the reversed > >byte values will handle up to 256 bytes, IIRC. > > > One TR to reverse the bytes,

Re: Is there a "reverse bits" hardware instruction?

On Wed, 24 Jul 2013 08:42:55 -0500, Kenneth Wilkerson wrote: > >However, in your initial post you talked about the above sequence involving >the TR being complex. I assume you're talking about the translate table >itself. When I need translate tables that are not "simple" and particularly >error pr

Re: Is there a "reverse bits" hardware instruction?

On Wed, 24 Jul 2013 04:27:16 -0400, David L. Craig wrote: > >A TR instruction that uses a 256-byte table of the reversed >byte values will handle up to 256 bytes, IIRC. > One TR to reverse the bytes, then a second TR to reverse the bits, plus various MVC for setup. -- gil ---

Re: Is there a "reverse bits" hardware instruction?

some other task has always been just a > little higher priority than profiling. > > Thanks! Great link! The De Bruijn thing is amazing. I was a math minor but I > hated it. I am very weak on the higher math relevant to programming. > > Charles > > -Original Message- > Fro

Re: Is there a "reverse bits" hardware instruction?

13 2:49 PM :>: To: IBM-MAIN@LISTSERV.UA.EDU :>: Subject: Is there a "reverse bits" hardware instruction? :>: Why? Those of you following another thread I started know I am looking :>: to :>: implement a 64-bit version of the UNIX library function ffs(), which :>: returns :

Re: Is there a "reverse bits" hardware instruction?

Re: Is there a "reverse bits" hardware instruction? I can't imagine any instruction sequence in any language performing a "Load Reversed with Mirrored Bytes" more efficiently in the Z/Architecture than a STG, TR for eight bytes and LRVG. Even though, the TR is probably mi

Re: Is there a "reverse bits" hardware instruction?

robably 100% correct. I find the half hour I use doing this for "error prone" translate tables can save me hours debugging later. Kenneth -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Charles Mills Sent: Wednesday, July

Re: Is there a "reverse bits" hardware instruction?

On Tue, 23 Jul 2013 20:07:26 -0400, John Gilmore wrote: >I am happy to have David join in my recommendation, and I can imagine >a circumstance in which RLLG would be more useful than RLL, but RLL >itself does 64-bit rotations. Really? That's not the way I read the POO. The description for RLL a

Re: Is there a "reverse bits" hardware instruction?

r lies in profiling, and some other task has always been just a little higher priority than profiling. Thanks! Great link! The De Bruijn thing is amazing. I was a math minor but I hated it. I am very weak on the higher math relevant to programming. Charles -Original Message----- From: IBM Ma

Re: Is there a "reverse bits" hardware instruction?

scussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Andrew Rowley Sent: Wednesday, July 24, 2013 8:17 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Is there a "reverse bits" hardware instruction? How fast does this code need to be? David's ffs64 looked pretty good to my inexpert

Re: Is there a "reverse bits" hardware instruction?

How fast does this code need to be? David's ffs64 looked pretty good to my inexpert eye, I think you would have to be running it very frequently for something to be measurably faster. There are some similar discussions here, including some branchless techniques that probably would be faster (n

Re: Is there a "reverse bits" hardware instruction?

On 13Jul24:1022+0800, David Crayford wrote: > It's easy to do on X86 or ARM architectures which have instructions > for scanning, counting and reversing bits > https://github.com/facebook/hiphop-php/blob/master/hphp/util/bitops.h. > Now I'm interested in what is the most efficient way to do this o

Re: Is there a "reverse bits" hardware instruction?

It's easy to do on X86 or ARM architectures which have instructions for scanning, counting and reversing bits https://github.com/facebook/hiphop-php/blob/master/hphp/util/bitops.h. Now I'm interested in what is the most efficient way to do this on zArch. I thought zArch was king of the CISC. ARM

Re: Is there a "reverse bits" hardware instruction?

mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of John Gilmore Sent: Tuesday, July 23, 2013 7:11 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Is there a "reverse bits" hardware instruction? Look at the Rotate instructions in the PrOp. RLL will do come close to doing what you want to do. J

Re: Is there a "reverse bits" hardware instruction?

7:59 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Is there a "reverse bits" hardware instruction? There's a RLLG instruction to rotate the bits in a 64-bit integer. I know that you want to call such a routine from C/C++. If you need to write ffs64() in assembler you may find the linkage ove

Re: Is there a "reverse bits" hardware instruction?

On 24/07/2013 8:07 AM, John Gilmore wrote: I am happy to have David join in my recommendation, and I can imagine a circumstance in which RLLG would be more useful than RLL, but RLL itself does 64-bit rotations. Sorry John, I didn't see your recommendation. Of course you are right RLL can rotat

Re: Is there a "reverse bits" hardware instruction?

Hmmm. Have to think that one through. Thanks. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Paul Gilmartin Sent: Tuesday, July 23, 2013 7:13 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Is there a "reverse bits"

Re: Is there a "reverse bits" hardware instruction?

Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of David Crayford Sent: Tuesday, July 23, 2013 7:59 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Is there a "reverse bits" hardware instruction? There's a RLLG instruction to rotate the bits in a 64-bit integer. I know t

Re: Is there a "reverse bits" hardware instruction?

I am happy to have David join in my recommendation, and I can imagine a circumstance in which RLLG would be more useful than RLL, but RLL itself does 64-bit rotations. John Gilmore, Ashland, MA 01721 - USA -- For IBM-MAIN subscri

Re: Is there a "reverse bits" hardware instruction?

There's a RLLG instruction to rotate the bits in a 64-bit integer. I know that you want to call such a routine from C/C++. If you need to write ffs64() in assembler you may find the linkage overhead of calling the routine is far greater than a slower implementation that has been inlined. It's ab

Re: Is there a "reverse bits" hardware instruction?

On Tue, 23 Jul 2013 19:22:49 -0400, John P. Baker wrote: > >The maximum negative value must also be treated as a special case. > I concluded that in a mental simulation after I pressed "SEND". This is why boundary conditions should be tested. I also should have said Subtract Logical rather than

Re: Is there a "reverse bits" hardware instruction?

there a "reverse bits" hardware instruction? On Tue, 23 Jul 2013 17:49:00 -0400, Charles Mills wrote: > >Why? Those of you following another thread I started know I am looking >to implement a 64-bit version of the UNIX library function ffs(), which >returns the bit number of

Re: Is there a "reverse bits" hardware instruction?

On Tue, 23 Jul 2013 17:49:00 -0400, Charles Mills wrote: > >Why? Those of you following another thread I started know I am looking to >implement a 64-bit version of the UNIX library function ffs(), which returns >the bit number of the least significant one bit of a word. z architecture >provides th

Re: Is there a "reverse bits" hardware instruction?

Look at the Rotate instructions in the PrOp. RLL will do come close to doing what you want to do. John Gilmore, Ashland, MA 01721 - USA -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@l

Is there a "reverse bits" hardware instruction?

Is there a quick way to reverse MSB to LSB the bits of a 64-bit register? If I have a register that contains 01234567_89ABCDEF to convert it to F7B3D591_E6A2C480? (I think I got that at least mostly right.) A bit-wise Load Reversed? Yes, I am familiar with the Pops. Hard to find an instruction whe