Thanks again to all who assisted. I got my example working. Biggest problems
were lack of understanding of the basic architecture (128-bit registers that
can be logically segmented into quadwords, doublewords, fullwords,
halfwords, and/or bytes, depending on the function) and then, once I had
thing
G'day Bill,
Is there a typo in your program?
I changed
VL 1,VEC2
to
VL 1,VEC1
and got the expected results.
Peter
-
You are quite correct. My old fingers no longer hit the right keys!
Bill Ogden
--
G'day Bill,
Is there a typo in your program?
I changed
VL 1,VEC2
to
VL 1,VEC1
and got the expected results.
Peter
On Thu, 21 Oct 2021 at 03:46, Bill Ogden wrote:
> Here is a really really really trivial vector program:
>
> VL 1,VEC2
> VL 2,VEC2
>
Shmuel wrote:
>Is there a SET command that will cause CMS to set the bit? Doing it
yourself seems fragile.
No. CMS has no interest in vector stuff (confirmed with Endicott).
I'm getting close:
1st input: 0xE900
2nd input: 0xC300
Result:0x4FFB
That's doing single-byte
Here is a really really really trivial vector program:
VL 1,VEC2
VL 2,VEC2
VA 3,1,2,2
VST 3,VSAVEIT
LM1,4,VSAVEIT get answers in GPR 1,2,3,4
DC F'0' force abend to see the
registers
VEC
...@akphs.com]
Sent: Tuesday, October 19, 2021 7:29 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Vector examples?
Thanks to a bunch of bits of advice from here and elsewhere, I have it
working-or at least producing a result; my cow-orker who needs the code is
going to validate that the result seems right
Thanks to a bunch of bits of advice from here and elsewhere, I have it
working-or at least producing a result; my cow-orker who needs the code is
going to validate that the result seems right.
The key was that in a virtual machine you have to turn vector processing on
by setting the (grande) CR
.EDU] on behalf of
Phil Smith III [li...@akphs.com]
Sent: Tuesday, October 19, 2021 3:33 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Vector examples?
Shmuel wrote:
>Are you running releases of CP and CMS that support vector instructions?
Yes. Same as the CP and CMS I'm running z/OS o
For z/OS, the programming interface for determining if vectors are
available is
SYS1.MACLIB(CVT)
CVTVEF EQU X'80' Vector Extension Facility @NUA
This will be on when you are on at least z/OS 2.1, and this bit is on:
BROWSESYS1.MACLIB(IHAFACL)
Facl_VectorExte
On Tue, 19 Oct 2021 14:43:38 -0500, Salva Carrasco wrote:
>
>I wrote this code to compute a Modulo 11 Check Digits for banking accounts (a
>method widely use, al least in Europe):
>
"a Modulo 11 Check Digits". I'm haunted by the Pigeonhole Principle.
-- gil
-
Charles Mills asked:
> Did you try one of the samples in C or COBOL to see if you get the same
>check?
I have not. I can fix C or COBOL but cannot write them worth a . I'm an
assembler geek from way back! OK, and PL/I and Rexx. The effort to figure
out how to compile alone would take me fo
: Vector examples?
Shmuel wrote:
>Are you running releases of CP and CMS that support vector instructions?
Yes. Same as the CP and CMS I'm running z/OS on at IBM Dallas (CP 7.2, CMS
30).
>How is the CMS virtual machine defined?
ESA, same as our z/OS guest in Dallas.
>Wher
Phil,
I wrote this code to compute a Modulo 11 Check Digits for banking accounts (a
method widely use, al least in Europe):
NCACCT,=XL16'0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F'
VLV1,ACCT Load vectors: v1=account
VLM V2,V3,COEF
Shmuel wrote:
>Are you running releases of CP and CMS that support vector instructions?
Yes. Same as the CP and CMS I'm running z/OS on at IBM Dallas (CP 7.2, CMS
30).
>How is the CMS virtual machine defined?
ESA, same as our z/OS guest in Dallas.
>Where is the HLASM documentation for t
From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of
Phil Smith III [li...@akphs.com]
Sent: Tuesday, October 19, 2021 10:40 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Vector examples?
Shmuel, I'm testing under z/VM.
Ah HAH: I finally grokked what you'd said be
Dale, that's a great link-thanks!!!
For anyone who might be interested, here's my wee program so far, with some
whitespace removed for compactness. I've written the zPDT owner to ask if
vector can be enabled-not that I think it'll Just Work then, but I'll be
farther along.
The idea is that
On Mon, 18 Oct 2021 17:58:06 -0400, Phil Smith III wrote:
>I'm doing some crude experimentation with some vector instructions. I
>haven't found any samples yet; this seems like it might should work:
>
> VL1,WORK1
>
>where WORK1 is a doubleword-aligned value, but it program checks wit
Shmuel, I'm testing under z/VM.
Ah HAH: I finally grokked what you'd said before about DXC, deciphered
PofOp's somewhat opaque "When a data exception causes a program
interruption, a data-exception code (DXC) is stored at location 147" to mean
DECIMAL location 147 (why on earth would I want to
BM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Phil Smith III
> Sent: Monday, October 18, 2021 10:43 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Vector examples?
>
> Charles, thanks-I did find that, but that's pseudo-assembler and I can't
> find equates for the vector regist
arles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Phil Smith III
Sent: Monday, October 18, 2021 10:43 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Vector examples?
Charles, thanks-I did find that, but that's pseudo-assembler a
du/~smetz3
From: IBM Mainframe Discussion List on behalf of
Phil Smith III
Sent: Tuesday, October 19, 2021 1:43 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Vector examples?
Charles, thanks-I did find that, but that's pseudo-assembler and I can't find
eq
Charles, thanks-I did find that, but that's pseudo-assembler and I can't find
equates for the vector registers anywhere (coulda
missed them, of course).
Shmuel, that was my first thought, but I'd expect to get a S0C1 not a S0C7, I
*think*, per the doc.
This is running on a zPDT, where I d
Checking over presentations I have previously downloaded, I found:
A 3-part tutorial beginning here:
http://z-assembler.blogspot.com/2019/10/vector-instructions-1.html
Share presentation 16897 in SHARE Seattle 2015 by Jonathan Bradbury and
Peter Relson
titled "z13 Vector Extension Facility (SIMD
mason.gmu.edu/~smetz3
>
>
> From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf
> of Phil Smith III [li...@akphs.com]
> Sent: Monday, October 18, 2021 5:58 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Vector examples?
>
> I'm doing som
: Monday, October 18, 2021 5:58 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Vector examples?
I'm doing some crude experimentation with some vector instructions. I
haven't found any samples yet; this seems like it might should work:
VL1,WORK1
where WORK1 is a doubleword-ali
ple has a VL in it.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Phil Smith III
Sent: Monday, October 18, 2021 2:58 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Vector examples?
I'm doing some crude experimentation
: Monday, October 18, 2021 2:58 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Vector examples?
I'm doing some crude experimentation with some vector instructions. I
haven't found any samples yet; this seems like it might should work:
VL1,WORK1
where WORK1 is a doubleword-aligned val
t; -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Phil Smith III
> Sent: Monday, October 18, 2021 2:58 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Vector examples?
>
> I'm doing some crude experimentation wi
: Vector examples?
I'm doing some crude experimentation with some vector instructions. I
haven't found any samples yet; this seems like it might should work:
VL1,WORK1
where WORK1 is a doubleword-aligned value, but it program checks with a data
exception. So obviously I&
I'm doing some crude experimentation with some vector instructions. I
haven't found any samples yet; this seems like it might should work:
VL1,WORK1
where WORK1 is a doubleword-aligned value, but it program checks with a data
exception. So obviously I'm confused. Anyone grok how the
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