Re: ECB in XMEM Post
It is available for V2R1 when APAR OA49677 is installed. Jim Mulder z/OS Diagnosis, Design, Development, Test IBM Corp. Poughkeepsie NY "Charles Mills" wrote on 09/27/2018 01:15:38 PM: > From: "Charles Mills" > To: ibm-main@listserv.ua.edu > Date: 09/27/2018 02:02 PM > Subject: Re: ECB in XMEM Post > > @Peter, can you confirm IEAMSXMP is available for V2R1? It is in the V2R2 > doc but not the V2R1 doc. > > Charles > > > -Original Message- > From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On > Behalf Of Peter Relson > Sent: Thursday, September 27, 2018 9:48 AM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > ... > > But for just about anything else, if sticking with the wait/post protocol, > do use IEAMSXMP when it is available. It is available on all supported > releases (although at z/OS 2.1 and 2.2 it is via APAR. For those releases, > unless you "know" that it is OK, use IEAMSXMP only when field ECVTSXMP is > non-0). > > Peter Relson > z/OS Core Technology Design -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
@Peter, can you confirm IEAMSXMP is available for V2R1? It is in the V2R2 doc but not the V2R1 doc. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Peter Relson Sent: Thursday, September 27, 2018 9:48 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post ... But for just about anything else, if sticking with the wait/post protocol, do use IEAMSXMP when it is available. It is available on all supported releases (although at z/OS 2.1 and 2.2 it is via APAR. For those releases, unless you "know" that it is OK, use IEAMSXMP only when field ECVTSXMP is non-0). Peter Relson z/OS Core Technology Design -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
>Is that true for address spaces with non-reusable ASIDs? The exposure is only partly the ASID. It is also the ASCB. Assume that the ASCB is freemained at end of address space. And thus that storage could potentially be reused as an ASCB for a new address space. But that assumption is not directly true. We do need to be careful in terminology. In the question, what is meant by a non-reusable ASID? Is that an ASID for an address space that was not started with REUSASID=YES? Or is it an ASID that is made non-reusable (either temporarily or permanently) because of cross-memory considerations? For an ASID that is permanently non-reusable, yes, it is safe to use normal XM Post because the ASCB will not get freemained. And for a non-memtermable address space, that would apply too. But for just about anything else, if sticking with the wait/post protocol, do use IEAMSXMP when it is available. It is available on all supported releases (although at z/OS 2.1 and 2.2 it is via APAR. For those releases, unless you "know" that it is OK, use IEAMSXMP only when field ECVTSXMP is non-0). Peter Relson z/OS Core Technology Design -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
I don't know but it would seem not, wouldn't it? Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Seymour J Metz Sent: Wednesday, September 26, 2018 11:56 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post Is that true for address spaces with non-reusable ASIDs? -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
Is that true for address spaces with non-reusable ASIDs? -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Discussion List on behalf of Charles Mills Sent: Wednesday, September 26, 2018 12:20 PM To: IBM-MAIN@listserv.ua.edu Subject: Re: ECB in XMEM Post Definitely take a look at IEAMSXMP *if you will always be running on a supported version of z/OS.* As I understand things it is impossible to do a perfect job of X-memory POST. There is no way to write code that with absolute certainty will not POST after its partner program has terminated and been replaced by some other process -- and thus "POST" into the middle of some unrelated code or data. You can do a pretty good job -- but with z/OS one can certainly argue that pretty good is not good enough. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Rob Scott Sent: Wednesday, September 26, 2018 7:02 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post I would be concerned in the fact that cross-memory POST is only deemed safe in certain circumstances. I believe that normal cross-memory POST does not validate the ECB-owning address space STOKEN or TCB token. IBM do offer IEAMSXMP which is a safe cross-memory POST protocol if pause/release or PC-ss cannot be used. -Original Message- From: IBM Mainframe Discussion List On Behalf Of Joseph Reichman Sent: Wednesday, September 26, 2018 2:31 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post Rob This is just a question is your comment based on the fact the ECB might be in pageable non/fixed storage and has potential for s0c4 Thanks > On Sep 26, 2018, at 9:23 AM, Rob Scott wrote: > > Both Pause/Release and PC-ss are supported in SRB mode. > > The fact that you are in recovery code (and possibly unsure of the status of > both ECB-owner and client) makes me believe that cross-memory POST is even > more undesirable. > > Not saying that it cannot be done with cross-memory POST, but Pause/Release > offers more environmental validation prior to execution and encapsulating a > PC-ss "POST" function isolates the recovery code from ECB-owner architecture > and may allow recovery code to run problem state. > > As ever in the case of things like this, it is never what you *intend* to do > that causes the problem.. > > -Original Message- > From: IBM Mainframe Discussion List On > Behalf Of Joseph Reichman > Sent: Wednesday, September 26, 2018 1:23 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > You are right as it kills all registers besides 9 If memory serves me > right I think the for the system or PC call > > I know you are going to scream at me but the reason I choose the post > is because I’m posting This from a recovery routine as I don’t know > whether it’s TCB mode or SRB I’m using the system call I.E pc I am > passing the SDWA storage area back in the 3 byte 24 bit comp code area > The 3 byte comp code makes this convenient for me > > >> On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: >> >> Please be aware that cross-memory POSTs are not ideal and if possible I >> would consider a redesign of your code to use other methods - for example : >> >> (1) Pause/Release >> (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf >> >> Just my 2c. >> >> Rob Scott >> Rocket Software >> >> -----Original Message- >> From: IBM Mainframe Discussion List On >> Behalf Of Joseph Reichman >> Sent: Wednesday, September 26, 2018 1:01 PM >> To: IBM-MAIN@LISTSERV.UA.EDU >> Subject: Re: ECB in XMEM Post >> >> Sorry I misunderstood >> So if Address Space A would like to post Address B the ECB must be >> addressable to to B as that is the Target the ASCB is that of the >> target Address space B the ECB can be B private area in A all I need >> is the address of the ECB even in private and ASCB of B >> >> Thanks >> >> >> On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> >>>> This is just another way of saying that for XMEM the ECB is in CSA >>>> right >>> ? >>> No, not right. >>> >>> What within the wording "must be addressable from the address space >>> identified by the ASCB parameter" makes you say that? Storage >>> addressable from an address space includes common storage (whether >>> CSA or SQA) and private storage of the address space. The ECB can be >>> in any of those areas. >>> >>> Peter Relson >>> z/OS Core Technology Design >>> &
Re: ECB in XMEM Post
Pageable should not be a problem. If the ECB is in a swappable address space, that could be a problem. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Discussion List on behalf of Joseph Reichman Sent: Wednesday, September 26, 2018 9:31 AM To: IBM-MAIN@listserv.ua.edu Subject: Re: ECB in XMEM Post Rob This is just a question is your comment based on the fact the ECB might be in pageable non/fixed storage and has potential for s0c4 Thanks > On Sep 26, 2018, at 9:23 AM, Rob Scott wrote: > > Both Pause/Release and PC-ss are supported in SRB mode. > > The fact that you are in recovery code (and possibly unsure of the status of > both ECB-owner and client) makes me believe that cross-memory POST is even > more undesirable. > > Not saying that it cannot be done with cross-memory POST, but Pause/Release > offers more environmental validation prior to execution and encapsulating a > PC-ss "POST" function isolates the recovery code from ECB-owner architecture > and may allow recovery code to run problem state. > > As ever in the case of things like this, it is never what you *intend* to do > that causes the problem.. > > -Original Message- > From: IBM Mainframe Discussion List On Behalf Of > Joseph Reichman > Sent: Wednesday, September 26, 2018 1:23 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > You are right as it kills all registers besides 9 If memory serves me right I > think the for the system or PC call > > I know you are going to scream at me but the reason I choose the post is > because I’m posting This from a recovery routine as I don’t know whether it’s > TCB mode or SRB I’m using the system call I.E pc I am passing the SDWA > storage area back in the 3 byte 24 bit comp code area The 3 byte comp code > makes this convenient for me > > >> On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: >> >> Please be aware that cross-memory POSTs are not ideal and if possible I >> would consider a redesign of your code to use other methods - for example : >> >> (1) Pause/Release >> (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf >> >> Just my 2c. >> >> Rob Scott >> Rocket Software >> >> -----Original Message- >> From: IBM Mainframe Discussion List On Behalf Of >> Joseph Reichman >> Sent: Wednesday, September 26, 2018 1:01 PM >> To: IBM-MAIN@LISTSERV.UA.EDU >> Subject: Re: ECB in XMEM Post >> >> Sorry I misunderstood >> So if Address Space A would like to post Address B the ECB must be >> addressable to to B as that is the Target the ASCB is that of the target >> Address space B the ECB can be B private area in A all I need is the address >> of the ECB even in private and ASCB of B >> >> Thanks >> >> >> On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> >>>> This is just another way of saying that for XMEM the ECB is in CSA >>>> right >>> ? >>> No, not right. >>> >>> What within the wording "must be addressable from the address space >>> identified by the ASCB parameter" makes you say that? Storage >>> addressable from an address space includes common storage (whether CSA >>> or SQA) and private storage of the address space. The ECB can be in >>> any of those areas. >>> >>> Peter Relson >>> z/OS Core Technology Design >>> >>> >>> -- >>> For IBM-MAIN subscribe / signoff / archive access instructions, send >>> email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN >> >> -- >> For IBM-MAIN subscribe / signoff / archive access instructions, send email >> to lists...@listserv.ua.edu with the message: INFO IBM-MAIN >> >> Rocket Software, Inc. and subsidiaries ■ 77 Fourth Avenue, Waltham MA 02451 >> ■ Main Office Toll Free Number: +1 855.577.4323 >> Contact Customer Support: >> https://secure-web.cisco.com/1Ii---t4ISkTb3Cw4LvQoU_ptHQeciWelMqfXbGZIfxh1341MrEuuqaMQJ7uWjB9I7yLrtpSqacsJeDxnO2kDnjqd91InI4_iDxssCnQmPyoEOqMNkWfBGJlJLbMKh9oezS-UXNV1e1IXrhSkzhdst_ovNbkie1wIqxt7vPxfcFxF_0IHK1fv7lRKQ7jn_QUA33GRPeL6Vv6d2duufAVTlQtsP3kgpd4uQThBmlJV3sL17Ql3ls14y6KjkDD5owD8jw0oIzFjWTevXv2oEkkPtKnypmGtIgZOZk5QeE9XjMrz2Z5tvaUATk6oEtEKnxWejV3fGCjxj-cQi859o5jAMfXlGbFUcjCOpyoB1XbmbEPjs7NotqD8jPzaDTVKguDmYf0Ca-k1y5F7le5Yxs3b-gnGP43lpctrQjcRsnHa7amGdcVcRMpavJ-kRmMJVo_KW53CD1
Re: ECB in XMEM Post
Definitely take a look at IEAMSXMP *if you will always be running on a supported version of z/OS.* As I understand things it is impossible to do a perfect job of X-memory POST. There is no way to write code that with absolute certainty will not POST after its partner program has terminated and been replaced by some other process -- and thus "POST" into the middle of some unrelated code or data. You can do a pretty good job -- but with z/OS one can certainly argue that pretty good is not good enough. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Rob Scott Sent: Wednesday, September 26, 2018 7:02 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post I would be concerned in the fact that cross-memory POST is only deemed safe in certain circumstances. I believe that normal cross-memory POST does not validate the ECB-owning address space STOKEN or TCB token. IBM do offer IEAMSXMP which is a safe cross-memory POST protocol if pause/release or PC-ss cannot be used. -Original Message- From: IBM Mainframe Discussion List On Behalf Of Joseph Reichman Sent: Wednesday, September 26, 2018 2:31 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post Rob This is just a question is your comment based on the fact the ECB might be in pageable non/fixed storage and has potential for s0c4 Thanks > On Sep 26, 2018, at 9:23 AM, Rob Scott wrote: > > Both Pause/Release and PC-ss are supported in SRB mode. > > The fact that you are in recovery code (and possibly unsure of the status of > both ECB-owner and client) makes me believe that cross-memory POST is even > more undesirable. > > Not saying that it cannot be done with cross-memory POST, but Pause/Release > offers more environmental validation prior to execution and encapsulating a > PC-ss "POST" function isolates the recovery code from ECB-owner architecture > and may allow recovery code to run problem state. > > As ever in the case of things like this, it is never what you *intend* to do > that causes the problem.. > > -Original Message- > From: IBM Mainframe Discussion List On > Behalf Of Joseph Reichman > Sent: Wednesday, September 26, 2018 1:23 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > You are right as it kills all registers besides 9 If memory serves me > right I think the for the system or PC call > > I know you are going to scream at me but the reason I choose the post > is because I’m posting This from a recovery routine as I don’t know > whether it’s TCB mode or SRB I’m using the system call I.E pc I am > passing the SDWA storage area back in the 3 byte 24 bit comp code area > The 3 byte comp code makes this convenient for me > > >> On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: >> >> Please be aware that cross-memory POSTs are not ideal and if possible I >> would consider a redesign of your code to use other methods - for example : >> >> (1) Pause/Release >> (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf >> >> Just my 2c. >> >> Rob Scott >> Rocket Software >> >> -----Original Message- >> From: IBM Mainframe Discussion List On >> Behalf Of Joseph Reichman >> Sent: Wednesday, September 26, 2018 1:01 PM >> To: IBM-MAIN@LISTSERV.UA.EDU >> Subject: Re: ECB in XMEM Post >> >> Sorry I misunderstood >> So if Address Space A would like to post Address B the ECB must be >> addressable to to B as that is the Target the ASCB is that of the >> target Address space B the ECB can be B private area in A all I need >> is the address of the ECB even in private and ASCB of B >> >> Thanks >> >> >> On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> >>>> This is just another way of saying that for XMEM the ECB is in CSA >>>> right >>> ? >>> No, not right. >>> >>> What within the wording "must be addressable from the address space >>> identified by the ASCB parameter" makes you say that? Storage >>> addressable from an address space includes common storage (whether >>> CSA or SQA) and private storage of the address space. The ECB can be >>> in any of those areas. >>> >>> Peter Relson >>> z/OS Core Technology Design >>> >>> >>> >>> -- For IBM-MAIN subscribe / signoff / archive access instructions, >>> send email to lists...@listserv.ua.edu with the message: INFO >>> IBM-MAIN >> >>
Re: ECB in XMEM Post
I would be concerned in the fact that cross-memory POST is only deemed safe in certain circumstances. I believe that normal cross-memory POST does not validate the ECB-owning address space STOKEN or TCB token. IBM do offer IEAMSXMP which is a safe cross-memory POST protocol if pause/release or PC-ss cannot be used. -Original Message- From: IBM Mainframe Discussion List On Behalf Of Joseph Reichman Sent: Wednesday, September 26, 2018 2:31 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post Rob This is just a question is your comment based on the fact the ECB might be in pageable non/fixed storage and has potential for s0c4 Thanks > On Sep 26, 2018, at 9:23 AM, Rob Scott wrote: > > Both Pause/Release and PC-ss are supported in SRB mode. > > The fact that you are in recovery code (and possibly unsure of the status of > both ECB-owner and client) makes me believe that cross-memory POST is even > more undesirable. > > Not saying that it cannot be done with cross-memory POST, but Pause/Release > offers more environmental validation prior to execution and encapsulating a > PC-ss "POST" function isolates the recovery code from ECB-owner architecture > and may allow recovery code to run problem state. > > As ever in the case of things like this, it is never what you *intend* to do > that causes the problem.. > > -Original Message- > From: IBM Mainframe Discussion List On > Behalf Of Joseph Reichman > Sent: Wednesday, September 26, 2018 1:23 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > You are right as it kills all registers besides 9 If memory serves me > right I think the for the system or PC call > > I know you are going to scream at me but the reason I choose the post > is because I’m posting This from a recovery routine as I don’t know > whether it’s TCB mode or SRB I’m using the system call I.E pc I am > passing the SDWA storage area back in the 3 byte 24 bit comp code area > The 3 byte comp code makes this convenient for me > > >> On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: >> >> Please be aware that cross-memory POSTs are not ideal and if possible I >> would consider a redesign of your code to use other methods - for example : >> >> (1) Pause/Release >> (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf >> >> Just my 2c. >> >> Rob Scott >> Rocket Software >> >> -----Original Message- >> From: IBM Mainframe Discussion List On >> Behalf Of Joseph Reichman >> Sent: Wednesday, September 26, 2018 1:01 PM >> To: IBM-MAIN@LISTSERV.UA.EDU >> Subject: Re: ECB in XMEM Post >> >> Sorry I misunderstood >> So if Address Space A would like to post Address B the ECB must be >> addressable to to B as that is the Target the ASCB is that of the >> target Address space B the ECB can be B private area in A all I need >> is the address of the ECB even in private and ASCB of B >> >> Thanks >> >> >> On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> >>>> This is just another way of saying that for XMEM the ECB is in CSA >>>> right >>> ? >>> No, not right. >>> >>> What within the wording "must be addressable from the address space >>> identified by the ASCB parameter" makes you say that? Storage >>> addressable from an address space includes common storage (whether >>> CSA or SQA) and private storage of the address space. The ECB can be >>> in any of those areas. >>> >>> Peter Relson >>> z/OS Core Technology Design >>> >>> >>> >>> -- For IBM-MAIN subscribe / signoff / archive access instructions, >>> send email to lists...@listserv.ua.edu with the message: INFO >>> IBM-MAIN >> >> - >> - For IBM-MAIN subscribe / signoff / archive access instructions, >> send email to lists...@listserv.ua.edu with the message: INFO >> IBM-MAIN Rocket Software, Inc. and >> subsidiaries ■ 77 Fourth Avenue, Waltham MA 02451 ■ Main Office Toll >> Free Number: +1 855.577.4323 Contact Customer Support: >> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmy.r >> ocketsoftware.com%2FRocketCommunity%2FRCEmailSupportdata=02%7C01 >> %7CRScott%40ROCKETSOFTWARE.COM%7Cd997bf72252b48399ec008d623b4583b%7C7 >> 9544c1eed224879a082b67a9a672aae%7C0%7C0%7C636735654825882842sdat >> a=FCzgvD
Re: ECB in XMEM Post
Rob This is just a question is your comment based on the fact the ECB might be in pageable non/fixed storage and has potential for s0c4 Thanks > On Sep 26, 2018, at 9:23 AM, Rob Scott wrote: > > Both Pause/Release and PC-ss are supported in SRB mode. > > The fact that you are in recovery code (and possibly unsure of the status of > both ECB-owner and client) makes me believe that cross-memory POST is even > more undesirable. > > Not saying that it cannot be done with cross-memory POST, but Pause/Release > offers more environmental validation prior to execution and encapsulating a > PC-ss "POST" function isolates the recovery code from ECB-owner architecture > and may allow recovery code to run problem state. > > As ever in the case of things like this, it is never what you *intend* to do > that causes the problem.. > > -Original Message- > From: IBM Mainframe Discussion List On Behalf Of > Joseph Reichman > Sent: Wednesday, September 26, 2018 1:23 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > You are right as it kills all registers besides 9 If memory serves me right I > think the for the system or PC call > > I know you are going to scream at me but the reason I choose the post is > because I’m posting This from a recovery routine as I don’t know whether it’s > TCB mode or SRB I’m using the system call I.E pc I am passing the SDWA > storage area back in the 3 byte 24 bit comp code area The 3 byte comp code > makes this convenient for me > > >> On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: >> >> Please be aware that cross-memory POSTs are not ideal and if possible I >> would consider a redesign of your code to use other methods - for example : >> >> (1) Pause/Release >> (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf >> >> Just my 2c. >> >> Rob Scott >> Rocket Software >> >> -----Original Message- >> From: IBM Mainframe Discussion List On Behalf Of >> Joseph Reichman >> Sent: Wednesday, September 26, 2018 1:01 PM >> To: IBM-MAIN@LISTSERV.UA.EDU >> Subject: Re: ECB in XMEM Post >> >> Sorry I misunderstood >> So if Address Space A would like to post Address B the ECB must be >> addressable to to B as that is the Target the ASCB is that of the target >> Address space B the ECB can be B private area in A all I need is the address >> of the ECB even in private and ASCB of B >> >> Thanks >> >> >> On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> >>>> This is just another way of saying that for XMEM the ECB is in CSA >>>> right >>> ? >>> No, not right. >>> >>> What within the wording "must be addressable from the address space >>> identified by the ASCB parameter" makes you say that? Storage >>> addressable from an address space includes common storage (whether CSA >>> or SQA) and private storage of the address space. The ECB can be in >>> any of those areas. >>> >>> Peter Relson >>> z/OS Core Technology Design >>> >>> >>> -- >>> For IBM-MAIN subscribe / signoff / archive access instructions, send >>> email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN >> >> -- >> For IBM-MAIN subscribe / signoff / archive access instructions, send email >> to lists...@listserv.ua.edu with the message: INFO IBM-MAIN >> >> Rocket Software, Inc. and subsidiaries ■ 77 Fourth Avenue, Waltham MA 02451 >> ■ Main Office Toll Free Number: +1 855.577.4323 >> Contact Customer Support: >> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmy.rocketsoftware.com%2FRocketCommunity%2FRCEmailSupportdata=02%7C01%7CRScott%40ROCKETSOFTWARE.COM%7C9d76c8e06d0243b3b78e08d623aadd75%7C79544c1eed224879a082b67a9a672aae%7C0%7C0%7C636735614108579486sdata=rG7j%2B1He%2FF8yklpcRgE3iVYMQ4B7XWkiVzlStrEPE%2FQ%3Dreserved=0 >> Unsubscribe from Marketing Messages/Manage Your Subscription Preferences - >> https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.rocketsoftware.com%2Fmanage-your-email-preferencesdata=02%7C01%7CRScott%40ROCKETSOFTWARE.COM%7C9d76c8e06d0243b3b78e08d623aadd75%7C79544c1eed224879a082b67a9a672aae%7C0%7C0%7C636735614108579486sdata=W1mSCHKvOe2ihbeA03r15AzqaXeUVPBiFeIAhM%2BYuCU%3Dreserved=0 >> Privacy Policy - >> https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%
Re: ECB in XMEM Post
Both Pause/Release and PC-ss are supported in SRB mode. The fact that you are in recovery code (and possibly unsure of the status of both ECB-owner and client) makes me believe that cross-memory POST is even more undesirable. Not saying that it cannot be done with cross-memory POST, but Pause/Release offers more environmental validation prior to execution and encapsulating a PC-ss "POST" function isolates the recovery code from ECB-owner architecture and may allow recovery code to run problem state. As ever in the case of things like this, it is never what you *intend* to do that causes the problem.. -Original Message- From: IBM Mainframe Discussion List On Behalf Of Joseph Reichman Sent: Wednesday, September 26, 2018 1:23 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post You are right as it kills all registers besides 9 If memory serves me right I think the for the system or PC call I know you are going to scream at me but the reason I choose the post is because I’m posting This from a recovery routine as I don’t know whether it’s TCB mode or SRB I’m using the system call I.E pc I am passing the SDWA storage area back in the 3 byte 24 bit comp code area The 3 byte comp code makes this convenient for me > On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: > > Please be aware that cross-memory POSTs are not ideal and if possible I would > consider a redesign of your code to use other methods - for example : > > (1) Pause/Release > (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf > > Just my 2c. > > Rob Scott > Rocket Software > > -Original Message- > From: IBM Mainframe Discussion List On Behalf Of > Joseph Reichman > Sent: Wednesday, September 26, 2018 1:01 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > Sorry I misunderstood > So if Address Space A would like to post Address B the ECB must be > addressable to to B as that is the Target the ASCB is that of the target > Address space B the ECB can be B private area in A all I need is the address > of the ECB even in private and ASCB of B > > Thanks > > > On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: > >>> This is just another way of saying that for XMEM the ECB is in CSA >>> right >> ? >> No, not right. >> >> What within the wording "must be addressable from the address space >> identified by the ASCB parameter" makes you say that? Storage >> addressable from an address space includes common storage (whether CSA >> or SQA) and private storage of the address space. The ECB can be in >> any of those areas. >> >> Peter Relson >> z/OS Core Technology Design >> >> >> -- >> For IBM-MAIN subscribe / signoff / archive access instructions, send >> email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, send email to > lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > Rocket Software, Inc. and subsidiaries ■ 77 Fourth Avenue, Waltham MA 02451 ■ > Main Office Toll Free Number: +1 855.577.4323 > Contact Customer Support: > https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmy.rocketsoftware.com%2FRocketCommunity%2FRCEmailSupportdata=02%7C01%7CRScott%40ROCKETSOFTWARE.COM%7C9d76c8e06d0243b3b78e08d623aadd75%7C79544c1eed224879a082b67a9a672aae%7C0%7C0%7C636735614108579486sdata=rG7j%2B1He%2FF8yklpcRgE3iVYMQ4B7XWkiVzlStrEPE%2FQ%3Dreserved=0 > Unsubscribe from Marketing Messages/Manage Your Subscription Preferences - > https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.rocketsoftware.com%2Fmanage-your-email-preferencesdata=02%7C01%7CRScott%40ROCKETSOFTWARE.COM%7C9d76c8e06d0243b3b78e08d623aadd75%7C79544c1eed224879a082b67a9a672aae%7C0%7C0%7C636735614108579486sdata=W1mSCHKvOe2ihbeA03r15AzqaXeUVPBiFeIAhM%2BYuCU%3Dreserved=0 > Privacy Policy - > https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.rocketsoftware.com%2Fcompany%2Flegal%2Fprivacy-policydata=02%7C01%7CRScott%40ROCKETSOFTWARE.COM%7C9d76c8e06d0243b3b78e08d623aadd75%7C79544c1eed224879a082b67a9a672aae%7C0%7C0%7C636735614108579486sdata=2tCttWPQXiOLGihkj2r6j51ozO1WFPY7XOReo0EZkZk%3Dreserved=0 > > > This communication and any attachments may contain confidential information > of Rocket Software, Inc. All unauthorized use, disclosure or distribution is > prohibited. If you are not the intended recipient, please notify Rocket > Software
Re: ECB in XMEM Post
You are right as it kills all registers besides 9 If memory serves me right I think the for the system or PC call I know you are going to scream at me but the reason I choose the post is because I’m posting This from a recovery routine as I don’t know whether it’s TCB mode or SRB I’m using the system call I.E pc I am passing the SDWA storage area back in the 3 byte 24 bit comp code area The 3 byte comp code makes this convenient for me > On Sep 26, 2018, at 8:11 AM, Rob Scott wrote: > > Please be aware that cross-memory POSTs are not ideal and if possible I would > consider a redesign of your code to use other methods - for example : > > (1) Pause/Release > (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf > > Just my 2c. > > Rob Scott > Rocket Software > > -Original Message- > From: IBM Mainframe Discussion List On Behalf Of > Joseph Reichman > Sent: Wednesday, September 26, 2018 1:01 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ECB in XMEM Post > > Sorry I misunderstood > So if Address Space A would like to post Address B the ECB must be > addressable to to B as that is the Target the ASCB is that of the target > Address space B the ECB can be B private area in A all I need is the address > of the ECB even in private and ASCB of B > > Thanks > > > On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: > >>> This is just another way of saying that for XMEM the ECB is in CSA >>> right >> ? >> No, not right. >> >> What within the wording "must be addressable from the address space >> identified by the ASCB parameter" makes you say that? Storage >> addressable from an address space includes common storage (whether CSA >> or SQA) and private storage of the address space. The ECB can be in >> any of those areas. >> >> Peter Relson >> z/OS Core Technology Design >> >> >> -- >> For IBM-MAIN subscribe / signoff / archive access instructions, send >> email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, send email to > lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > Rocket Software, Inc. and subsidiaries ■ 77 Fourth Avenue, Waltham MA 02451 ■ > Main Office Toll Free Number: +1 855.577.4323 > Contact Customer Support: > https://my.rocketsoftware.com/RocketCommunity/RCEmailSupport > Unsubscribe from Marketing Messages/Manage Your Subscription Preferences - > http://www.rocketsoftware.com/manage-your-email-preferences > Privacy Policy - http://www.rocketsoftware.com/company/legal/privacy-policy > > > This communication and any attachments may contain confidential information > of Rocket Software, Inc. All unauthorized use, disclosure or distribution is > prohibited. If you are not the intended recipient, please notify Rocket > Software immediately and destroy all copies of this communication. Thank you. > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
Please be aware that cross-memory POSTs are not ideal and if possible I would consider a redesign of your code to use other methods - for example : (1) Pause/Release (2) PC-ss service into ECB-owner ASID to issue POST on caller behalf Just my 2c. Rob Scott Rocket Software -Original Message- From: IBM Mainframe Discussion List On Behalf Of Joseph Reichman Sent: Wednesday, September 26, 2018 1:01 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ECB in XMEM Post Sorry I misunderstood So if Address Space A would like to post Address B the ECB must be addressable to to B as that is the Target the ASCB is that of the target Address space B the ECB can be B private area in A all I need is the address of the ECB even in private and ASCB of B Thanks On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> This is just another way of saying that for XMEM the ECB is in CSA >> right > ? > No, not right. > > What within the wording "must be addressable from the address space > identified by the ASCB parameter" makes you say that? Storage > addressable from an address space includes common storage (whether CSA > or SQA) and private storage of the address space. The ECB can be in > any of those areas. > > Peter Relson > z/OS Core Technology Design > > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, send > email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN Rocket Software, Inc. and subsidiaries ■ 77 Fourth Avenue, Waltham MA 02451 ■ Main Office Toll Free Number: +1 855.577.4323 Contact Customer Support: https://my.rocketsoftware.com/RocketCommunity/RCEmailSupport Unsubscribe from Marketing Messages/Manage Your Subscription Preferences - http://www.rocketsoftware.com/manage-your-email-preferences Privacy Policy - http://www.rocketsoftware.com/company/legal/privacy-policy This communication and any attachments may contain confidential information of Rocket Software, Inc. All unauthorized use, disclosure or distribution is prohibited. If you are not the intended recipient, please notify Rocket Software immediately and destroy all copies of this communication. Thank you. -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
Sorry I misunderstood So if Address Space A would like to post Address B the ECB must be addressable to to B as that is the Target the ASCB is that of the target Address space B the ECB can be B private area in A all I need is the address of the ECB even in private and ASCB of B Thanks On Sep 26, 2018, at 7:41 AM, Peter Relson wrote: >> This is just another way of saying that for XMEM the ECB is in CSA right > ? > No, not right. > > What within the wording "must be addressable from the address space > identified by the ASCB parameter" makes you say that? Storage addressable > from an address space includes common storage (whether CSA or SQA) and > private storage of the address space. The ECB can be in any of those > areas. > > Peter Relson > z/OS Core Technology Design > > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
>This is just another way of saying that for XMEM the ECB is in CSA right ? No, not right. What within the wording "must be addressable from the address space identified by the ASCB parameter" makes you say that? Storage addressable from an address space includes common storage (whether CSA or SQA) and private storage of the address space. The ECB can be in any of those areas. Peter Relson z/OS Core Technology Design -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
Thanks Joe Reichman 170-10 73 rd ave Fresh meadows NY 11366 > On Sep 26, 2018, at 3:46 AM, Binyamin Dissen > wrote: > > No, it means unlike the MF=E list, the ecb itself must be addressable from the > target address space, not the POSTers primary. > > On Tue, 25 Sep 2018 19:49:54 -0400 Joseph Reichman > wrote: > > :>Hi > :> > :> > :> > :>In XMEM Post bases on the fact that's ASC is Primary and in the control > :>parameters specify "If the caller specifies the ASCB parameter, the event > :>control block (ECB) must be addressable from the address space > :> > :>identified by the ASCB parameter. " > :> > :> > :> > :> > :> > :>This is just another way of saying that for XMEM The ECB is in CSA right ? > :> > :> > :>-- > :>For IBM-MAIN subscribe / signoff / archive access instructions, > :>send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > -- > Binyamin Dissen > http://www.dissensoftware.com > > Director, Dissen Software, Bar & Grill - Israel > > > Should you use the mailblocks package and expect a response from me, > you should preauthorize the dissensoftware.com domain. > > I very rarely bother responding to challenge/response systems, > especially those from irresponsible companies. > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
No, it means unlike the MF=E list, the ecb itself must be addressable from the target address space, not the POSTers primary. On Tue, 25 Sep 2018 19:49:54 -0400 Joseph Reichman wrote: :>Hi :> :> :> :>In XMEM Post bases on the fact that's ASC is Primary and in the control :>parameters specify "If the caller specifies the ASCB parameter, the event :>control block (ECB) must be addressable from the address space :> :>identified by the ASCB parameter. " :> :> :> :> :> :>This is just another way of saying that for XMEM The ECB is in CSA right ? :> :> :>-- :>For IBM-MAIN subscribe / signoff / archive access instructions, :>send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- Binyamin Dissen http://www.dissensoftware.com Director, Dissen Software, Bar & Grill - Israel Should you use the mailblocks package and expect a response from me, you should preauthorize the dissensoftware.com domain. I very rarely bother responding to challenge/response systems, especially those from irresponsible companies. -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
Thanks > On Sep 25, 2018, at 8:52 PM, Charles Mills wrote: > > I don't think so. I would think it could be anywhere in the address space, > with common storage qualifying as "in the address space." > > Our friend Peter has taught me to take the documentation at its word. If it > meant "in CSA" it would have said "in CSA." > > Charles > > > -Original Message- > From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On > Behalf Of Joseph Reichman > Sent: Tuesday, September 25, 2018 4:50 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: ECB in XMEM Post > > Hi > > > > In XMEM Post bases on the fact that's ASC is Primary and in the control > parameters specify "If the caller specifies the ASCB parameter, the event > control block (ECB) must be addressable from the address space > > identified by the ASCB parameter. " > > > > > > This is just another way of saying that for XMEM The ECB is in CSA right ? > > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > -- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
Re: ECB in XMEM Post
I don't think so. I would think it could be anywhere in the address space, with common storage qualifying as "in the address space." Our friend Peter has taught me to take the documentation at its word. If it meant "in CSA" it would have said "in CSA." Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Joseph Reichman Sent: Tuesday, September 25, 2018 4:50 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: ECB in XMEM Post Hi In XMEM Post bases on the fact that's ASC is Primary and in the control parameters specify "If the caller specifies the ASCB parameter, the event control block (ECB) must be addressable from the address space identified by the ASCB parameter. " This is just another way of saying that for XMEM The ECB is in CSA right ? -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
ECB in XMEM Post
Hi In XMEM Post bases on the fact that's ASC is Primary and in the control parameters specify "If the caller specifies the ASCB parameter, the event control block (ECB) must be addressable from the address space identified by the ASCB parameter. " This is just another way of saying that for XMEM The ECB is in CSA right ? -- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
