[Intel-gfx] [PATCH v2 2/2] drm/i915: optimise i915_gem_object_map() for small objects

We're using this function for ringbuffers and other "small" objects, so it's worth avoiding an extra malloc()/free() cycle if the page array is small enough to put on the stack. Here we've chosen an arbitrary cutoff of 32 (4k) pages, which is big enough for a ringbuffer (4 pages) or a context

[Intel-gfx] [PATCH v2 1/2] drm/i915: refactor i915_gem_object_pin_map()

The recently-added i915_gem_object_pin_map() can be further optimised for "small" objects. To facilitate this, and simplify the error paths before adding the new code, this patch pulls out the "mapping" part of the operation (involving local allocations which must be undone before return) into its

Re: [Intel-gfx] [CI-ping 11/15] drm/i915: Prevent machine death on Ivybridge context switching

On Mon, 18 Apr 2016, Jani Nikula wrote: > On Wed, 13 Apr 2016, Daniel Vetter wrote: >> On Tue, Apr 12, 2016 at 09:03:05PM +0100, Chris Wilson wrote: >>> Two concurrent writes into the same register cacheline has the chance of >>> killing the machine

Re: [Intel-gfx] [RFC PATCH 2/2] drm/i915/bxt: Adjusting the error in horizontal timings retrieval

On Tue, Apr 19, 2016 at 01:48:14PM +0530, Ramalingam C wrote: > In BXT DSI there is no regs programmed with few horizontal timings > in Pixels but txbyteclkhs.. So retrieval process adds some > ROUND_UP ERRORS in the process of PIXELS<==>txbyteclkhs. > > Actually here for the given adjusted_mode,

Re: [Intel-gfx] [PATCH 19/19] drm/i915: Allow async update of pageflips.

On Tue, Apr 19, 2016 at 09:19:53AM +0100, Chris Wilson wrote: > On Tue, Apr 19, 2016 at 09:52:39AM +0200, Maarten Lankhorst wrote: > > If you think it's ready: > dev->mode_config.async_page_flip = true; Nah, this is something entirely different. "async atomic commit" = doesn't block, but

Re: [Intel-gfx] [PATCH] lib: Always NUL terminate ucs2_as_utf8

On 04/20/16 10:37, Chris Wilson wrote: > If the caller, in this case efivarfs_callback(), only provides sufficent > room for the expanded utf8 and not enough to include the terminating NUL > byte, that NUL byte is skipped. When the caller then interprets it as a > string, it may then read from

Re: [Intel-gfx] [PATCH] drm/i915: Fix oops in vlv_force_pll_on()

On Tue, Apr 19, 2016 at 03:01:31PM +0300, Ville Syrjälä wrote: > On Tue, Apr 19, 2016 at 02:25:40PM +0300, Jani Nikula wrote: > > On Mon, 18 Apr 2016, ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > > > intel_pipe_will_have_type() doesn't just

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/gen9: Fix runtime PM refcounting in case DMC firmware isn't loaded

On Wed, Apr 20, 2016 at 04:13:25PM +0300, Imre Deak wrote: > On ke, 2016-04-20 at 15:02 +0200, Daniel Vetter wrote: > > On Mon, Apr 18, 2016 at 02:48:21PM +0300, Imre Deak wrote: > > > While we disable runtime PM and with that display power well support if > > > the DMC firmware isn't loaded, we

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/gen9: Fix runtime PM refcounting in case DMC firmware isn't loaded

On ke, 2016-04-20 at 15:02 +0200, Daniel Vetter wrote: > On Mon, Apr 18, 2016 at 02:48:21PM +0300, Imre Deak wrote: > > While we disable runtime PM and with that display power well support if > > the DMC firmware isn't loaded, we still want to disable power wells > > during system suspend and

Re: [Intel-gfx] [PATCH] drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV

On Wed, Apr 20, 2016 at 02:47:57PM +0200, Daniel Vetter wrote: > On Thu, Apr 14, 2016 at 03:28:51PM +0300, Ville Syrjälä wrote: > > On Thu, Apr 14, 2016 at 11:37:49AM +0200, Daniel Vetter wrote: > > > On Wed, Apr 13, 2016 at 09:09:30PM +0300, ville.syrj...@linux.intel.com > > > wrote: > > > >

Re: [Intel-gfx] [i-g-t PATCH v1 0/7] Make more tests generic

On Mon, Apr 18, 2016 at 01:42:48PM +0200, Tomeu Vizoso wrote: > Hi, > > these patches allow a few more tests to run on drivers other than i915, > mainly by removing the last usage of > DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID and removing superfluous dependencies > on bufmgr and tiled BOs. Ack on

Re: [Intel-gfx] [i-g-t PATCH v1 1/7] tests/drm_read: Drop DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID

On Mon, Apr 18, 2016 at 01:42:49PM +0200, Tomeu Vizoso wrote: > So the test runs on other drivers, drop the usage of the i915-specific > DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID ioctl. > > Wait for a vblank event on pipe0 and if we get it, then the test can > proceed (code copied from kms_vblank). >

Re: [Intel-gfx] [PATCH i-g-t] tests: Separate tests with lots of subtests

On Mon, Apr 18, 2016 at 12:52:44PM +0300, Gabriel Feceoru wrote: > Currently, when trying to run i-g-t tests with piglit, it takes up > to 20s until the first test is executed. > The main reason is that gem_concurrent_all has ~500k subtests, > overkilling piglit. > > This patch separates

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Use insert_page for pwrite_fast

Hi, [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20160420] [cannot apply to v4.6-rc4] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/ankitprasad-r

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/gen9: Fix runtime PM refcounting in case DMC firmware isn't loaded

On Mon, Apr 18, 2016 at 02:48:21PM +0300, Imre Deak wrote: > While we disable runtime PM and with that display power well support if > the DMC firmware isn't loaded, we still want to disable power wells > during system suspend and driver unload. So drop/reacquire the > corresponding power refcount

Re: [Intel-gfx] [PATCH 11/12] drm/i915: Extend GET_APERTURE ioctl to report available map space

Hi, [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20160420] [cannot apply to v4.6-rc4] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/ankitprasad-r

[Intel-gfx] [PATCH] drm/i915: fix semicolon.cocci warnings

drivers/gpu/drm/i915/i915_gem.c:168:43-44: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci CC: Ankitprasad Sharma Signed-off-by: Fengguang Wu --- i915_gem.c |2 +- 1 file

Re: [Intel-gfx] Polymorphic to_i915()

On Mon, Apr 18, 2016 at 12:18:23PM +0300, Jani Nikula wrote: > On Fri, 15 Apr 2016, Chris Wilson wrote: > > Final canvas for opinions for using a magic macro to reduce typing in > > the common operation of getting our drm_i915_private from the object. > > > > 21

Re: [Intel-gfx] [PATCH] lib: Declare loop variable as volatile before setjmp

On Fri, Apr 15, 2016 at 02:00:04PM +0200, Tomeu Vizoso wrote: > The variable used as loop counter in the igt_fixture macro had > unspecified value from the setjmp(3) man page quoted below. Because of > that, in certain circumstances and with -O2 and -Os, the initialization > of that variable would

Re: [Intel-gfx] [PATCH] drm/i915:bxt: Enable Pooled EU support

On Fri, Apr 15, 2016 at 09:47:21AM +0100, tim.g...@intel.com wrote: > From: Tim Gore > > This is a re-send of patch 3/3 from Arun Siluvery's patch > series "Add Pooled EU support to BXT", originally submitted > 20 July 2015. Patches 1 and 2 are already merged in preparation.

Re: [Intel-gfx] [PATCH] drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV

On Thu, Apr 14, 2016 at 03:28:51PM +0300, Ville Syrjälä wrote: > On Thu, Apr 14, 2016 at 11:37:49AM +0200, Daniel Vetter wrote: > > On Wed, Apr 13, 2016 at 09:09:30PM +0300, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > > > On CHV

Re: [Intel-gfx] [PATCH] lib: Always NUL terminate ucs2_as_utf8

On 04/20/16 11:41, Chris Wilson wrote: > On Wed, Apr 20, 2016 at 11:36:37AM +0200, Laszlo Ersek wrote: >> On 04/20/16 10:37, Chris Wilson wrote: >>> If the caller, in this case efivarfs_callback(), only provides sufficent >>> room for the expanded utf8 and not enough to include the terminating NUL

Re: [Intel-gfx] [PATCH 0/5] PowerManagement Toggle for PowerTOP

On Fri, Apr 15, 2016 at 06:12:32PM +, Vivi, Rodrigo wrote: > I was talking to PM engineers today on their Summit and they are really > interrested in a way to toggle features on/off easily. > > They also told if debugfs is the only way that powertop should have to > deal with it. > > So I

Re: [Intel-gfx] [PATCH] drm/i915: Set legacy properties when using legacy gamma set IOCTL. (v2)

On Wed, Apr 20, 2016 at 09:00:09AM +0200, Maarten Lankhorst wrote: > Op 19-04-16 om 12:13 schreef Lionel Landwerlin: > > On 19/04/16 07:02, Maarten Lankhorst wrote: > >> Op 18-04-16 om 18:47 schreef Bob Paauwe: > >>> The i915 driver is now using atomic properties and atomic commit > >>> to handle

[Intel-gfx] [PATCH v3] drm/i915: Fix eDP low vswing for Broadwell

It was noticed on bug #94087 that module parameter i915.edp_vswing=2 that should override the VBT setting to use default voltage swing (400 mV) was not applied for Broadwell. This patch provides a fix for this by checking if default i.e. higher voltage swing is requested to be used and applies

Re: [Intel-gfx] [PATCH v4 1/2] shmem: Support for registration of driver/file owner specific ops

On Fri, Apr 15, 2016 at 05:09:24PM +0100, Chris Wilson wrote: > On Mon, Apr 04, 2016 at 02:18:10PM +0100, Chris Wilson wrote: > > From: Akash Goel > > > > This provides support for the drivers or shmem file owners to register > > a set of callbacks, which can be invoked

Re: [Intel-gfx] [i-g-t PATCH v2 1/2] lib: update kmstest_get_pipe_from_crtc_id

On Mon, Apr 18, 2016 at 02:20:43PM +0200, Tomeu Vizoso wrote: > On 18 April 2016 at 14:09, Daniel Vetter wrote: > > On Wed, Mar 09, 2016 at 04:57:37PM +0100, Tomeu Vizoso wrote: > >> From: Micah Fedke > >> > >> This function uses an intel-specific

Re: [Intel-gfx] [PATCH 08/12] drm/i915: Support for pread/pwrite from/to non shmem backed objects

On Wed, Apr 20, 2016 at 04:47:35PM +0530, ankitprasad.r.sha...@intel.com wrote: > static int > i915_gem_shmem_pread(struct drm_device *dev, >struct drm_i915_gem_object *obj, > @@ -656,6 +795,9 @@ i915_gem_shmem_pread(struct drm_device *dev, > int needs_clflush = 0; >

Re: [Intel-gfx] [PATCH 02/12] drm/i915: Introduce i915_gem_object_get_dma_address()

On Wed, Apr 20, 2016 at 04:47:29PM +0530, ankitprasad.r.sha...@intel.com wrote: > From: Chris Wilson > > This utility function is a companion to i915_gem_object_get_page() that > uses the same cached iterator for the scatterlist to perform fast > sequential lookup of

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/shrinker: Only shmemfs objects are backed by swap

On ke, 2016-04-20 at 12:04 +0100, Chris Wilson wrote: > Since we can only swap out shmemfs objects, those are the only ones that > influence the ability of the shrinker to can free pages. Currently, all > non-shmemfs objects have a raised pages_pin_count to protect them from > the shrinker, so

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Add support for mapping an object page by page

On Wed, Apr 20, 2016 at 04:47:28PM +0530, ankitprasad.r.sha...@intel.com wrote: > From: Chris Wilson > > Introduced a new vm specfic callback insert_page() to program a single pte in > ggtt or ppgtt. This allows us to map a single page in to the mappable aperture >

[Intel-gfx] [PATCH v2] drm/i915: Restrict usage of live status check

This patch restricts usage of live status check for HDMI detection. While testing certain (monitor + cable) combinations with various intel platforms, it seems that live status register is not reliable on some older devices. So limit the live_status check from VLV onwards. This fixes regression

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/shrinker: Report "unevictable" pages

On ke, 2016-04-20 at 12:04 +0100, Chris Wilson wrote: > Inside the shrinker we call can_release_pages() to indicate whether or > not we can make forward progress in freeing up memory by unbinding that > object. When adding our report to oom, we should be using the same > logic. > > Whilst here,

Re: [Intel-gfx] Could you merge the tsc patches directly from Len Brown's public repo?

On Wed, Apr 20, 2016 at 11:24 AM, Daniel Vetter wrote: > On Wed, Apr 20, 2016 at 10:26 AM, Lu, Han wrote: >> Hi Jani, >> >> Please find the repo and commit id below: >> Repo: https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git >> Branch: x86

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/shrinker: Only shmemfs objects are backed by swap

Chris Wilson writes: > [ text/plain ] > Since we can only swap out shmemfs objects, those are the only ones that > influence the ability of the shrinker to can free pages. Currently, all > non-shmemfs objects have a raised pages_pin_count to protect them from > the

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/shrinker: Report "unevictable" pages

Chris Wilson writes: > [ text/plain ] > Inside the shrinker we call can_release_pages() to indicate whether or > not we can make forward progress in freeing up memory by unbinding that > object. When adding our report to oom, we should be using the same > logic. > >

[Intel-gfx] [PATCH 09/12] drm/i915: Migrate stolen objects before hibernation

From: Chris Wilson Ville reminded us that stolen memory is not preserved across hibernation, and a result of this was that context objects now being allocated from stolen were being corrupted on S4 and promptly hanging the GPU on resume. We want to utilise stolen for

[Intel-gfx] [PATCH 07/12] drm/i915: Add support for stealing purgable stolen pages

From: Chris Wilson If we run out of stolen memory when trying to allocate an object, see if we can reap enough purgeable objects to free up enough contiguous free space for the allocation. This is in principle very much like evicting objects to free up enough contiguous space in the vma when

[Intel-gfx] [PATCH 11/12] drm/i915: Extend GET_APERTURE ioctl to report available map space

From: Ankitprasad Sharma When constructing a batchbuffer, it is sometimes crucial to know the largest hole into which we can fit a fenceable buffer (for example when handling very large objects on gen2 and gen3). This depends on the fragmentation of pinned buffers

[Intel-gfx] [PATCH 12/12] drm/i915: Extend GET_APERTURE ioctl to report size of the stolen region

From: Ankitprasad Sharma This patch extends the GET_APERTURE ioctl to add support for getting total size and available size of the stolen region as well as single largest block available in the stolen region. Also adds debugfs support to retieve the size

[Intel-gfx] [PATCH 10/12] drm/i915: Disable use of stolen area by User when Intel RST is present

From: Ankitprasad Sharma The BIOS RapidStartTechnology may corrupt the stolen memory across S3 suspend due to unalarmed hibernation, in which case we will not be able to preserve the User data stored in the stolen region. Hence this patch tries to identify

[Intel-gfx] [PATCH 05/12] drm/i915: Support for creating Stolen memory backed objects

From: Ankitprasad Sharma Extend the drm_i915_gem_create structure to add support for creating Stolen memory backed objects. Added a new flag through which user can specify the preference to allocate the object from stolen memory, which if set, an attempt will be

[Intel-gfx] [PATCH 08/12] drm/i915: Support for pread/pwrite from/to non shmem backed objects

From: Ankitprasad Sharma This patch adds support for extending the pread/pwrite functionality for objects not backed by shmem. The access will be made through gtt interface. This will cover objects backed by stolen memory as well as other non-shmem backed objects.

[Intel-gfx] [PATCH 04/12] drm/i915: Clearing buffer objects via CPU/GTT

From: Ankitprasad Sharma This patch adds support for clearing buffer objects via CPU/GTT. This is particularly useful for clearing out the non shmem backed objects. Currently intend to use this only for buffers allocated from stolen region. v2: Added kernel doc

[Intel-gfx] [PATCH 03/12] drm/i915: Use insert_page for pwrite_fast

From: Ankitprasad Sharma In pwrite_fast, map an object page by page if obj_ggtt_pin fails. First, we try a nonblocking pin for the whole object (since that is fastest if reused), then failing that we try to grab one page in the mappable aperture. It also allows us

[Intel-gfx] [PATCH 02/12] drm/i915: Introduce i915_gem_object_get_dma_address()

From: Chris Wilson This utility function is a companion to i915_gem_object_get_page() that uses the same cached iterator for the scatterlist to perform fast sequential lookup of the dma address associated with any page within the object. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 01/12] drm/i915: Add support for mapping an object page by page

From: Chris Wilson Introduced a new vm specfic callback insert_page() to program a single pte in ggtt or ppgtt. This allows us to map a single page in to the mappable aperture space. This can be iterated over to access the whole object by using space as meagre as page

[Intel-gfx] [PATCH v19 00/12] Support for creating/using Stolen memory backed objects

From: Ankitprasad Sharma This patch series adds support for creating/using Stolen memory backed objects. Despite being a unified memory architecture (UMA) some bits of memory are more equal than others. In particular we have the thorny issue of stolen memory,

[Intel-gfx] [PATCH 06/12] drm/i915: Propagating correct error codes to the userspace

From: Ankitprasad Sharma Propagating correct error codes to userspace by using ERR_PTR and PTR_ERR macros for stolen memory based object allocation. We generally return -ENOMEM to the user whenever there is a failure in object allocation. This patch helps user to

Re: [Intel-gfx] [RESEND FOR CI PATCH v2] drm/i915: Fix eDP low vswing for Broadwell

On Wed, 20 Apr 2016, Mika Kahola wrote: > CI hasn't catch this patch for testing? It has http://mid.gmane.org/20160413170704.11600.78...@emeril.freedesktop.org > > On Wed, 2016-04-13 at 12:11 +0300, Mika Kahola wrote: >> It was noticed on bug #94087 that module parameter

Re: [Intel-gfx] [PATCH] drm: i915: Improve behavior in case of broken HDMI EDID

On Tue, Apr 19, 2016 at 02:31:13PM -0300, Ezequiel Garcia wrote: > Currently, our implementation of drm_connector_funcs.detect is > based on getting a valid EDID. > > This requirement makes the driver fail to detect connected > connectors in case of EDID corruption, which in turn prevents > from

Re: [Intel-gfx] [RESEND FOR CI PATCH v2] drm/i915: Fix eDP low vswing for Broadwell

CI hasn't catch this patch for testing? On Wed, 2016-04-13 at 12:11 +0300, Mika Kahola wrote: > It was noticed on bug #94087 that module parameter > i915.edp_vswing=2 that should override the VBT setting > to use default voltage swing (400 mV) was not applied > for Broadwell. > > This patch

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Do CRT HPD force trigger only when needed

On Mon, Apr 18, 2016 at 07:03:23PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > There doesn't seem to be any need to for the force trigger trick every > single time on VLV CRT output. Let's do it the same way as on ILK+, and > do the force

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Move ioremap_wc tracking onto VMA

On Wed, Apr 20, 2016 at 11:10:54AM +0200, Luis R. Rodriguez wrote: > Reason I ask is since I noticed a while ago a lot of drivers > were using info->fix.smem_start and info->fix.smem_len consistently > for their ioremap'd areas it might make sense instead to let the > internal framebuffer

[Intel-gfx] [PATCH v2 3/3] drm/i915/shrinker: Only shmemfs objects are backed by swap

Since we can only swap out shmemfs objects, those are the only ones that influence the ability of the shrinker to can free pages. Currently, all non-shmemfs objects have a raised pages_pin_count to protect them from the shrinker, so this just makes the logic for can_release_pages() clearer (and

[Intel-gfx] [PATCH v2 1/3] drm/i915/shrinker: Only report objects with extra pinned pages as pinned

When iterating over the bound list, we expect all objects there to have their pages pinned (by the bound VMA). So only report those objects with additional pin count on their pages as "pinned". These should be those objects used for display and hardware access. Reported-by: Akash Goel

[Intel-gfx] [PATCH v2 2/3] drm/i915/shrinker: Report "unevictable" pages

Inside the shrinker we call can_release_pages() to indicate whether or not we can make forward progress in freeing up memory by unbinding that object. When adding our report to oom, we should be using the same logic. Whilst here, change the reporting from bytes to pages so that it looks smaller

[Intel-gfx] [PATCH v2 3/3] drm/i915/shrinker: Only shmemfs objects are backed by swap

Since we can only swap out shmemfs objects, those are the only ones that influence the ability of the shrinker to can free pages. Currently, all non-shmemfs objects have a raised pages_pin_count to protect them from the shrinker, so this just makes the logic for can_release_pages() clearer (and

[Intel-gfx] [PATCH v2 1/3] drm/i915/shrinker: Only report objects with extra pinned pages as pinned

When iterating over the bound list, we expect all objects there to have their pages pinned (by the bound VMA). So only report those objects with additional pin count on their pages as "pinned". These should be those objects used for display and hardware access. Reported-by: Akash Goel

[Intel-gfx] [PATCH v2 2/3] drm/i915/shrinker: Report "unevictable" pages

Inside the shrinker we call can_release_pages() to indicate whether or not we can make forward progress in freeing up memory by unbinding that object. When adding our report to oom, we should be using the same logic. Whilst here, change the reporting from bytes to pages so that it looks smaller

[Intel-gfx] ✓ Fi.CI.BAT: success for lib: Always NUL terminate ucs2_as_utf8

== Series Details == Series: lib: Always NUL terminate ucs2_as_utf8 URL : https://patchwork.freedesktop.org/series/5969/ State : success == Summary == Series 5969v1 lib: Always NUL terminate ucs2_as_utf8 http://patchwork.freedesktop.org/api/1.0/series/5969/revisions/1/mbox/ bdw-nuci7

[Intel-gfx] [PATCH v2 piglit] igt: Make "warn" status work again as expected, v2.

When writing a patch that adds a igt_warn() when lockdep is unavailable I noticed that the warn error doesn't work any more. Fix this by monitoring stderr, and only setting 'pass' when stderr is empty. Signed-off-by: Maarten Lankhorst Cc: Dylan Baker

Re: [Intel-gfx] [PATCH] drm: fix lut value extraction function

On Mon, Apr 18, 2016 at 08:39:00PM +0100, Emil Velikov wrote: > On 18 April 2016 at 16:53, Daniel Vetter wrote: > > On Mon, Apr 18, 2016 at 03:40:11PM +0100, Emil Velikov wrote: > >> On 18 April 2016 at 13:36, Daniel Vetter wrote: > >> > On Mon, Apr 18, 2016 at

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/shrinker: Only report objects with extra pinned pages as pinned

== Series Details == Series: drm/i915/shrinker: Only report objects with extra pinned pages as pinned URL : https://patchwork.freedesktop.org/series/5968/ State : success == Summary == Series 5968v1 drm/i915/shrinker: Only report objects with extra pinned pages as pinned

[Intel-gfx] [PATCH] drm/i915: Cache DisplayPort link signal levels

Cache DisplayPort signal levels including voltage swing and pre-emphasis. After resume, the DP link is re-trained by trying previusly computed voltage swing and pre-emphasis. In case, we are not able to train the link by using these settings, the link training is restarted. Now, the link is

Re: [Intel-gfx] i915 driver stack trace on laptop docking event

On Wed, 20 Apr 2016, Colin Kincaid Williams wrote: > bump I'm not sure you properly appreciate the amount of email people here handle. > On Tue, Apr 19, 2016 at 4:05 AM, Colin Kincaid Williams > wrote: >> Hello, >> >> I tried to find the appropriate place to

Re: [Intel-gfx] [PATCH] lib: Always NUL terminate ucs2_as_utf8

On Wed, Apr 20, 2016 at 11:36:37AM +0200, Laszlo Ersek wrote: > On 04/20/16 10:37, Chris Wilson wrote: > > If the caller, in this case efivarfs_callback(), only provides sufficent > > room for the expanded utf8 and not enough to include the terminating NUL > > byte, that NUL byte is skipped. > >

Re: [Intel-gfx] [PATCH 1/2] drm/i915: refactor i915_gem_object_pin_map()

On 19/04/16 20:50, Chris Wilson wrote: On Tue, Apr 19, 2016 at 06:40:07PM +0100, Dave Gordon wrote: From: Alex Dai The recently-added i915_gem_object_pin_map() can be further optimised for "small" objects. To facilitate this, and simplify the error paths before adding the

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Move ioremap_wc tracking onto VMA

On Wed, Apr 20, 2016 at 11:10:54AM +0200, Luis R. Rodriguez wrote: > On Tue, Apr 19, 2016 at 01:33:58PM +0100, Chris Wilson wrote: > > diff --git a/drivers/gpu/drm/i915/i915_gem.c > > b/drivers/gpu/drm/i915/i915_gem.c > > index 6ce2c31b9a81..9ef47329e8ae 100644 > > ---

Re: [Intel-gfx] [PATCH] lib: Always NUL terminate ucs2_as_utf8

On 04/20/16 10:37, Chris Wilson wrote: > If the caller, in this case efivarfs_callback(), only provides sufficent > room for the expanded utf8 and not enough to include the terminating NUL > byte, that NUL byte is skipped. How does that occur? In efivarfs_callback() [fs/efivarfs/super.c], we have

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Move ioremap_wc tracking onto VMA

On Tue, Apr 19, 2016 at 01:33:58PM +0100, Chris Wilson wrote: > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 6ce2c31b9a81..9ef47329e8ae 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -3346,6 +3346,15 @@ static

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [resend-for-CI,1/3] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist

On 19/04/16 18:24, Patchwork wrote: == Series Details == Series: series starting with [resend-for-CI,1/3] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist URL : https://patchwork.freedesktop.org/series/5944/ State : failure == Summary == Series 5944v1 Series

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport (rev4)

On 19/04/16 16:54, Patchwork wrote: == Series Details == Series: drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport (rev4) URL : https://patchwork.freedesktop.org/series/5367/ State : success == Summary == Series 5367v4 drm/i915/gen9: implement

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/shrinker: Only report objects with extra pinned pages as pinned

== Series Details == Series: drm/i915/shrinker: Only report objects with extra pinned pages as pinned URL : https://patchwork.freedesktop.org/series/5968/ State : success == Summary == Series 5968v1 drm/i915/shrinker: Only report objects with extra pinned pages as pinned

Re: [Intel-gfx] [PATCH] drm/i915/shrinker: Only report objects with extra pinned pages as pinned

On ke, 2016-04-20 at 08:43 +0100, Chris Wilson wrote: > When iterating over the bound list, we expect all objects there to have > their pages pinned (by the bound VMA). So only add those objects with > additional pin count on their pages as "pinned". These should be those > objects used for

Re: [Intel-gfx] SkyLake

On Tue, 19 Apr 2016, cac...@quantum-sci.com wrote: > Confirmed: Xen is completely busted for Skylake. Kernel can't boot due > to i915 core dump. Please file a bug at [1] with the dmesg attached. BR, Jani. [1] https://bugs.freedesktop.org/enter_bug.cgi?product=DRI=DRM/Intel PS. I'd understand

Re: [Intel-gfx] [PATCH v3 3/3] drm/i915/guc: local optimisations and updating comments

On 19/04/16 17:38, Dave Gordon wrote: On 19/04/16 16:08, Tvrtko Ursulin wrote: On 19/04/16 12:45, Dave Gordon wrote: Tidying up guc_init_proc_desc() and adding commentary to the client structure after the recent change in GuC page mapping strategy. Signed-off-by: Dave Gordon

[Intel-gfx] [PATCH] lib: Always NUL terminate ucs2_as_utf8

If the caller, in this case efivarfs_callback(), only provides sufficent room for the expanded utf8 and not enough to include the terminating NUL byte, that NUL byte is skipped. When the caller then interprets it as a string, it may then read from past its allocated memory: [ 170.605647]

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/shrinker: Only report objects with extra pinned pages as pinned

== Series Details == Series: drm/i915/shrinker: Only report objects with extra pinned pages as pinned URL : https://patchwork.freedesktop.org/series/5968/ State : failure == Summary == Series 5968v1 drm/i915/shrinker: Only report objects with extra pinned pages as pinned

[Intel-gfx] [PATCH] drm/i915/shrinker: Only report objects with extra pinned pages as pinned

When iterating over the bound list, we expect all objects there to have their pages pinned (by the bound VMA). So only add those objects with additional pin count on their pages as "pinned". These should be those objects used for display and hardware access. Reported-by: Akash Goel

Re: [Intel-gfx] [PATCH 19/19] drm/i915: Allow async update of pageflips.

Op 19-04-16 om 09:52 schreef Maarten Lankhorst: > Signed-off-by: Maarten Lankhorst > Uh oh, kbuild found a missing drm_crtc_vblank_get, no idea why I didn't notice this myself. Appended delta for readability. --- diff --git

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Fix modeset handling during gpu reset.

Op 11-04-16 om 08:23 schreef Maarten Lankhorst: > This function would call drm_modeset_lock_all, while the suspend/resume > functions already have their own locking. Fix this by factoring out > __intel_display_resume, and calling the atomic helpers for duplicating > atomic state and disabling all

Re: [Intel-gfx] [PATCH] drm/i915: Set legacy properties when using legacy gamma set IOCTL. (v2)

Op 19-04-16 om 12:13 schreef Lionel Landwerlin: > On 19/04/16 07:02, Maarten Lankhorst wrote: >> Op 18-04-16 om 18:47 schreef Bob Paauwe: >>> The i915 driver is now using atomic properties and atomic commit >>> to handle the legacy set gamma IOCTL. However, if the driver is >>> configured without

Re: [Intel-gfx] [PATCH] drm/i915: Set legacy properties when using legacy gamma set IOCTL. (v2)

Op 19-04-16 om 18:20 schreef Bob Paauwe: > On Tue, 19 Apr 2016 08:05:26 +0200 > Maarten Lankhorst wrote: > >> Op 18-04-16 om 18:47 schreef Bob Paauwe: >>> The i915 driver is now using atomic properties and atomic commit >>> to handle the legacy set gamma IOCTL.

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