[Intel-gfx] ✗ Fi.CI.IGT: warning for igt/kms_psr_sink_crc: Add psr_drrs subtest

== Series Details == Series: igt/kms_psr_sink_crc: Add psr_drrs subtest URL : https://patchwork.freedesktop.org/series/30460/ State : warning == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 +1 Test kms_cursor_crc:

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/kms_psr_sink_crc: Add psr_drrs subtest

== Series Details == Series: igt/kms_psr_sink_crc: Add psr_drrs subtest URL : https://patchwork.freedesktop.org/series/30460/ State : success == Summary == IGT patchset tested on top of latest successful build 93f72b23156589964b87bb9ca7c94c104976303c meson: Process intel_aubdump.in into

[Intel-gfx] [igt] igt/kms_psr_sink_crc: Add psr_drrs subtest

Platforms do not support psr and drrs simultaneously. Adding a subtest to make the check. Cc: Rodrigo Vivi Cc: Daniel Vetter Signed-off-by: Radhakrishna Sripada --- tests/kms_psr_sink_crc.c | 14 ++ 1

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev3)

== Series Details == Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev3) URL : https://patchwork.freedesktop.org/series/30384/ State : success == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252

[Intel-gfx] ✗ Fi.CI.BAT: failure for GuC code restructuring and fixes (rev2)

== Series Details == Series: GuC code restructuring and fixes (rev2) URL : https://patchwork.freedesktop.org/series/30351/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK

[Intel-gfx] [PATCH 11/11] drm/i915/guc: Remove i915_guc_log_unregister

Functionality needed to disable GuC interrupts and cleanup the runtime/relay data structures is already covered in the unload path via intel_guc_fini_hw and intel_guc_cleanup hence remove i915_guc_log_unregister v2: Removed the function i915_guc_log_unregister. Cc: Michal Wajdeczko

[Intel-gfx] [PATCH 09/11] drm/i915/guc: Fix GuC HW/SW state cleanup in unload path

Teardown of GuC HW/SW state was not properly done in unload path. guc_submission_disable was called as part of intel_uc_fini_hw which happens post gem_unload in the i915_driver_unload path. s/i915_gem_fini/i915_gem_cleanup as it looks more suitable as that function does cleanup. To differentiate

[Intel-gfx] [PATCH 07/11] drm/i915/huc: Move HuC specific declarations from intel_uc.h to intel_huc.h

Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_huc.h | 9 + drivers/gpu/drm/i915/intel_uc.h | 11

[Intel-gfx] [PATCH 08/11] drm/i915/guc: Fix GuC interaction in reset/suspend scenarios

guc_ggtt_invalidate/guc_interrupts should be disabled towards end of reset/suspend post GuC suspension as these are setup back again during recovery/resume. Prepared helpers intel_guc_pause and intel_guc_unpause that will do teardown/bringup of this setup along with suspension/resumption of GuC

[Intel-gfx] [PATCH 10/11] drm/i915/guc: Enable default/critical logging in GuC by default from GuC v9

With GuC v9, new type of Default/critical logging in GuC to enable capturing minimal important logs in production systems efficiently. This patch enables this logging in GuC by default always. It should be noted that streaming support with half-full interrupt mechanism that is present for normal

[Intel-gfx] [PATCH 04/11] drm/i915/guc: Move guc_sample_forcewake to intel_guc.c

Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/intel_guc.c | 16 drivers/gpu/drm/i915/intel_guc.h | 1 + drivers/gpu/drm/i915/intel_uc.c |

[Intel-gfx] [PATCH 03/11] drm/i915/guc: Move guc_send_* functions to intel_guc.c

s/guc_init_send_regs/intel_guc_init_send_regs. Calling intel_guc_init_send_regs from intel_uc_init_hw. Moved below functions to intel_guc.c from intel_uc.c 1. guc_send_regs 2. intel_guc_init_send_regs 3. intel_guc_send_mmio Cc: Michal Wajdeczko Cc: Michał Winiarski

[Intel-gfx] [PATCH 01/11] drm/i915/guc: Pass intel_guc to intel_guc_suspend/resume instead of drm_i915_private

Also put the declaration under the i915_guc_submission section in intel_uc.h. Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_drv.c| 6 +++---

[Intel-gfx] [PATCH 00/11] GuC code restructuring and fixes

This series is based on https://patchwork.freedesktop.org/series/30345/. Sagar Arun Kamble (11): drm/i915/guc: Pass intel_guc to intel_guc_suspend/resume instead of drm_i915_private drm/i915/guc: Create intel_guc.c for defining GuC specific functionality drm/i915/guc: Move

[Intel-gfx] [PATCH 05/11] drm/i915: Reorganize HuC authentication

Prepared intel_auth_huc to separate HuC specific functionality from GuC send action. Created new header intel_huc.h to group HuC specific declarations. Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble

[Intel-gfx] [PATCH 06/11] drm/i915/guc: Move GuC specific declarations from intel_uc.h to intel_guc.h

Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_guc.h | 126 +++

[Intel-gfx] [PATCH 02/11] drm/i915/guc: Create intel_guc.c for defining GuC specific functionality

Create intel_guc.c and move guc communication init functionality from intel_uc.c. Prepared new initialization function intel_guc_init_early. Moved below functions to intel_guc.c. 1. intel_guc_send_nop 2. gen8_guc_raise_irq And below functions to intel_guc.h. 1. intel_guc_send 2. intel_guc_notify

Re: [Intel-gfx] [PATCH i-g-t] meson: Fix IGT_GIT_SHA1 handling

Reviewed-by: Jordan Justen On 2017-09-15 06:59:54, Ville Syrjala wrote: > From: Ville Syrjälä > > Tell meson about the dependency on version.h. Avoids the compiler > falling over on account of IGT_GIT_SHA1 not being there. > >

Re: [Intel-gfx] [PATCH i-g-t] meson: Install the (dis)assembler

Reviewed-by: Jordan Justen On 2017-09-15 06:35:52, Ville Syrjala wrote: > From: Ville Syrjälä > > Install the assembler and disassemebler binaries, and the accompanying > pkg-config file. Change libbrw into a static library since we

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/7] tools/intel_watermark: Don't require master

== Series Details == Series: series starting with [1/7] tools/intel_watermark: Don't require master URL : https://patchwork.freedesktop.org/series/30442/ State : failure == Summary == Test gem_flink_race: Subgroup flink_close: pass -> FAIL (shard-hsw)

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev3)

== Series Details == Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev3) URL : https://patchwork.freedesktop.org/series/30384/ State : success == Summary == Series 30384v3 drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

Re: [Intel-gfx] [PATCH v2] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

On Fri, Sep 15, 2017 at 11:09 AM, Ville Syrjälä wrote: > On Fri, Sep 15, 2017 at 10:49:09AM -0700, James Ausmus wrote: >> Make intel_dp_add_mst_connector handle error returns from the drm_ calls. >> Add intel_connector_free to support cleanup on the error path. >>

[Intel-gfx] [PATCH v3] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

Make intel_dp_add_mst_connector handle error returns from the drm_ calls. Add intel_connector_free to support cleanup on the error path. v2: Rename new function to avoid confusion, and simplify error paths (Ville) v3: Indentation fixup, style fixes (Ville) Signed-off-by: James Ausmus

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev2)

== Series Details == Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev2) URL : https://patchwork.freedesktop.org/series/30384/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 Test

Re: [Intel-gfx] [PATCH 8/9] drm/i915/dp: Protect link training with connection mutex

On Fri, Sep 15, 2017 at 11:38 AM, Manasi Navare wrote: > On Thu, Sep 14, 2017 at 03:26:37PM -0700, Ausmus, James wrote: >> On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan >> wrote: >> > The other instances of link training are

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Cancel all ready but queued requests when wedging (rev2)

== Series Details == Series: drm/i915: Cancel all ready but queued requests when wedging (rev2) URL : https://patchwork.freedesktop.org/series/30434/ State : warning == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 Test

Re: [Intel-gfx] [PATCH] drm/i915/dp: Fix the channel equalization failure condition during Link Training

On Thu, Aug 24, 2017 at 10:15:42AM -0700, Manasi Navare wrote: > On Thu, Aug 24, 2017 at 03:33:27PM +0300, Ville Syrjälä wrote: > > On Thu, Aug 17, 2017 at 08:03:04PM -0700, Manasi Navare wrote: > > > In the channel EQ retry loop, we break from the loop in case > > > of failure to get link status

Re: [Intel-gfx] [PATCH 8/9] drm/i915/dp: Protect link training with connection mutex

On Thu, Sep 14, 2017 at 03:26:37PM -0700, Ausmus, James wrote: > On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan > wrote: > > The other instances of link training are protected with > > connection_mutex, so do the same in check_mst_status() too. > > We don't

Re: [Intel-gfx] [PATCH 9/9] drm/i915/dp: Remove redundant can_mst checks in intel_dp_configure_mst()

On Thu, 2017-09-14 at 15:36 -0700, Ausmus, James wrote: > On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan > wrote: > > intel_dp_can_mst() performs these checks. > > > > Signed-off-by: Dhinakaran Pandiyan > > --- > >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] tools/intel_watermark: Don't require master

== Series Details == Series: series starting with [1/7] tools/intel_watermark: Don't require master URL : https://patchwork.freedesktop.org/series/30442/ State : success == Summary == IGT patchset tested on top of latest successful build 93f72b23156589964b87bb9ca7c94c104976303c meson: Process

Re: [Intel-gfx] [PATCH 8/9] drm/i915/dp: Protect link training with connection mutex

On Thu, 2017-09-14 at 15:26 -0700, Ausmus, James wrote: > On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan > wrote: > > The other instances of link training are protected with > > connection_mutex, so do the same in check_mst_status() too. > > We don't seem to

Re: [Intel-gfx] [PATCH v7] drm/i915/edp: Be less aggressive about changing link config on eDP

The patch looks good for eDP link training optimizations. Reviewed-by: Manasi Navare Manasi On Tue, Aug 22, 2017 at 09:34:46AM -0700, Jim Bride wrote: > This set of changes has some history to them. There were several attempts > to add what was called "fast link

Re: [Intel-gfx] [PATCH v2] drm/i915: Cancel all ready but queued requests when wedging

On Fri, Sep 15, 2017 at 06:31:00PM +0100, Chris Wilson wrote: > When wedging the hw, we want to mark all in-flight requests as -EIO. > This is made slightly more complex by execlists who store the ready but > not yet submitted-to-hw requests on a private queue (an rbtree > priolist). Call into

Re: [Intel-gfx] [PATCH v2] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

On Fri, Sep 15, 2017 at 10:49:09AM -0700, James Ausmus wrote: > Make intel_dp_add_mst_connector handle error returns from the drm_ calls. > Add intel_connector_free to support cleanup on the error path. > > v2: Rename new function to avoid confusion, and simplify error > paths (Ville) > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev2)

== Series Details == Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev2) URL : https://patchwork.freedesktop.org/series/30384/ State : success == Summary == Series 30384v2 drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

Re: [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES

On Thu, Sep 14, 2017 at 09:12:50AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES > URL : https://patchwork.freedesktop.org/series/30336/ > State : warning > > == Summary == > > Test kms_cursor_legacy: >

[Intel-gfx] [PATCH i-g-t 7/7] tools/intel_watermark: Try not to dump nonexistent planes on SKL+

From: Dhinakaran Pandiyan Having registers for nonexistent planes in the dumpo might end up being rather confusing. Try to only include real planes. Signed-off-by: Ville Syrjälä --- tools/intel_watermark.c | 40

[Intel-gfx] [PATCH i-g-t 5/7] tools/intel_watermark: Polish SKL+ register dump output a bit

From: Ville Syrjälä Print hex numbers with "0x" prefix, and make the output a bit more compact. Signed-off-by: Ville Syrjälä --- tools/intel_watermark.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t 6/7] tools/intel_watermark: Dump WM_LINETIME on SKL+

From: Ville Syrjälä Signed-off-by: Ville Syrjälä --- tools/intel_watermark.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c index 24ecaa780be5..ce920192295b

[Intel-gfx] [PATCH i-g-t 4/7] tools/intel_watermark: Eliminate pointless %s in printf()

From: Ville Syrjälä Signed-off-by: Ville Syrjälä --- tools/intel_watermark.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c index

[Intel-gfx] [PATCH i-g-t 1/7] tools/intel_watermark: Don't require master

From: Ville Syrjälä A register dumper that can't run with the driver loaded is useless most of the time. Signed-off-by: Ville Syrjälä --- tools/intel_watermark.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH i-g-t 2/7] tools/intel_watermark: Print linetime wms in usec

From: Ville Syrjälä Let's print the linetime watermarks un usecs. Might make it easier to spot bogus values. Signed-off-by: Ville Syrjälä --- tools/intel_watermark.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff

[Intel-gfx] [PATCH i-g-t 3/7] tools/intel_watermark: Update intel_watermark with SKL support

From: Dhinakaran Pandiyan Added support to print SKL watermark and DDB registers. v2: Printed raw register data, renamed planes and combined two printf()'s (Ville) Signed-off-by: Dhinakaran Pandiyan [vsyrjala: make it build, fix

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cancel all ready but queued requests when wedging (rev2)

== Series Details == Series: drm/i915: Cancel all ready but queued requests when wedging (rev2) URL : https://patchwork.freedesktop.org/series/30434/ State : success == Summary == Series 30434v2 drm/i915: Cancel all ready but queued requests when wedging

[Intel-gfx] [PATCH v2] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

Make intel_dp_add_mst_connector handle error returns from the drm_ calls. Add intel_connector_free to support cleanup on the error path. v2: Rename new function to avoid confusion, and simplify error paths (Ville) Signed-off-by: James Ausmus --- Note that this patch is

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Add module parameter to force en-/disable dithering.

== Series Details == Series: series starting with [1/2] drm/i915: Add module parameter to force en-/disable dithering. URL : https://patchwork.freedesktop.org/series/30428/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw)

[Intel-gfx] [PATCH v2] drm/i915: Cancel all ready but queued requests when wedging

When wedging the hw, we want to mark all in-flight requests as -EIO. This is made slightly more complex by execlists who store the ready but not yet submitted-to-hw requests on a private queue (an rbtree priolist). Call into execlists to cancel not only the ELSP tracking for the submitted

Re: [Intel-gfx] [PATCH igt] igt/gem_eio: Check wedged with inflight on the same engine

On Thu, Sep 14, 2017 at 02:50:56PM +0100, Chris Wilson wrote: > Some overlap with gem_exec_fence, but confirm that light for waiting on > a fence (both native and external), that a request queued is also > flagged as EIO upon wedging. There's something wrong with the construction of this

Re: [Intel-gfx] [PATCH] drm/i915: Cancel all ready but queued requests when wedging

Quoting Michał Winiarski (2017-09-15 18:16:16) > On Fri, Sep 15, 2017 at 05:59:30PM +0100, Chris Wilson wrote: > > Quoting Chris Wilson (2017-09-15 17:49:16) > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h > > > b/drivers/gpu/drm/i915/intel_ringbuffer.h > > > index

Re: [Intel-gfx] [PATCH] drm/i915: Cancel all ready but queued requests when wedging

On Fri, Sep 15, 2017 at 05:59:30PM +0100, Chris Wilson wrote: > Quoting Chris Wilson (2017-09-15 17:49:16) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h > > b/drivers/gpu/drm/i915/intel_ringbuffer.h > > index abf171c3cb9c..04fc50c993bf 100644 > > ---

Re: [Intel-gfx] [PATCH] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

On Fri, Sep 15, 2017 at 3:18 AM, Ville Syrjälä wrote: > On Thu, Sep 14, 2017 at 12:59:35PM -0700, James Ausmus wrote: >> Make intel_dp_add_mst_connector handle error returns from the drm_ calls. >> Add intel_connector_destroy to support cleanup on the error path. >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cancel all ready but queued requests when wedging

== Series Details == Series: drm/i915: Cancel all ready but queued requests when wedging URL : https://patchwork.freedesktop.org/series/30434/ State : success == Summary == Series 30434v1 drm/i915: Cancel all ready but queued requests when wedging

Re: [Intel-gfx] [PATCH igt] igt/gem_eio: Exercise wedged with native in-flight requests

On Thu, Sep 14, 2017 at 02:50:09PM +0100, Chris Wilson wrote: > If we wedged one engine with unready requests to a second engine > (blocked by waiting on requests from the first, using a dma-fence), > check that we propagate the -EIO to those in-flight requests. > > v2: check all ABI engines > >

Re: [Intel-gfx] [PATCH] drm/i915: Cancel all ready but queued requests when wedging

Quoting Chris Wilson (2017-09-15 17:49:16) > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h > b/drivers/gpu/drm/i915/intel_ringbuffer.h > index abf171c3cb9c..04fc50c993bf 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -306,6

Re: [Intel-gfx] [PATCH] drm/i915: Cancel all ready but queued requests when wedging

Quoting Chris Wilson (2017-09-15 17:49:16) > When wedging the hw, we want to mark all in-flight requests as -EIO. > This is made slightly more complex by execlists who store the ready but > not yet submitted-to-hw requests on a private queue (an rbtree > priolist). Call into execlists to cancel

[Intel-gfx] ✓ Fi.CI.IGT: success for meson: Install the (dis)assembler (rev2)

== Series Details == Series: meson: Install the (dis)assembler (rev2) URL : https://patchwork.freedesktop.org/series/30420/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test perf: Subgroup

Re: [Intel-gfx] [PATCH igt] igt/gem_eio: Add another variant of in-flight to avoid request coalescing

Quoting Michał Winiarski (2017-09-15 17:47:27) > On Fri, Sep 15, 2017 at 05:10:25PM +0100, Chris Wilson wrote: > > Break up request coalescing by submitting a queue of requests from > > different contexts. This makes sure that we mark all ready but not yet > > submitted-to-hw requests as

[Intel-gfx] [PATCH] drm/i915: Cancel all ready but queued requests when wedging

When wedging the hw, we want to mark all in-flight requests as -EIO. This is made slightly more complex by execlists who store the ready but not yet submitted-to-hw requests on a private queue (an rbtree priolist). Call into execlists to cancel not only the ELSP tracking for the submitted

Re: [Intel-gfx] [PATCH igt] igt/gem_eio: Add another variant of in-flight to avoid request coalescing

On Fri, Sep 15, 2017 at 05:10:25PM +0100, Chris Wilson wrote: > Break up request coalescing by submitting a queue of requests from > different contexts. This makes sure that we mark all ready but not yet > submitted-to-hw requests as completed/EIO upon wedging. > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH 0/8] drm/fb-helper: Use drm_file to get a dumb framebuffer

Den 15.09.2017 00.29, skrev Laurent Pinchart: Hi Noralf, On Wednesday, 13 September 2017 18:19:22 EEST Noralf Trønnes wrote: Den 13.09.2017 07.09, skrev Laurent Pinchart: On Monday, 11 September 2017 17:31:54 EEST Noralf Trønnes wrote: Hi, I want to start out by saying that this patchset

[Intel-gfx] [PATCH igt] igt/gem_eio: Add another variant of in-flight to avoid request coalescing

Break up request coalescing by submitting a queue of requests from different contexts. This makes sure that we mark all ready but not yet submitted-to-hw requests as completed/EIO upon wedging. Signed-off-by: Chris Wilson Cc: Michał Winiarski

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add module parameter to force en-/disable dithering.

== Series Details == Series: series starting with [1/2] drm/i915: Add module parameter to force en-/disable dithering. URL : https://patchwork.freedesktop.org/series/30428/ State : success == Summary == Series 30428v1 series starting with [1/2] drm/i915: Add module parameter to force

[Intel-gfx] ✗ Fi.CI.IGT: warning for meson: Install the (dis)assembler

== Series Details == Series: meson: Install the (dis)assembler URL : https://patchwork.freedesktop.org/series/30420/ State : warning == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-indfb-fliptrack: pass -> DMESG-WARN (shard-hsw) Test

[Intel-gfx] [PATCH 1/2] drm/i915: Add module parameter to force en-/disable dithering.

i915.enable_dithering allows to force dithering on all outputs on (=1) or off (=0). The default is -1 for current automatic per-pipe selection. This is useful for debugging and for special case scenarios, e.g., providing simulated 10 bpc output on 8 bpc digital sinks if a 10 bpc framebuffer +

[Intel-gfx] [PATCH 2/2] drm/i915: Add module parameter to en-/disable hw color correction.

The new module parameter enable_hw_color_correction defaults to true, to retain the current behaviour. If set to false, it will disable all hardware color correction, like gamma/degamma and csc. This is useful for debugging gamma table / csc precision problems, and to ensure unmodified pixel

[Intel-gfx] Module parameters to override color management/dithering.

Hi, so these two patches add i915 module parameters to globally override how the driver handles dithering and gamma/csc conversion. They serve two purposes: First as debug aid and "airbag" for working around potential precision problems in getting pixels from rendering to the display outputs.

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Try to recover from a wedged GPU during reset tests

== Series Details == Series: drm/i915/selftests: Try to recover from a wedged GPU during reset tests URL : https://patchwork.freedesktop.org/series/30419/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 +1

Re: [Intel-gfx] [PATCH] drm/i915/gen9+: Set same power state before hibernation image save/restore

On Wed, Aug 16, 2017 at 05:46:07PM +0300, Imre Deak wrote: > Atm, on GEN9 big core platforms before saving the hibernation image we > uninitialize the display, disabling power wells manually, while before > restoring the image we keep things powered (letting HW/DMC power down > things as needed).

[Intel-gfx] ✓ Fi.CI.BAT: success for meson: Install the (dis)assembler (rev2)

== Series Details == Series: meson: Install the (dis)assembler (rev2) URL : https://patchwork.freedesktop.org/series/30420/ State : success == Summary == IGT patchset tested on top of latest successful build 93f72b23156589964b87bb9ca7c94c104976303c meson: Process intel_aubdump.in into

[Intel-gfx] ✓ Fi.CI.BAT: success for meson: Install the (dis)assembler

== Series Details == Series: meson: Install the (dis)assembler URL : https://patchwork.freedesktop.org/series/30420/ State : success == Summary == IGT patchset tested on top of latest successful build 93f72b23156589964b87bb9ca7c94c104976303c meson: Process intel_aubdump.in into intel_aubdump

[Intel-gfx] [PATCH i-g-t] meson: Fix IGT_GIT_SHA1 handling

From: Ville Syrjälä Tell meson about the dependency on version.h. Avoids the compiler falling over on account of IGT_GIT_SHA1 not being there. Signed-off-by: Ville Syrjälä --- lib/meson.build | 8 1 file changed, 4

[Intel-gfx] [PATCH i-g-t] meson: Install the (dis)assembler

From: Ville Syrjälä Install the assembler and disassemebler binaries, and the accompanying pkg-config file. Change libbrw into a static library since we don't want to install that. Signed-off-by: Ville Syrjälä ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Try to recover from a wedged GPU during reset tests

== Series Details == Series: drm/i915/selftests: Try to recover from a wedged GPU during reset tests URL : https://patchwork.freedesktop.org/series/30419/ State : success == Summary == Series 30419v1 drm/i915/selftests: Try to recover from a wedged GPU during reset tests

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Try to recover from a wedged GPU during reset tests

Quoting Chris Wilson (2017-09-15 14:09:29) > If we see the seqno stop progressing, we abandon the test for fear that > the GPU died following the reset. However, during test teardown we still > wait for the GPU to idle before continuing, but we have already > confirmed that the GPU is dead.

Re: [Intel-gfx] [PATCH 2/6] meson: Install libigt.so

On Fri, Sep 15, 2017 at 02:56:04PM +0300, Petri Latvala wrote: > On Thu, Sep 14, 2017 at 05:20:47PM -0700, Jordan Justen wrote: > > On 2017-09-14 12:13:08, Ville Syrjälä wrote: > > > I don't actually know what the plan is w.r.t. installing the lib, so > > > I'll leave this one for someone else to

[Intel-gfx] [PATCH] drm/i915/selftests: Try to recover from a wedged GPU during reset tests

If we see the seqno stop progressing, we abandon the test for fear that the GPU died following the reset. However, during test teardown we still wait for the GPU to idle before continuing, but we have already confirmed that the GPU is dead. Furthermore, since we are inside a reset test, we have

Re: [Intel-gfx] [PATCH v3 2/2] drm: add backwards compatibility support for drm_kms_helper.edid_firmware

On Tue, Sep 12, 2017 at 11:19:27AM +0300, Jani Nikula wrote: > If drm_kms_helper.edid_firmware module parameter is set at > drm_kms_helper probe time, update the new drm.edid_firmware parameter > for backwards compatibility. > > The drm_kms_helper.edid_firmware is now read-only in sysfs to

Re: [Intel-gfx] [PATCH v3 1/2] drm: handle override and firmware EDID at drm_do_get_edid() level

On Tue, Sep 12, 2017 at 11:19:26AM +0300, Jani Nikula wrote: > Handle debugfs override edid and firmware edid at the low level to > transparently and completely replace the real edid. Previously, we > practically only used the modes from the override EDID, and none of the > other data, such as

Re: [Intel-gfx] [PATCH 2/6] meson: Install libigt.so

On Thu, Sep 14, 2017 at 05:20:47PM -0700, Jordan Justen wrote: > On 2017-09-14 12:13:08, Ville Syrjälä wrote: > > I don't actually know what the plan is w.r.t. installing the lib, so > > I'll leave this one for someone else to ack/nack. The plan is to install the lib. The concerns with

Re: [Intel-gfx] [PATCH v2 00/16] drm/i915: Redo old gmch irq handling

On Thu, Sep 14, 2017 at 03:55:54PM +0100, Chris Wilson wrote: > Quoting Chris Wilson (2017-09-14 15:54:35) > > Quoting Ville Syrjälä (2017-09-14 15:50:14) > > Leaving > > > > drm/i915: Remove duplicated irq_preinstall/uninstall hooks > > which I can't remember enough and will need to read again.

Re: [Intel-gfx] [PATCH v3 3/5] drm/i915: Extend private i915_param_named macro with description

On Fri, 15 Sep 2017, Chris Wilson wrote: > Quoting Michal Wajdeczko (2017-09-14 16:08:03) >> We're always specifying description of each module param in >> separate macro. Let's combine description into our main macro. >> Started with Coccinelle, followed by minor

Re: [Intel-gfx] [RFC 02/11] drm/i915: Add intel_energy_uJ

On 15/09/2017 11:38, Chris Wilson wrote: Quoting Ville Syrjälä (2017-09-15 11:34:03) On Fri, Sep 15, 2017 at 11:07:21AM +0100, Tvrtko Ursulin wrote: On 15/09/2017 09:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-15 07:56:00) On 14/09/2017 21:36, Ville Syrjälä wrote: On Mon, Sep

Re: [Intel-gfx] [RFC 02/11] drm/i915: Add intel_energy_uJ

Quoting Ville Syrjälä (2017-09-15 11:34:03) > On Fri, Sep 15, 2017 at 11:07:21AM +0100, Tvrtko Ursulin wrote: > > > > On 15/09/2017 09:51, Chris Wilson wrote: > > > Quoting Tvrtko Ursulin (2017-09-15 07:56:00) > > >> > > >> On 14/09/2017 21:36, Ville Syrjälä wrote: > > >>> On Mon, Sep 11, 2017 at

Re: [Intel-gfx] [RFC 02/11] drm/i915: Add intel_energy_uJ

On Fri, Sep 15, 2017 at 11:07:21AM +0100, Tvrtko Ursulin wrote: > > On 15/09/2017 09:51, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2017-09-15 07:56:00) > >> > >> On 14/09/2017 21:36, Ville Syrjälä wrote: > >>> On Mon, Sep 11, 2017 at 04:25:50PM +0100, Tvrtko Ursulin wrote: > From:

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Enable scanline read for gen9 dsi

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > Vidya Srinivas > Sent: Thursday, September 14, 2017 5:42 PM > To: intel-gfx@lists.freedesktop.org > Cc: Srinivas, Vidya > Subject: [Intel-gfx] [PATCH 1/2]

Re: [Intel-gfx] [PATCH] drm/i915: Increase the busyspin durations for i915_wait_request

Quoting Tvrtko Ursulin (2017-09-15 11:01:02) > > On 14/09/2017 10:58, Chris Wilson wrote: > > An interesting discussion regarding "hybrid interrupt polling" for NVMe > > came to the conclusion that the ideal busyspin before sleeping was half > > of the expected request latency (and better if it

Re: [Intel-gfx] [PATCH] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

On Thu, Sep 14, 2017 at 12:59:35PM -0700, James Ausmus wrote: > Make intel_dp_add_mst_connector handle error returns from the drm_ calls. > Add intel_connector_destroy to support cleanup on the error path. That name makes one think that it could be plugged into the connector .destroy() hook. So

Re: [Intel-gfx] [PATCH 8/9] drm/i915/dp: Protect link training with connection mutex

On Tue, Sep 12, 2017 at 04:57:29PM -0700, Dhinakaran Pandiyan wrote: > The other instances of link training are protected with > connection_mutex, so do the same in check_mst_status() too. > > Signed-off-by: Dhinakaran Pandiyan > --- >

Re: [Intel-gfx] [RFC 02/11] drm/i915: Add intel_energy_uJ

On 15/09/2017 09:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-15 07:56:00) On 14/09/2017 21:36, Ville Syrjälä wrote: On Mon, Sep 11, 2017 at 04:25:50PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Extract code from i915_energy_uJ (debugfs) so it

Re: [Intel-gfx] [PATCH] drm/i915: Don't rmw PIPESTAT enable bits

On Thu, Sep 14, 2017 at 09:37:37PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2017-09-14 16:17:31) > > From: Ville Syrjälä > > > > i830 seems to occasionally forget the PIPESTAT enable bits when > > we read the register. These aren't the only registers on

Re: [Intel-gfx] [PATCH v3 3/5] drm/i915: Extend private i915_param_named macro with description

Quoting Michal Wajdeczko (2017-09-14 16:08:03) > We're always specifying description of each module param in > separate macro. Let's combine description into our main macro. > Started with Coccinelle, followed by minor cleanup. > > @match1@ > declarer name MODULE_PARM_DESC; > identifier n; >

Re: [Intel-gfx] [PATCH] drm/i915: Increase the busyspin durations for i915_wait_request

On 14/09/2017 10:58, Chris Wilson wrote: An interesting discussion regarding "hybrid interrupt polling" for NVMe came to the conclusion that the ideal busyspin before sleeping was half of the expected request latency (and better if it was already halfway through that request). This suggested

Re: [Intel-gfx] [PATCH v3 2/5] drm/i915: Introduce custom variant of module_param_named macro

Quoting Michal Wajdeczko (2017-09-14 16:08:02) > As we now use same name for public module param and its local > representation we can simplify param definition macro. > > Changes done with Coccinelle: > > @@ > declarer name module_param_named; > declarer name module_param_named_unsafe; >

Re: [Intel-gfx] [PATCH] drm/i915: Remove uused 'in_vbl' from i915_get_crtc_scanoutpos()

Quoting Ville Syrjälä (2017-09-14 18:42:14) > On Thu, Sep 14, 2017 at 05:42:13PM +0100, Chris Wilson wrote: > > Commit 1bf6ad622b9b ("drm/vblank: drop the mode argument from > > drm_calc_vbltimestamp_from_scanoutpos") removed the use of in_vbl, but > > did not remove the local variable. Do so now.

Re: [Intel-gfx] [RFC v3 11/11] drm/i915: Gate engine stats collection with a static key

On 14/09/2017 21:22, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-13 13:18:19) From: Tvrtko Ursulin This reduces the cost of the software engine busyness tracking to a single no-op instruction when there are no listeners. v2: Rebase and some comments. v3:

Re: [Intel-gfx] [RFC 10/11] drm/i915: Export engine stats API to other users

On 14/09/2017 21:26, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-11 16:25:58) From: Tvrtko Ursulin Other kernel users might want to look at total GPU busyness in order to implement things like package power distribution algorithms more efficiently. Who are

Re: [Intel-gfx] [RFC 08/11] drm/i915: Export engine busy stats in debugfs

On 14/09/2017 21:17, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-11 16:25:56) From: Tvrtko Ursulin Export the stats added in the previous patch in debugfs. Number of active clients reading this data is tracked and the static key is only enabled whilst there

Re: [Intel-gfx] [RFC 07/11] drm/i915: Engine busy time tracking

On 14/09/2017 21:16, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-11 16:25:55) From: Tvrtko Ursulin Track total time requests have been executing on the hardware. We add new kernel API to allow software tracking of time GPU engines are spending executing

Re: [Intel-gfx] [PATCH] drm/i915: Increase the busyspin durations for i915_wait_request

Quoting Kamble, Sagar A (2017-09-15 10:15:31) > Thanks Chris. LGTM. > > Minor inputs below > > > On 9/14/2017 3:28 PM, Chris Wilson wrote: > > An interesting discussion regarding "hybrid interrupt polling" for NVMe > > came to the conclusion that the ideal busyspin before sleeping was half > >

Re: [Intel-gfx] [RFC v5 05/11] drm/i915/pmu: Suspend sampling when GPU is idle

On 14/09/2017 20:57, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-09-13 11:34:17) From: Tvrtko Ursulin If only a subset of events is enabled we can afford to suspend the sampling timer when the GPU is idle and so save some cycles and power. v2: Rebase and limit

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