[Intel-gfx] ✗ Fi.CI.IGT: failure for HDCP1.4 Fixes - II

2018-12-04 Thread Patchwork
== Series Details == Series: HDCP1.4 Fixes - II URL : https://patchwork.freedesktop.org/series/53493/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5261_full -> Patchwork_11012_full Summary --- **FAILURE**

Re: [Intel-gfx] [PATCH v11 00/23] drm/i915/icl: dsi enabling

2018-12-04 Thread Lisovskiy, Stanislav
Hi Jani, I've tried previously with branch icl-dsi-2018-12-03 for your github repo. I think it has everything except this 4.12.2018 "fix transcoder state readout" commit. I will apply it and try with that now, thanks. Best Regards, Lisovskiy Stanislav Organization: Intel Finland Oy - BIC

Re: [Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI inforframe functions

2018-12-04 Thread Andrzej Hajda
On 04.12.2018 20:02, Ville Syrjälä wrote: > On Tue, Dec 04, 2018 at 08:03:53AM +0100, Andrzej Hajda wrote: >> On 03.12.2018 22:48, Ville Syrjälä wrote: >>> On Thu, Nov 29, 2018 at 09:46:16AM +0100, Andrzej Hajda wrote: Quite late, hopefully not too late. On 21.11.2018 12:51,

Re: [Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI inforframe functions

2018-12-04 Thread Laurent Pinchart
Hi Ville, On Tuesday, 4 December 2018 21:13:20 EET Ville Syrjälä wrote: > On Tue, Dec 04, 2018 at 08:46:53AM +0100, Andrzej Hajda wrote: > > On 03.12.2018 22:38, Ville Syrjälä wrote: > >> On Thu, Nov 29, 2018 at 10:08:07AM +0100, Andrzej Hajda wrote: > >>> On 21.11.2018 19:19, Laurent Pinchart

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Dial down workaround debug messages

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Dial down workaround debug messages URL : https://patchwork.freedesktop.org/series/53490/ State : success == Summary == CI Bug Log - changes from CI_DRM_5260_full -> Patchwork_11011_full Summary

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/fbc/cnl: Add GLK and CNL+ hardware tracking area

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/fbc/cnl: Add GLK and CNL+ hardware tracking area URL : https://patchwork.freedesktop.org/series/53515/ State : success == Summary == CI Bug Log - changes from CI_DRM_5263 -> Patchwork_11016 Summary

[Intel-gfx] [PATCH] drm/i915/fbc/cnl: Add GLK and CNL+ hardware tracking area

2018-12-04 Thread José Roberto de Souza
GLK and CNL+ supports a bigger FBC tracking area. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_fbc.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/icl: combo port vswing programming changes per BSPEC (rev3)

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/icl: combo port vswing programming changes per BSPEC (rev3) URL : https://patchwork.freedesktop.org/series/53340/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5263 -> Patchwork_11015

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: combo port vswing programming changes per BSPEC (rev3)

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/icl: combo port vswing programming changes per BSPEC (rev3) URL : https://patchwork.freedesktop.org/series/53340/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9a181831a873 drm/i915/icl: combo port vswing programming changes per BSPEC

[Intel-gfx] [PATCH v3] drm/i915/icl: combo port vswing programming changes per BSPEC

2018-12-04 Thread clinton . a . taylor
From: Clint Taylor In August 2018 the BSPEC changed the ICL port programming sequence to closely resemble earlier gen programming sequence. v2: remove debug code that Imre found v3: simplify translation table if-else BSpec: 21257 Cc: Ville Syrjälä Cc: Imre Deak Cc: Rodrigo Vivi

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks URL : https://patchwork.freedesktop.org/series/53510/ State : success == Summary == CI Bug Log - changes from CI_DRM_5263 -> Patchwork_11014

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks URL : https://patchwork.freedesktop.org/series/53510/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7d15d6359a35 drm/i915/psr: Allow PSR2 to be enabled when

[Intel-gfx] [PATCH 4/5] drm/i915: Add PSR2 selective update status registers and bits definitions

2018-12-04 Thread José Roberto de Souza
This register contains how many blocks was sent in the past selective updates. Those registers are not kept set all the times but pulling it after flip can show that the expected values are set for the current frame and the previous ones too. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan

[Intel-gfx] [PATCH 5/5] drm/i915/debugfs: Print PSR selective update status register values

2018-12-04 Thread José Roberto de Souza
The value of this registers will be used to test if PSR2 is doing selective update and if the number of blocks match with the expected. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_debugfs.c | 42 ++--- 1

[Intel-gfx] [PATCH 1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks

2018-12-04 Thread José Roberto de Souza
For now PSR2 is still disabled by default for all platforms but is our intention to let debugfs to enable it for debug and tests proporses, so intel_psr2_enabled() that is also used by debugfs to decide if PSR2 is going to be enabled needs to take in consideration the debug field. Cc: Dhinakaran

[Intel-gfx] [PATCH 3/5] drm/i915/psr: Do not print last attempted entry or exit in PSR debugfs while in PSR2

2018-12-04 Thread José Roberto de Souza
PSR2 only trigger interruptions for AUX error, so let's not print useless information in debugsfs. Also adding a comment to intel_psr_irq_handler() about that. Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +-

[Intel-gfx] [PATCH 2/5] drm/i915: Refactor PSR status debugfs

2018-12-04 Thread José Roberto de Souza
The old debugfs fields was not following a naming partern and it was a bit confusing. So it went from: ~$ sudo more /sys/kernel/debug/dri/0/i915_edp_psr_status Sink_Support: yes PSR mode: PSR1 Enabled: yes Busy frontbuffer bits: 0x000 Main link in standby mode: no HW Enabled & Active bit: yes

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Allocate a common scratch page URL : https://patchwork.freedesktop.org/series/53477/ State : success == Summary == CI Bug Log - changes from CI_DRM_5256_full -> Patchwork_11010_full

Re: [Intel-gfx] [PATCH 7/7] drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs

2018-12-04 Thread Dhinakaran Pandiyan
On Thu, 2018-11-15 at 12:57 -0800, Souza, Jose wrote: > On Mon, 2018-11-12 at 11:17 +0100, Maarten Lankhorst wrote: > > Op 09-11-18 om 21:20 schreef José Roberto de Souza: > > > If panel supports DRRS and PSR and if driver is loaded without > > > PSR > > > enabled, driver will enable DRRS as

Re: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug

2018-12-04 Thread Dhinakaran Pandiyan
On Tue, 2018-12-04 at 10:52 -0800, Souza, Jose wrote: > On Mon, 2018-12-03 at 18:58 -0800, Dhinakaran Pandiyan wrote: > > On Mon, 2018-12-03 at 17:54 -0800, Souza, Jose wrote: > > > On Mon, 2018-12-03 at 17:33 -0800, Dhinakaran Pandiyan wrote: > > > > On Thu, 2018-11-29 at 18:31 -0800, José

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels

2018-12-04 Thread Souza, Jose
Patches merged to drm-intel-next-queued, thanks for the reviews DK and Rodrigo. On Tue, 2018-12-04 at 03:05 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple > panels > URL : https://patchwork.freedesktop.org/series/53448/ >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsc: Add Per connector debugfs node for DSC support/enable (rev2)

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/dsc: Add Per connector debugfs node for DSC support/enable (rev2) URL : https://patchwork.freedesktop.org/series/53449/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5262 -> Patchwork_11013

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsc: Add Per connector debugfs node for DSC support/enable (rev2)

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/dsc: Add Per connector debugfs node for DSC support/enable (rev2) URL : https://patchwork.freedesktop.org/series/53449/ State : warning == Summary == $ dim checkpatch origin/drm-tip 60eb08c39119 drm/i915/dsc: Add Per connector debugfs node for DSC

Re: [Intel-gfx] [PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific SU granularity

2018-12-04 Thread Souza, Jose
On Tue, 2018-12-04 at 12:02 -0800, Dhinakaran Pandiyan wrote: > On Mon, 2018-12-03 at 16:34 -0800, José Roberto de Souza wrote: > > According to eDP spec, sink can required specific selective update > > granularity that source must comply. > > Here caching the value if required and checking if

Re: [Intel-gfx] [PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific SU granularity

2018-12-04 Thread Dhinakaran Pandiyan
On Mon, 2018-12-03 at 16:34 -0800, José Roberto de Souza wrote: > According to eDP spec, sink can required specific selective update > granularity that source must comply. > Here caching the value if required and checking if source supports > it. > > v3: > - Returning the default granularity in

[Intel-gfx] [PATCH v6] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

2018-12-04 Thread Manasi Navare
DSC can be supported per DP connector. This patch adds a per connector debugfs node to expose DSC support capability by the kernel. The same node can be used from userspace to force DSC enable. force_dsc_en written through this debugfs node is used to force DSC even for lower resolutions. v6: *

Re: [Intel-gfx] [PATCH] drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Ville Syrjälä
On Tue, Dec 04, 2018 at 11:46:39AM +0200, Mika Kahola wrote: > Occasionally, we get the following error in our CI runs > > [853.132830] Workqueue: events i915_hotplug_work_func [i915] > [853.132844] RIP: 0010:drm_wait_one_vblank+0x19b/0x1b0 > [853.132852] Code: fe ff ff e8 b7 4e a6 ff 48 89 e6 4c

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Fix platform coverage for HDCP1.4

2018-12-04 Thread Ville Syrjälä
On Tue, Dec 04, 2018 at 11:37:05PM +0530, Ramalingam C wrote: > HDCP1.4 is enabled and validated only on GEN9+ platforms. > > Signed-off-by: Ramalingam C > Reviewed-by: Sean Paul > --- > drivers/gpu/drm/i915/intel_hdcp.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git

Re: [Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI inforframe functions

2018-12-04 Thread Ville Syrjälä
On Tue, Dec 04, 2018 at 08:46:53AM +0100, Andrzej Hajda wrote: > On 03.12.2018 22:38, Ville Syrjälä wrote: > > On Thu, Nov 29, 2018 at 10:08:07AM +0100, Andrzej Hajda wrote: > >> On 21.11.2018 19:19, Laurent Pinchart wrote: > >>> Hi Ville, > >>> > >>> Thank you for the patch. > >>> > >>> On

Re: [Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI inforframe functions

2018-12-04 Thread Ville Syrjälä
On Tue, Dec 04, 2018 at 08:03:53AM +0100, Andrzej Hajda wrote: > On 03.12.2018 22:48, Ville Syrjälä wrote: > > On Thu, Nov 29, 2018 at 09:46:16AM +0100, Andrzej Hajda wrote: > >> Quite late, hopefully not too late. > >> > >> > >> On 21.11.2018 12:51, Ville Syrjälä wrote: > >>> On Wed, Nov 21, 2018

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Dial down workaround debug messages

2018-12-04 Thread Chris Wilson
Quoting Patchwork (2018-12-04 18:35:08) > == Series Details == > > Series: drm/i915: Dial down workaround debug messages > URL : https://patchwork.freedesktop.org/series/53490/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_5260 -> Patchwork_11011 >

[Intel-gfx] ✓ Fi.CI.BAT: success for HDCP1.4 Fixes - II

2018-12-04 Thread Patchwork
== Series Details == Series: HDCP1.4 Fixes - II URL : https://patchwork.freedesktop.org/series/53493/ State : success == Summary == CI Bug Log - changes from CI_DRM_5261 -> Patchwork_11012 Summary --- **SUCCESS** No regressions

Re: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug

2018-12-04 Thread Souza, Jose
On Mon, 2018-12-03 at 18:58 -0800, Dhinakaran Pandiyan wrote: > On Mon, 2018-12-03 at 17:54 -0800, Souza, Jose wrote: > > On Mon, 2018-12-03 at 17:33 -0800, Dhinakaran Pandiyan wrote: > > > On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza wrote: > > > > Changing the i915_edp_psr_debug was

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Dial down workaround debug messages

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Dial down workaround debug messages URL : https://patchwork.freedesktop.org/series/53490/ State : success == Summary == CI Bug Log - changes from CI_DRM_5260 -> Patchwork_11011 Summary ---

[Intel-gfx] [PATCH v3 1/4] drm/i915: Fix GEN9 HDCP1.4 key load process

2018-12-04 Thread Ramalingam C
HDCP1.4 key load process varies between Intel platform to platform. For Gen9 platforms except BXT and GLK, HDCP1.4 key is loaded using the GT Driver Mailbox interface. So all GEN9_BC platforms will use the GT Driver Mailbox interface for HDCP1.4 key load. v2: Using the IS_GEN9_BC for filtering

[Intel-gfx] [PATCH v3 2/4] drm/i915: Fix platform coverage for HDCP1.4

2018-12-04 Thread Ramalingam C
HDCP1.4 is enabled and validated only on GEN9+ platforms. Signed-off-by: Ramalingam C Reviewed-by: Sean Paul --- drivers/gpu/drm/i915/intel_hdcp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index

[Intel-gfx] [PATCH v3 4/4] drm/i915: Increase timeout for Encrypt status change

2018-12-04 Thread Ramalingam C
At enable/disable of the HDCP encryption, for encryption status change we need minimum one frame duration. And we might program this bit any point(start/End) in the previous frame. With 20mSec, observed the timeout for change in encryption status. Since this is not time critical operation and we

[Intel-gfx] [PATCH v3 3/4] drm/i915: debug log for REPLY_ACK missing

2018-12-04 Thread Ramalingam C
Adding a debug log when the DP_AUX_NATIVE_REPLY_ACK is missing for aksv write. This helps to locate the possible non responding DP HDCP sinks. v2: Rewritten for readability [Sean Paul] Signed-off-by: Ramalingam C Reviewed-by: Sean Paul --- drivers/gpu/drm/i915/intel_dp.c | 7 ++- 1 file

[Intel-gfx] [PATCH v3 0/4] HDCP1.4 Fixes - II

2018-12-04 Thread Ramalingam C
Couple of more HDCP1.4 fixes on - Key load process for CFL - Encryption status change time - debug log addition - active platform coverage v1 and v2 went into old series https://patchwork.freedesktop.org/series/38978/ as v8 and v9, due to the same series title. Now changed the title.

[Intel-gfx] [PULL] drm-intel-next

2018-12-04 Thread Jani Nikula
(2018-11-22 16:49:47 +0200) are available in the git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2018-12-04 for you to fetch changes up to 4377d4e0d3d511986033ba7b4182d5a80b7f9ea2: drm/i915: Update DRIVER_DATE to 20181204 (2018-12-04 19:26:17 +0200

[Intel-gfx] HDMI issue with Linux Lite (Ubuntu 18.04)

2018-12-04 Thread Daniel Rojas
Hello, I'm having an issue with my Dell laptop detecting an HDMI TV. My laptop is running Ubuntu 18.04. Are you able to help me? Regards, Daniel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH] drm/i915: Dial down workaround debug messages

2018-12-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-04 17:15:30) > From: Tvrtko Ursulin > > For selftests like live_hangcheck, which does thousands of reset per > second, it is too verbose to log every time we re-apply the workarounds. > > Remove those messages since, coupled with the dedicated selftest, it is >

[Intel-gfx] [PATCH] drm/i915: Dial down workaround debug messages

2018-12-04 Thread Tvrtko Ursulin
From: Tvrtko Ursulin For selftests like live_hangcheck, which does thousands of reset per second, it is too verbose to log every time we re-apply the workarounds. Remove those messages since, coupled with the dedicated selftest, it is sufficient to only log the number of recorded workarounds at

Re: [Intel-gfx] [PATCH v11 00/23] drm/i915/icl: dsi enabling

2018-12-04 Thread Jani Nikula
On Tue, 04 Dec 2018, "Lisovskiy, Stanislav" wrote: > Hi, > > Currently ICL DSI panel seems to work fine, however I still face > mainly two issues, which probably need to be addressed: Please try with current drm-tip with commit 0716931a82b4d0e211d2ef66616ad7130107e455 Author: Jani Nikula

Re: [Intel-gfx] [PATCH] drm/i915/icl: fix transcoder state readout

2018-12-04 Thread Jani Nikula
On Tue, 04 Dec 2018, Imre Deak wrote: > On Tue, Dec 04, 2018 at 12:19:26PM +0200, Jani Nikula wrote: >> Commit 2ca711caeca2 ("drm/i915/icl: Consider DSI for getting transcoder >> state") clobbers the previously read TRANS_DDI_FUNC_CTL_EDP register >> contents with TRANS_DDI_FUNC_CTL_DSI0

Re: [Intel-gfx] [PATCH v11 00/23] drm/i915/icl: dsi enabling

2018-12-04 Thread Lisovskiy, Stanislav
Hi, Currently ICL DSI panel seems to work fine, however I still face mainly two issues, which probably need to be addressed: 1) There is still pipe_config mismatch assertion: [ 13.119965] [drm:pipe_config_err [i915]] *ERROR* mismatch in base.adjusted_mode.crtc_hdisplay (expected 1440, found

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Chris Wilson
Quoting Mika Kuoppala (2018-12-04 15:07:01) > Chris Wilson writes: > > > Currently we allocate a scratch page for each engine, but since we only > > ever write into it for post-sync operations, it is not exposed to > > userspace nor do we care for coherency. As we then do not care about its > >

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Chris Wilson
Quoting Patchwork (2018-12-04 14:48:15) > == Series Details == > > Series: series starting with [1/7] drm/i915: Allocate a common scratch page > URL : https://patchwork.freedesktop.org/series/53477/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_5256 ->

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Mika Kuoppala
Chris Wilson writes: > Currently we allocate a scratch page for each engine, but since we only > ever write into it for post-sync operations, it is not exposed to > userspace nor do we care for coherency. As we then do not care about its > contents, we can use one page for all, reducing our

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: fix transcoder state readout

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/icl: fix transcoder state readout URL : https://patchwork.freedesktop.org/series/53465/ State : success == Summary == CI Bug Log - changes from CI_DRM_5251_full -> Patchwork_11009_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Allocate a common scratch page URL : https://patchwork.freedesktop.org/series/53477/ State : success == Summary == CI Bug Log - changes from CI_DRM_5256 -> Patchwork_11010

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Allocate a common scratch page URL : https://patchwork.freedesktop.org/series/53477/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Allocate a common scratch page

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Allocate a common scratch page URL : https://patchwork.freedesktop.org/series/53477/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2fc4093e46e8 drm/i915: Allocate a common scratch page 90bafab654fd drm/i915:

[Intel-gfx] [PATCH 4/7] drm/i915: Pipeline PDP updates for Braswell

2018-12-04 Thread Chris Wilson
Currently we face a severe problem on Braswell that manifests as invalid ppGTT accesses. The code tries to maintain the PDP (page directory pointers) inside the context in two ways, direct write into the context and a pipelined LRI update. The direct write into the context is fundamentally racy as

[Intel-gfx] [PATCH 3/7] drm/i915/selftests: Reorder request allocation vs vma pinning

2018-12-04 Thread Chris Wilson
Impose a restraint that we have all vma pinned for a request prior to its allocation. This is to simplify request construction, and should facilitate unravelling the lock interdependencies later. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin ---

[Intel-gfx] [PATCH 1/7] drm/i915: Allocate a common scratch page

2018-12-04 Thread Chris Wilson
Currently we allocate a scratch page for each engine, but since we only ever write into it for post-sync operations, it is not exposed to userspace nor do we care for coherency. As we then do not care about its contents, we can use one page for all, reducing our allocations and avoid complications

[Intel-gfx] [PATCH 2/7] drm/i915: Flush GPU relocs harder for gen3

2018-12-04 Thread Chris Wilson
Adding an extra MI_STORE_DWORD_IMM to the gpu relocation path for gen3 was good, but still not good enough. To survive 24+ hours under test we needed to perform not one, not two but three extra store-dw. Doing so for each GPU relocation was a little unsightly and since we need to worry about

[Intel-gfx] [PATCH 6/7] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start

2018-12-04 Thread Chris Wilson
Since commit 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu notifiers") we have been able to report failure from mmu_invalidate_range_start which allows us to use a trylock on the struct_mutex to avoid potential recursion and report -EBUSY instead. Furthermore, this allows us to pull

[Intel-gfx] [PATCH 7/7] drm/i915/userptr: Probe vma range before gup

2018-12-04 Thread Chris Wilson
We want to exclude any GGTT objects from being present on our internal lists to avoid the deadlock we may run into with our requirement for struct_mutex during invalidate. However, if the gup_fast fails, we put the userptr onto the workqueue and mark it as active, so that we remember to serialise

[Intel-gfx] [PATCH 5/7] drm/i915: Return immediately if trylock fails for direct-reclaim

2018-12-04 Thread Chris Wilson
Ignore trying to shrink from i915 if we fail to acquire the struct_mutex in the shrinker while performing direct-reclaim. The trade-off being (much) lower latency for non-i915 clients at an increased risk of being unable to obtain a page from direct-reclaim without hitting the oom-notifier. The

Re: [Intel-gfx] [PATCH] drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Kahola, Mika
On Tue, 2018-12-04 at 11:41 +, Chris Wilson wrote: > Quoting Mika Kahola (2018-12-04 09:46:39) > > Occasionally, we get the following error in our CI runs > > > > [853.132830] Workqueue: events i915_hotplug_work_func [i915] > > [853.132844] RIP: 0010:drm_wait_one_vblank+0x19b/0x1b0 > >

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Wait one vblank before sending hotplug event to userspace URL : https://patchwork.freedesktop.org/series/53463/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11008_full

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for Restore workarounds after engine reset and unify their handling (rev8)

2018-12-04 Thread Tvrtko Ursulin
On 04/12/2018 08:41, Patchwork wrote: == Series Details == Series: Restore workarounds after engine reset and unify their handling (rev8) URL : https://patchwork.freedesktop.org/series/53313/ State : success == Summary == CI Bug Log - changes from CI_DRM_5247 -> Patchwork_11000

Re: [Intel-gfx] [PATCH v3] Return only active connectors for get_resources ioctl

2018-12-04 Thread Jani Nikula
On Thu, 29 Nov 2018, Stanislav Lisovskiy wrote: > Currently kernel might allocate different connector ids > for the same outputs in case of DP MST, which seems to > confuse userspace. There are can be different connector > ids in the list, which could be assigned to the same > output, while being

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for Restore workarounds after engine reset and unify their handling (rev9)

2018-12-04 Thread Chris Wilson
Quoting Patchwork (2018-12-04 09:42:41) > == Series Details == > > Series: Restore workarounds after engine reset and unify their handling (rev9) > URL : https://patchwork.freedesktop.org/series/53313/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_5250_full ->

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Pipeline PDP updates for Braswell

2018-12-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-12-04 11:53:22) > > On 03/12/2018 11:37, Chris Wilson wrote: > > Currently we face a severe problem on Braswell that manifests as invalid > > ppGTT accesses. The code tries to maintain the PDP (page directory > > pointers) inside the context in two ways, direct write

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Pipeline PDP updates for Braswell

2018-12-04 Thread Tvrtko Ursulin
On 03/12/2018 11:37, Chris Wilson wrote: Currently we face a severe problem on Braswell that manifests as invalid ppGTT accesses. The code tries to maintain the PDP (page directory pointers) inside the context in two ways, direct write into the context and a pipelined LRI update. The direct

Re: [Intel-gfx] [PATCH] drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Chris Wilson
Quoting Mika Kahola (2018-12-04 09:46:39) > Occasionally, we get the following error in our CI runs > > [853.132830] Workqueue: events i915_hotplug_work_func [i915] > [853.132844] RIP: 0010:drm_wait_one_vblank+0x19b/0x1b0 > [853.132852] Code: fe ff ff e8 b7 4e a6 ff 48 89 e6 4c 89 ff e8 6c 5f ab

Re: [Intel-gfx] [PATCH] drm/i915/icl: fix transcoder state readout

2018-12-04 Thread Imre Deak
On Tue, Dec 04, 2018 at 12:19:26PM +0200, Jani Nikula wrote: > Commit 2ca711caeca2 ("drm/i915/icl: Consider DSI for getting transcoder > state") clobbers the previously read TRANS_DDI_FUNC_CTL_EDP register > contents with TRANS_DDI_FUNC_CTL_DSI0 contents. Fix the state readout, > and handle DSI 1

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Get pipe id following atomic guidelines (rev2)

2018-12-04 Thread Peres, Martin
On 03/12/2018 22:55, Vivi, Rodrigo wrote: > On Mon, Dec 03, 2018 at 04:29:17AM -0800, Peres, Martin wrote: >> On 30/11/2018 19:27, Vivi, Rodrigo wrote: >>> On Fri, Nov 30, 2018 at 03:04:40PM +0200, Martin Peres wrote: On 29/11/2018 19:36, Rodrigo Vivi wrote: > On Wed, Nov 28,

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] drm/i915/breadcrumbs: Reduce missed-breadcrumb false positive rate (rev2)

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/8] drm/i915/breadcrumbs: Reduce missed-breadcrumb false positive rate (rev2) URL : https://patchwork.freedesktop.org/series/53396/ State : success == Summary == CI Bug Log - changes from CI_DRM_5247_full -> Patchwork_11001_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: fix transcoder state readout

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915/icl: fix transcoder state readout URL : https://patchwork.freedesktop.org/series/53465/ State : success == Summary == CI Bug Log - changes from CI_DRM_5251 -> Patchwork_11009 Summary ---

Re: [Intel-gfx] [PATCH 7/8] drm/i915/selftests: Reorder request allocation vs vma pinning

2018-12-04 Thread Tvrtko Ursulin
On 03/12/2018 11:37, Chris Wilson wrote: Impose a restraint that we have all vma pinned for a request prior to its allocation. This is to simplify request construction, and should facilitate unravelling the lock interdependencies later. Signed-off-by: Chris Wilson ---

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and use it (rev2)

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and use it (rev2) URL : https://patchwork.freedesktop.org/series/53341/ State : success == Summary == CI Bug Log - changes from CI_DRM_5247_full -> Patchwork_11002_full

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Complete the fences as they are cancelled due to wedging

2018-12-04 Thread Tvrtko Ursulin
On 03/12/2018 17:36, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-12-03 17:11:59) On 03/12/2018 11:36, Chris Wilson wrote: We inspect the requests under the assumption that they will be marked as completed when they are removed from the queue. Currently however, in the process of wedging

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Patchwork
== Series Details == Series: drm/i915: Wait one vblank before sending hotplug event to userspace URL : https://patchwork.freedesktop.org/series/53463/ State : success == Summary == CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11008

[Intel-gfx] [PATCH] drm/i915/icl: fix transcoder state readout

2018-12-04 Thread Jani Nikula
Commit 2ca711caeca2 ("drm/i915/icl: Consider DSI for getting transcoder state") clobbers the previously read TRANS_DDI_FUNC_CTL_EDP register contents with TRANS_DDI_FUNC_CTL_DSI0 contents. Fix the state readout, and handle DSI 1 while at it. Use a bitmask for iterating and logging transcoders,

Re: [Intel-gfx] [PATCH] drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Chris Wilson
Quoting Mika Kahola (2018-12-04 09:46:39) > Occasionally, we get the following error in our CI runs What's the actual warn here? This looks to be trimmed too much. > [853.132830] Workqueue: events i915_hotplug_work_func [i915] > [853.132844] RIP: 0010:drm_wait_one_vblank+0x19b/0x1b0 > 15 ff ff

[Intel-gfx] [PATCH] drm/i915: Wait one vblank before sending hotplug event to userspace

2018-12-04 Thread Mika Kahola
Occasionally, we get the following error in our CI runs [853.132830] Workqueue: events i915_hotplug_work_func [i915] [853.132844] RIP: 0010:drm_wait_one_vblank+0x19b/0x1b0 [853.132852] Code: fe ff ff e8 b7 4e a6 ff 48 89 e6 4c 89 ff e8 6c 5f ab ff 45 85 ed 0f 85 15 ff ff ff 89 ee 48 c7 c7 e8 03

[Intel-gfx] ✓ Fi.CI.IGT: success for Restore workarounds after engine reset and unify their handling (rev9)

2018-12-04 Thread Patchwork
== Series Details == Series: Restore workarounds after engine reset and unify their handling (rev9) URL : https://patchwork.freedesktop.org/series/53313/ State : success == Summary == CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11007_full

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Fix inconsistent indenting

2018-12-04 Thread Chris Wilson
Quoting Manasi Navare (2018-12-03 22:55:16) > On Tue, Nov 20, 2018 at 08:24:39PM +, Chris Wilson wrote: > > Always show the FEC capability as it is initialised to 0 before error. > > That is a good point, do you think we should do the same for DSC DPCD and > print > that unconditionally?

[Intel-gfx] ✓ Fi.CI.BAT: success for Restore workarounds after engine reset and unify their handling (rev8)

2018-12-04 Thread Patchwork
== Series Details == Series: Restore workarounds after engine reset and unify their handling (rev8) URL : https://patchwork.freedesktop.org/series/53313/ State : success == Summary == CI Bug Log - changes from CI_DRM_5247 -> Patchwork_11000

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/breadcrumbs: Reduce missed-breadcrumb false positive rate (rev2)

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [1/8] drm/i915/breadcrumbs: Reduce missed-breadcrumb false positive rate (rev2) URL : https://patchwork.freedesktop.org/series/53396/ State : success == Summary == CI Bug Log - changes from CI_DRM_5247 -> Patchwork_11001

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and use it (rev2)

2018-12-04 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and use it (rev2) URL : https://patchwork.freedesktop.org/series/53341/ State : success == Summary == CI Bug Log - changes from CI_DRM_5247 -> Patchwork_11002

[Intel-gfx] ✓ Fi.CI.BAT: success for Restore workarounds after engine reset and unify their handling (rev9)

2018-12-04 Thread Patchwork
== Series Details == Series: Restore workarounds after engine reset and unify their handling (rev9) URL : https://patchwork.freedesktop.org/series/53313/ State : success == Summary == CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11007

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Restore workarounds after engine reset and unify their handling (rev9)

2018-12-04 Thread Patchwork
== Series Details == Series: Restore workarounds after engine reset and unify their handling (rev9) URL : https://patchwork.freedesktop.org/series/53313/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Record GT workarounds in a list

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Restore workarounds after engine reset and unify their handling (rev9)

2018-12-04 Thread Patchwork
== Series Details == Series: Restore workarounds after engine reset and unify their handling (rev9) URL : https://patchwork.freedesktop.org/series/53313/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8fdd7aefba3b drm/i915: Record GT workarounds in a list 506778d9ace9 drm/i915: