On Fri, 30 Aug 2019, Jani Nikula wrote:
> On Fri, 30 Aug 2019, Jani Nikula wrote:
>> On Fri, 30 Aug 2019, Swati Sharma wrote:
>>> Each platform supports different gamma modes and each gamma mode
>>> has different bit precision. Here bit precision corresponds
>>> to number of bits the hw LUT supp
On Fri, 30 Aug 2019, Jani Nikula wrote:
> On Fri, 30 Aug 2019, Swati Sharma wrote:
>> Each platform supports different gamma modes and each gamma mode
>> has different bit precision. Here bit precision corresponds
>> to number of bits the hw LUT supports.
>>
>> Add func per platform to return bit
On Fri, 30 Aug 2019, Swati Sharma wrote:
> Each platform supports different gamma modes and each gamma mode
> has different bit precision. Here bit precision corresponds
> to number of bits the hw LUT supports.
>
> Add func per platform to return bit precision corresponding to gamma mode
> which w
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove link to missing
"Batchbuffer Pools" documentation
URL : https://patchwork.freedesktop.org/series/66046/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6807 -> Patchwork_14234
=
To ensure cross-driver locking compatibility, document the expected
guidelines for implementing the GEM locking in i915. Note that this
is a description of how things should end up after being reworked,
and does not reflect the current state of things.
Signed-off-by: Joonas Lahtinen
Signed-off-by
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/uc: Extract common code from GuC
stop/disable comm
URL : https://patchwork.freedesktop.org/series/66016/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6801_full -> Patchwork_14226_full
===
Op 29-08-2019 om 00:47 schreef Manasi Navare:
> Create a new function intel_commit_modeset_disables() consistent with the
> naming
> in drm atomic helpers and similar to the enable function.
> This helps better organize the disable sequence in atomic_commit_tail()
>
> No functional change
>
> v4:
When we moved the code to disable crtc's to a separate patch,
we forgot to ensure that for_each_oldnew_intel_crtc_in_state_reverse()
was moved as well.
Signed-off-by: Maarten Lankhorst
Fixes: 66d9cec8a6c9 ("drm/i915/display: Move the commit_tail() disable sequence
to separate function")
Cc: Vill
== Series Details ==
Series: drm/i915: adding state checker for gamma lut values (rev13)
URL : https://patchwork.freedesktop.org/series/58039/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6807 -> Patchwork_14233
Summary
--
== Series Details ==
Series: drm/i915/selftests: cond_resched() within the longer buddy tests
URL : https://patchwork.freedesktop.org/series/66013/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6801_full -> Patchwork_14225_full
=
== Series Details ==
Series: drm/i915: adding state checker for gamma lut values (rev13)
URL : https://patchwork.freedesktop.org/series/58039/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/display: Add func to get gamma bit precision
Okay!
C
== Series Details ==
Series: drm/i915: adding state checker for gamma lut values (rev13)
URL : https://patchwork.freedesktop.org/series/58039/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
329aa0177067 drm/i915/display: Add func to get gamma bit precision
b39c8ce28cc7 drm/i915/
== Series Details ==
Series: drm/i915: add Type-C port to encoder name (rev2)
URL : https://patchwork.freedesktop.org/series/65986/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6807 -> Patchwork_14232
Summary
---
**
Quoting Chris Wilson (2019-08-30 10:01:28)
> Quoting Joonas Lahtinen (2019-08-30 09:58:48)
> > The referenced documentation section has been removed. Remove the
> > link to avoid warning when building the documentation.
> >
> > Signed-off-by: Joonas Lahtinen
> > Cc: Chris Wilson
> > Cc: Matthew
Quoting Joonas Lahtinen (2019-08-30 09:58:49)
> Indent GuC/WOPCM documentation correctly to reside under
> "Memory Management and Command Submission" section to avoid
> it escaping to the upper level navigation.
>
> Signed-off-by: Joonas Lahtinen
> Cc: Michal Wajdeczko
> Cc: Daniele Ceraolo Spur
Quoting Joonas Lahtinen (2019-08-30 09:58:48)
> The referenced documentation section has been removed. Remove the
> link to avoid warning when building the documentation.
>
> Signed-off-by: Joonas Lahtinen
> Cc: Chris Wilson
> Cc: Matthew Auld
Reviewed-by: Matthew Auld
-Chris
_
The referenced documentation section has been removed. Remove the
link to avoid warning when building the documentation.
Signed-off-by: Joonas Lahtinen
Cc: Chris Wilson
Cc: Matthew Auld
---
Documentation/gpu/i915.rst | 9 -
1 file changed, 9 deletions(-)
diff --git a/Documentation/gpu
Indent GuC/WOPCM documentation correctly to reside under
"Memory Management and Command Submission" section to avoid
it escaping to the upper level navigation.
Signed-off-by: Joonas Lahtinen
Cc: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
Documentation/gpu/i915.rst | 14 +
For ilk, add hw read out to create hw blob of gamma
lut values.
v4: -No need to initialize *blob [Jani]
-Removed right shifts [Jani]
-Dropped dev local var [Jani]
v5: -Returned blob instead of assigning it internally within the
function [Ville]
-Renamed ilk_get_color_config() to i
Add macro to compare hw/sw gamma lut values. First need to
check whether hw/sw gamma mode matches or not. If not
no need to compare lut values, if matches then only compare
lut entries.
v5: -Called PIPE_CONF_CHECK_COLOR_LUT inside if (!adjust) [Jani]
-Added #undef PIPE_CONF_CHECK_COLOR_LUT [Ja
For the legacy(gen < 4) gamma, add hw read out to create hw blob of gamma
lut values. Also, add function intel_color_lut_pack to convert hw value
with given bit precision to lut property val.
v4: -No need to initialize *blob [Jani]
-Removed right shifts [Jani]
-Dropped dev local var [Jani]
For cherryview, add hw read out to create hw blob of gamma
lut values.
v4: -No need to initialize *blob [Jani]
-Removed right shifts [Jani]
-Dropped dev local var [Jani]
v5: -Returned blob instead of assigning it internally within the
function [Ville]
-Renamed function cherryview_
Add func intel_color_lut_equal() to compare hw/sw gamma
lut values. Since hw/sw gamma lut sizes and lut entries comparison
will be different for different gamma modes, add gamma mode dependent
checks.
v3: -Rebase
v4: -Renamed intel_compare_color_lut() to intel_color_lut_equal() [Jani]
-Added t
For i965, add hw read out to create hw blob of gamma
lut values.
v4: -No need to initialize *blob [Jani]
-Removed right shifts [Jani]
-Dropped dev local var [Jani]
v5: -Returned blob instead of assigning it internally
within the function [Ville]
-Renamed i965_get_color_config() to
For icl+, add hw read out to create hw blob of gamma
lut values. icl+ platforms supports multi segmented gamma
mode, add hw lut creation for this mode.
This will be used to validate gamma programming using dsb
(display state buffer) which is a tgl feature.
v4: -No need to initialize *blob [Jani]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 8d6f3c4..c560c91 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
For glk, add hw read out to create hw blob of gamma
lut values.
v4: -No need to initialize *blob [Jani]
-Removed right shifts [Jani]
-Dropped dev local var [Jani]
v5: -Returned blob instead of assigning it internally within the
function [Ville]
-Renamed glk_get_color_config() to g
Each platform supports different gamma modes and each gamma mode
has different bit precision. Here bit precision corresponds
to number of bits the hw LUT supports.
Add func per platform to return bit precision corresponding to gamma mode
which will be later used as a parameter in lut comparison fu
Add debug log for color related parameters like gamma_mode, gamma_enable,
csc_enable, etc inside intel_dump_pipe_config().
v6: -Added debug log for color para in intel_dump_pipe_config [Jani]
v7: -Split patch 3 into 4 patches
v8: -Corrected alignment [Uma]
Signed-off-by: Swati Sharma
---
driver
In this patch series, added state checker to validate gamma
(8BIT and 10BIT).This reads hardware state, and compares the originally
requested state(s/w) to the state read from the hardware.
This is done for legacy, i965, ilk, glk and their variant platforms.
Intentionally, excluded bdw and ivb si
>-Original Message-
>From: dri-devel On Behalf Of
>Ramalingam
>C
>Sent: Wednesday, August 28, 2019 10:12 PM
>To: intel-gfx ; dri-devel de...@lists.freedesktop.org>
>Cc: Nikula, Jani ; Winkler, Tomas
>
>Subject: [PATCH v12 0/6] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+
>
>Enabling the
On Thu, 2019-08-29 at 13:52 -0700, Matt Roper wrote:
> When choosing a low resolution mode to switch to, we search the
> connector's mode list for a mode that's small enough that a plane
> positioned in the bottom left corner of the screen in the original mode
> will be fully offscreen in the new,
On Thu, 2019-08-29 at 09:47 -0700, Matt Roper wrote:
> This test performs display updates via COMMIT_ATOMIC, but fails to check
> that the platform being tested actually supports atomic. This causes
> failures on some of our older pre-gen5 platforms.
>
> Bugzilla: https://bugs.freedesktop.org/sho
== Series Details ==
Series: series starting with [1/4] dma-buf: change DMA-buf locking convention
URL : https://patchwork.freedesktop.org/series/66006/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6801_full -> Patchwork_14224_full
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