Re: [Intel-gfx] [PATCH] drm/i915/perf: Configure OAR controls for specific context

2019-11-07 Thread Lionel Landwerlin
On 08/11/2019 01:34, Umesh Nerlige Ramappa wrote: It turns out that the OAR CONTROL register is not getting configured correctly in conjunction with the context save/restore bit. When measuring work for a single context, the OAR counters do not increment. - Configure OAR format and enable OAR

Re: [Intel-gfx] [PATCH 1/2] kbuild: remove header compile test

2019-11-07 Thread yamada.masahiro
Hi Jani, > -Original Message- > From: Jani Nikula > Sent: Thursday, November 07, 2019 5:46 PM > To: Linus Torvalds ; Yamada, Masahiro/山田 > 真弘 ; linux-kbu...@vger.kernel.org > Cc: linux-ker...@vger.kernel.org; intel-gfx@lists.freedesktop.org > Subject: Re: [PATCH 1/2] kbuild: remove

Re: [Intel-gfx] [PATCH 2/2] drm/i915: make more headers self-contained

2019-11-07 Thread Masahiro Yamada
d forward > struct declarations. > > Signed-off-by: Masahiro Yamada > --- I confirmed this patch is applicable to next-20191107 but CI fails to apply it. Which branch should I base my patch on? > > drivers/gpu/drm/i915/gem/selftests/mock_context.h | 3 +++ > drivers/gpu/dr

[Intel-gfx] [PATCH 0/1] dg1: enable dsb back

2019-11-07 Thread Lucas De Marchi
Commit a096883dda2c ("drm/i915/dsb: Remove PIN_MAPPABLE from the DSB object VMA") fixed it, remove the hack. --- baseline: f681b0ac20073c08e34f5987800b35f45fb69e29 pile-commit: 3f2a85eed3a5be81b1ab3e02426c368f20e5be82 range-diff: 156: 31c4b0cc66c6 < -: INTEL_DII: drm/i915/dg1:

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915: change to_mock() to an inline function

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: change to_mock() to an inline function URL : https://patchwork.freedesktop.org/series/69169/ State : failure == Summary == Applying: drm/i915: change to_mock() to an inline function Applying: drm/i915: make more headers

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Cleanup heartbeat systole first

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/gt: Cleanup heartbeat systole first URL : https://patchwork.freedesktop.org/series/69095/ State : success == Summary == CI Bug Log - changes from CI_DRM_7277_full -> Patchwork_15167_full Summary

[Intel-gfx] [PATCH 1/2] drm/i915: change to_mock() to an inline function

2019-11-07 Thread Masahiro Yamada
Since this function is defined in a header file, it should be 'static inline' instead of 'static'. Signed-off-by: Masahiro Yamada --- drivers/gpu/drm/i915/gem/selftests/mock_dmabuf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 2/2] drm/i915: make more headers self-contained

2019-11-07 Thread Masahiro Yamada
The headers in the gem/selftests/, gt/selftests, gvt/, selftests/ directories have never been compile-tested, but it would be possible to make them self-contained. This commit only addresses missing and forward struct declarations. Signed-off-by: Masahiro Yamada ---

[Intel-gfx] ✓ Fi.CI.IGT: success for Start removing legacy guc code

2019-11-07 Thread Patchwork
== Series Details == Series: Start removing legacy guc code URL : https://patchwork.freedesktop.org/series/69094/ State : success == Summary == CI Bug Log - changes from CI_DRM_7277_full -> Patchwork_15166_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Leave the aliasing-ppgtt size alone

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Leave the aliasing-ppgtt size alone URL : https://patchwork.freedesktop.org/series/69093/ State : success == Summary == CI Bug Log - changes from CI_DRM_7276_full -> Patchwork_15165_full Summary

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/opregion: fix leaking fw on error path

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/opregion: fix leaking fw on error path URL : https://patchwork.freedesktop.org/series/69167/ State : success == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15190

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/opregion: fix leaking fw on error path

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/opregion: fix leaking fw on error path URL : https://patchwork.freedesktop.org/series/69167/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/opregion: fix leaking fw on error

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: Configure OAR controls for specific context (rev2)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/perf: Configure OAR controls for specific context (rev2) URL : https://patchwork.freedesktop.org/series/69165/ State : success == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15189

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/guc: Add GuC method to determine if submission is active.

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/guc: Add GuC method to determine if submission is active. URL : https://patchwork.freedesktop.org/series/69086/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7276_full -> Patchwork_15163_full

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: Configure OAR controls for specific context (rev2)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/perf: Configure OAR controls for specific context (rev2) URL : https://patchwork.freedesktop.org/series/69165/ State : warning == Summary == $ dim checkpatch origin/drm-tip 351573b952cc drm/i915/perf: Configure OAR controls for specific context -:65:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Mark up sole accessor to ctx->vm as being protected

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Mark up sole accessor to ctx->vm as being protected URL : https://patchwork.freedesktop.org/series/69161/ State : success == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15188

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definition

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definition URL : https://patchwork.freedesktop.org/series/69160/ State : success == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15187

Re: [Intel-gfx] [PATCH v5] drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-07 Thread Matt Roper
On Thu, Nov 07, 2019 at 11:22:34PM +0200, Stanislav Lisovskiy wrote: > Also implemented algorithm for choosing DBuf slice configuration > based on active pipes, pipe ratio as stated in BSpec 12716. > > Now pipe allocation still stays proportional to pipe width as before, > however within allowed

Re: [Intel-gfx] linux-next: manual merge of the drm tree with the drm-intel-fixes tree

2019-11-07 Thread Stephen Rothwell
Hi all, This is now a conflict between the drm tree and Linus' tree. On Thu, 31 Oct 2019 11:33:15 +1100 Stephen Rothwell wrote: > > Today's linux-next merge of the drm tree got a conflict in: > > drivers/gpu/drm/i915/i915_drv.h > > between commit: > > 59cd826fb5e7 ("drm/i915: Fix PCH

[Intel-gfx] [PATCH 2/4] drm/i915/bios: rename bios to oprom when mapping pci rom

2019-11-07 Thread Lucas De Marchi
oprom is actually a better name to use when using pci_map_rom(). "bios" is way too generic and confusing. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_bios.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git

[Intel-gfx] [PATCH 3/4] drm/i915/bios: make sure to check vbt size

2019-11-07 Thread Lucas De Marchi
When we call intel_bios_is_valid_vbt(), size may not actually be the size of the VBT, but rather the size of the blob the VBT is contained in. For example, when mapping the PCI oprom, size will be the entire oprom size. We don't want to read beyond what is reported to be the VBT. So make sure we

[Intel-gfx] [PATCH 1/4] drm/i915/opregion: fix leaking fw on error path

2019-11-07 Thread Lucas De Marchi
Convert the code to return-early style and fix missing calls to release_firmware() if vbt is not valid. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_opregion.c | 28 +++ 1 file changed, 17 insertions(+), 11 deletions(-) diff --git

[Intel-gfx] [PATCH 4/4] drm/i915/bios: do not discard address space

2019-11-07 Thread Lucas De Marchi
When we are mapping the VBT through pci_map_rom() we may not be allowed to simply discard the address space and go on reading the memory. After checking on my test system that dumping the rom via sysfs I could actually get the correct vbt, I decided to change the implementation to use the same

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Complete transition to a real struct file mock

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Complete transition to a real struct file mock URL : https://patchwork.freedesktop.org/series/69159/ State : success == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15186

Re: [Intel-gfx] [PATCH 03/13] drm/exynos: Provide ddc symlink in connector's sysfs

2019-11-07 Thread Inki Dae
19. 8. 1. 오전 1:58에 Andrzej Pietrasiewicz 이(가) 쓴 글: > Switch to using the ddc provided by the generic connector. > > Signed-off-by: Andrzej Pietrasiewicz > Acked-by: Sam Ravnborg > Reviewed-by: Emil Velikov Acked-by: Inki Dae Thanks, Inki Dae > --- > drivers/gpu/drm/exynos/exynos_hdmi.c

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Enable second dbuf slice for ICL and TGL (rev2)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev2) URL : https://patchwork.freedesktop.org/series/69124/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15185 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Complete transition to a real struct file mock

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Complete transition to a real struct file mock URL : https://patchwork.freedesktop.org/series/69159/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7013ed43c85d drm/i915/selftests: Complete transition to a real struct file mock

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: fix dropping obj reference twice

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915/gvt: fix dropping obj reference twice URL : https://patchwork.freedesktop.org/series/69084/ State : success == Summary == CI Bug Log - changes from CI_DRM_7275_full -> Patchwork_15162_full Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Enable second dbuf slice for ICL and TGL (rev2)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev2) URL : https://patchwork.freedesktop.org/series/69124/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Enable second dbuf slice for ICL and TGL

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable second dbuf slice for ICL and TGL (rev2)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev2) URL : https://patchwork.freedesktop.org/series/69124/ State : warning == Summary == $ dim checkpatch origin/drm-tip f9ab97f3257e drm/i915: Enable second dbuf slice for ICL and TGL -:260:

Re: [Intel-gfx] [PATCH] drm/i915/perf: Configure OAR controls for specific context

2019-11-07 Thread Umesh Nerlige Ramappa
On Thu, Nov 07, 2019 at 11:30:51PM +, Chris Wilson wrote: Quoting Umesh Nerlige Ramappa (2019-11-07 23:22:34) It turns out that the OAR CONTROL register is not getting configured correctly in conjunction with the context save/restore bit. When measuring work for a single context, the OAR

[Intel-gfx] [PATCH] drm/i915/perf: Configure OAR controls for specific context

2019-11-07 Thread Umesh Nerlige Ramappa
It turns out that the OAR CONTROL register is not getting configured correctly in conjunction with the context save/restore bit. When measuring work for a single context, the OAR counters do not increment. - Configure OAR format and enable OAR counters at the same time as enabling context

Re: [Intel-gfx] [PATCH] drm/i915/perf: Configure OAR controls for specific context

2019-11-07 Thread Chris Wilson
Quoting Umesh Nerlige Ramappa (2019-11-07 23:22:34) > It turns out that the OAR CONTROL register is not getting configured > correctly in conjunction with the context save/restore bit. When > measuring work for a single context, the OAR counters do not increment. > > Configure OAR format and

Re: [Intel-gfx] [PATCH] drm/i915: Split a setting of MSA to MST and SST

2019-11-07 Thread Lucas De Marchi
On Wed, Nov 06, 2019 at 11:26:36PM +0200, Gwan-gyeong Mun wrote: The setting of MSA is done by the DDI .pre_enable() hook. And when we are using MST, the MSA is only set to first mst stream by calling of DDI .pre_eanble() hook. It raies issues to non-first mst streams. Wrong MSA or missed MSA

[Intel-gfx] [PATCH] drm/i915/perf: Configure OAR controls for specific context

2019-11-07 Thread Umesh Nerlige Ramappa
It turns out that the OAR CONTROL register is not getting configured correctly in conjunction with the context save/restore bit. When measuring work for a single context, the OAR counters do not increment. Configure OAR format and enable OAR counters at the same time as enabling context

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-07 Thread Souza, Jose
On Thu, 2019-11-07 at 15:10 -0800, Lucas De Marchi wrote: > On Thu, Nov 07, 2019 at 10:56:09PM +, Jose Souza wrote: > > On Thu, 2019-11-07 at 14:44 -0800, Lucas De Marchi wrote: > > > On Thu, Nov 07, 2019 at 01:45:59PM -0800, Jose Souza wrote: > > > > This register was being enabled after

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't test plane stride with !INTEL_DISPLAY_ENABLED

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Don't test plane stride with !INTEL_DISPLAY_ENABLED URL : https://patchwork.freedesktop.org/series/69155/ State : success == Summary == CI Bug Log - changes from CI_DRM_7290 -> Patchwork_15184 Summary

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-07 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 10:56:09PM +, Jose Souza wrote: On Thu, 2019-11-07 at 14:44 -0800, Lucas De Marchi wrote: On Thu, Nov 07, 2019 at 01:45:59PM -0800, Jose Souza wrote: > This register was being enabled after enable TRANS_DDI_FUNC_CTL and > PIPECONF/TRANS_CONF while BSpec states that

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Don't oops in dumb_create ioctl if we have no crtcs

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Don't oops in dumb_create ioctl if we have no crtcs URL : https://patchwork.freedesktop.org/series/69081/ State : success == Summary == CI Bug Log - changes from CI_DRM_7275_full -> Patchwork_15160_full

Re: [Intel-gfx] [PATCH] drm/i915: disable set/get_tiling ioctl on gen12+

2019-11-07 Thread Brian Welty
On 8/28/2019 11:50 PM, Daniel Vetter wrote: > On Wed, Aug 28, 2019 at 08:31:27PM +, Souza, Jose wrote: >> On Wed, 2019-08-28 at 21:13 +0100, Chris Wilson wrote: >>> Quoting Souza, Jose (2019-08-28 21:11:53) Reviewed-by: José Roberto de Souza >>> >>> It's using a non-standard for i915

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-07 Thread Souza, Jose
On Thu, 2019-11-07 at 14:44 -0800, Lucas De Marchi wrote: > On Thu, Nov 07, 2019 at 01:45:59PM -0800, Jose Souza wrote: > > This register was being enabled after enable TRANS_DDI_FUNC_CTL and > > PIPECONF/TRANS_CONF while BSpec states that it should be set when > > enabling TRANS_DDI_FUNC_CTL. > >

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-07 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 01:45:59PM -0800, Jose Souza wrote: This register was being enabled after enable TRANS_DDI_FUNC_CTL and PIPECONF/TRANS_CONF while BSpec states that it should be set when enabling TRANS_DDI_FUNC_CTL. BSpec: 49190 not what I read here. 8j. Configure TRANS_DDI_FUNC_CTL2

Re: [Intel-gfx] [PATCH] drm/i915: Expand documentation for gen12 DP pre-enable sequence

2019-11-07 Thread Matt Roper
On Thu, Nov 07, 2019 at 12:16:13PM -0800, Souza, Jose wrote: > On Thu, 2019-11-07 at 09:45 -0800, Matt Roper wrote: > > Rather than just specifying the bullet numbers from the bspec (e.g., > > "4.b") actually include the description of what the bspec wants us to > > do. Steps can be renumbered or

Re: [Intel-gfx] [PATCH 1/3] drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definition

2019-11-07 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 01:45:57PM -0800, Jose Souza wrote: TRANS_DDI_MST_TRANSPORT_SELECT is 2 bits wide not 3, it was taking one bit from EDP/DSI Input Select. Fixes: b3545e086877 ("drm/i915/tgl: add support to one DP-MST stream") Cc: Lucas De Marchi Signed-off-by: José Roberto de Souza

[Intel-gfx] [PATCH] drm/i915/selftests: Mark up sole accessor to ctx->vm as being protected

2019-11-07 Thread Chris Wilson
In the selftests, where we are accessing a private ctx from within the confines of a single test, we know that the ctx->vm pointer is static and bounded by the lifetime of the test. We can use a simple helper to provide the RCU annotations to keep sparse happy. Signed-off-by: Chris Wilson ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split a setting of MSA to MST and SST (rev3)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Split a setting of MSA to MST and SST (rev3) URL : https://patchwork.freedesktop.org/series/69092/ State : success == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15183 Summary

[Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-07 Thread José Roberto de Souza
This register was being enabled after enable TRANS_DDI_FUNC_CTL and PIPECONF/TRANS_CONF while BSpec states that it should be set when enabling TRANS_DDI_FUNC_CTL. BSpec: 49190 BSpec: 22243 Cc: Lucas De Marchi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_ddi.c

[Intel-gfx] [PATCH 2/3] drm/i915/display/dsi: Add support to pipe D

2019-11-07 Thread José Roberto de Souza
Adding pipe D support to DSI transcoder. Not adding it for EDP transcoder code paths as only TGL has 4 pipes and it do not have a EDP transcoder. Cc: Lucas De Marchi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/icl_dsi.c | 6 ++ drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] [PATCH 1/3] drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definition

2019-11-07 Thread José Roberto de Souza
TRANS_DDI_MST_TRANSPORT_SELECT is 2 bits wide not 3, it was taking one bit from EDP/DSI Input Select. Fixes: b3545e086877 ("drm/i915/tgl: add support to one DP-MST stream") Cc: Lucas De Marchi Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1

[Intel-gfx] [PATCH] drm/i915/selftests: Complete transition to a real struct file mock

2019-11-07 Thread Chris Wilson
Since drm provided us with a real struct file we can use for our anonymous internal clients (mock_file), complete our transition to using that as the primary interface (and not the mocked up struct drm_file we previous were using). Signed-off-by: Chris Wilson Cc: Matthew Auld ---

[Intel-gfx] [PATCH v5] drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-07 Thread Stanislav Lisovskiy
Also implemented algorithm for choosing DBuf slice configuration based on active pipes, pipe ratio as stated in BSpec 12716. Now pipe allocation still stays proportional to pipe width as before, however within allowed DBuf slice for this particular configuration. v2: Remove unneeded check from

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/5] drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY under a separate Kconfig

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [CI,1/5] drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY under a separate Kconfig URL : https://patchwork.freedesktop.org/series/69147/ State : success == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15182

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/2] drm/i915: lookup for mem_region of a mem_type

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [v4,1/2] drm/i915: lookup for mem_region of a mem_type URL : https://patchwork.freedesktop.org/series/69075/ State : success == Summary == CI Bug Log - changes from CI_DRM_7274_full -> Patchwork_15158_full

Re: [Intel-gfx] [PATCH] drm/i915: Split a setting of MSA to MST and SST

2019-11-07 Thread Souza, Jose
On Wed, 2019-11-06 at 23:26 +0200, Gwan-gyeong Mun wrote: > The setting of MSA is done by the DDI .pre_enable() hook. And when we > are > using MST, the MSA is only set to first mst stream by calling of > DDI .pre_eanble() hook. It raies issues to non-first mst streams. > Wrong MSA or missed MSA

Re: [Intel-gfx] [ANNOUNCEMENT] Documenting tests with igt_describe()

2019-11-07 Thread Chris Wilson
Quoting Arkadiusz Hiler (2019-11-07 17:38:20) > We don't want you to translate C into English, we want you to provide a bit of > that extra information that you would have put in the comments anyway. The comments should exist and are _inline_ with the code. In all the examples of igt_describe() I

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/5] drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY under a separate Kconfig

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [CI,1/5] drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY under a separate Kconfig URL : https://patchwork.freedesktop.org/series/69147/ State : warning == Summary == $ dim checkpatch origin/drm-tip fe079a2c7f06 drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Expand documentation for gen12 DP pre-enable sequence

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Expand documentation for gen12 DP pre-enable sequence URL : https://patchwork.freedesktop.org/series/69146/ State : success == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15181

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/bios: store child devices in a list

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/bios: store child devices in a list URL : https://patchwork.freedesktop.org/series/69143/ State : success == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15179

[Intel-gfx] [PATCH] drm/i915: Don't test plane stride with !INTEL_DISPLAY_ENABLED

2019-11-07 Thread Matt Roper
If INTEL_DISPLAY_ENABLED is false, then the modesetting resources were never initialized. Userspace may still call DRM_IOCTL_MODE_CREATE_DUMB which will eventually lead i915_gem_dumb_create() to try to dereference a non-existent pipe A primary plane while figuring out a proper pitch. We could

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Taint the kernel on dumping the GEM ftrace buffer

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Taint the kernel on dumping the GEM ftrace buffer URL : https://patchwork.freedesktop.org/series/69144/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK

Re: [Intel-gfx] [PATCH] drm/i915: Expand documentation for gen12 DP pre-enable sequence

2019-11-07 Thread Souza, Jose
On Thu, 2019-11-07 at 09:45 -0800, Matt Roper wrote: > Rather than just specifying the bullet numbers from the bspec (e.g., > "4.b") actually include the description of what the bspec wants us to > do. Steps can be renumbered or moved so including the description > will > help us match the code

Re: [Intel-gfx] [PATCH] drm/i915: Expand documentation for gen12 DP pre-enable sequence

2019-11-07 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 09:45:27AM -0800, Matt Roper wrote: Rather than just specifying the bullet numbers from the bspec (e.g., "4.b") actually include the description of what the bspec wants us to do. Steps can be renumbered or moved so including the description will help us match the code up

[Intel-gfx] ✓ Fi.CI.BAT: success for Refactor Gen11+ SAGV support (rev10)

2019-11-07 Thread Patchwork
== Series Details == Series: Refactor Gen11+ SAGV support (rev10) URL : https://patchwork.freedesktop.org/series/68028/ State : success == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15178 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Switch obj->mm.lock lockdep annotations on its head

2019-11-07 Thread Tang, CQ
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c > @@ -22,6 +22,8 @@ > * > */ > > +#include > + > #include "display/intel_frontbuffer.h" > #include "gt/intel_gt.h" > #include "i915_drv.h" > @@ -52,6 +54,14 @@ void

Re: [Intel-gfx] [PATCH] drm/i915/gem: Safely acquire the ctx->vm when copying

2019-11-07 Thread Niranjan Vishwanathapura
On Thu, Nov 07, 2019 at 05:01:14PM +, Chris Wilson wrote: Quoting Niranjan Vishwanathapura (2019-11-07 16:09:31) On Wed, Nov 06, 2019 at 09:13:12AM +, Chris Wilson wrote: >As we read the ctx->vm unlocked before cloning/exporting, we should >validate our reference is correct before

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Refactor Gen11+ SAGV support (rev10)

2019-11-07 Thread Patchwork
== Series Details == Series: Refactor Gen11+ SAGV support (rev10) URL : https://patchwork.freedesktop.org/series/68028/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH V11 4/6] mdev: introduce virtio device and its device ops

2019-11-07 Thread Kirti Wankhede
On 11/7/2019 8:41 PM, Jason Wang wrote: This patch implements basic support for mdev driver that supports virtio transport for kernel virtio driver. Reviewed-by: Cornelia Huck Signed-off-by: Jason Wang I'm not expert on virtio part, my ack is from mdev perspective. Reviewed-by: Kirti

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Refactor Gen11+ SAGV support (rev10)

2019-11-07 Thread Patchwork
== Series Details == Series: Refactor Gen11+ SAGV support (rev10) URL : https://patchwork.freedesktop.org/series/68028/ State : warning == Summary == $ dim checkpatch origin/drm-tip a731ea6228dd drm/i915: Refactor intel_can_enable_sagv -:191: CHECK:PARENTHESIS_ALIGNMENT: Alignment should

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Gamma cleanups

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Gamma cleanups URL : https://patchwork.freedesktop.org/series/69136/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15177 Summary --- **FAILURE** Serious

Re: [Intel-gfx] [PATCH V11 3/6] mdev: introduce device specific ops

2019-11-07 Thread Kirti Wankhede
On 11/7/2019 8:41 PM, Jason Wang wrote: Currently, except for the create and remove, the rest of mdev_parent_ops is designed for vfio-mdev driver only and may not help for kernel mdev driver. With the help of class id, this patch introduces device specific callbacks inside mdev_device

Re: [Intel-gfx] [PATCH V11 2/6] modpost: add support for mdev class id

2019-11-07 Thread Kirti Wankhede
On 11/7/2019 8:41 PM, Jason Wang wrote: Add support to parse mdev class id table. Reviewed-by: Parav Pandit Reviewed-by: Cornelia Huck Signed-off-by: Jason Wang Reviewed-by: Kirti Wankhede Thanks, Kirti --- drivers/vfio/mdev/vfio_mdev.c | 2 ++

Re: [Intel-gfx] [PATCH V11 1/6] mdev: class id support

2019-11-07 Thread Kirti Wankhede
On 11/7/2019 8:41 PM, Jason Wang wrote: Mdev bus only supports vfio driver right now, so it doesn't implement match method. But in the future, we may add drivers other than vfio, the first driver could be virtio-mdev. This means we need to add device class id support in bus match method to

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Gamma cleanups

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Gamma cleanups URL : https://patchwork.freedesktop.org/series/69136/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm: Inline drm_color_lut_extract() +./include/drm/drm_color_mgmt.h:48:28: warning: shift count

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Gamma cleanups URL : https://patchwork.freedesktop.org/series/69136/ State : warning == Summary == $ dim checkpatch origin/drm-tip aab7b7b6ba2e drm: Inline drm_color_lut_extract() 1250c5426804 drm/i915: Polish CHV .load_luts() a bit a30aa9a2a86a

[Intel-gfx] ✓ Fi.CI.BAT: success for mdev based hardware virtio offloading support

2019-11-07 Thread Patchwork
== Series Details == Series: mdev based hardware virtio offloading support URL : https://patchwork.freedesktop.org/series/69135/ State : success == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15176 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for mdev based hardware virtio offloading support

2019-11-07 Thread Patchwork
== Series Details == Series: mdev based hardware virtio offloading support URL : https://patchwork.freedesktop.org/series/69135/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9507b5357d7b mdev: class id support 58af09c8da00 modpost: add support for mdev class id e94f948040f5

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/5] drm: Add __drm_atomic_helper_crtc_state_reset() & co.

2019-11-07 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm: Add __drm_atomic_helper_crtc_state_reset() & co. URL : https://patchwork.freedesktop.org/series/69129/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15175

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Enable second dbuf slice for ICL and TGL URL : https://patchwork.freedesktop.org/series/69124/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7288 -> Patchwork_15174 Summary ---

[Intel-gfx] [CI 3/5] drm/i915/selftests: Replace mock_file hackery with drm's true fake

2019-11-07 Thread Chris Wilson
As drm now exports a method to create an anonymous struct file around a drm_device for internal use, make use of it to avoid our horrible hacks. Danial suggested that the mock_file_put() wrapper was suitable for drm-core, along with the mock_drm_getfile() [and that the vestigal mock_drm_file() in

[Intel-gfx] [CI 5/5] drm/i915/selftests: Verify mmap_gtt revocation on unbinding

2019-11-07 Thread Chris Wilson
Whenever, we unbind (or change fence registers) on an object, we must revoke any and all mmap_gtt using the previous bindings. Those user PTEs point at the GGTT which know points into a new object, the wrong object. Ergo, those PTEs must be cleared so that any user access provokes a new page

[Intel-gfx] [CI 1/5] drm: Move EXPORT_SYMBOL_FOR_TESTS_ONLY under a separate Kconfig

2019-11-07 Thread Chris Wilson
Currently, we only export symbols for drm-selftests which are either compiled as modules or into the main drm builtin. However, if we want to export symbols from drm.ko for the drivers' selftests, we require a means of controlling that export separately. So we add a new Kconfig to determine

[Intel-gfx] [CI 4/5] drm/i915/selftests: Wrap vm_mmap() around GEM objects

2019-11-07 Thread Chris Wilson
Provide a utility function to create a vma corresponding to an mmap() of our device. And use it to exercise the equivalent of userspace performing a GTT mmap of our objects. Signed-off-by: Chris Wilson Cc: Abdiel Janulgue Reviewed-by: Abdiel Janulgue --- drivers/gpu/drm/i915/Makefile

[Intel-gfx] [CI 2/5] drm: Expose a method for creating anonymous struct file around drm_minor

2019-11-07 Thread Chris Wilson
Sometimes we need to create a struct file to wrap a drm_device, as it the user were to have opened /dev/dri/card0 but to do so anonymously (i.e. for internal use). Provide a utility method to create a struct file with the drm_device->driver.fops, that wrap the drm_device. v2: Restrict usage to

Re: [Intel-gfx] i915 HDCP 2.2 TX encryption on Teledyne test instrument

2019-11-07 Thread Voldman, Mikhail
Hi Ram, Can you point me to the: "additional kernel patch for your product to set the desired state as default state of the property at the creation". Mikhail Voldman System Architect Teledyne LeCroy, Protocol Solutions Group 2111 Big Timber Road Elgin, IL  60123 Note new email address: 

[Intel-gfx] [PATCH] drm/i915: Expand documentation for gen12 DP pre-enable sequence

2019-11-07 Thread Matt Roper
Rather than just specifying the bullet numbers from the bspec (e.g., "4.b") actually include the description of what the bspec wants us to do. Steps can be renumbered or moved so including the description will help us match the code up to the spec. Plus if we add support for new platforms, some

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Enable second dbuf slice for ICL and TGL URL : https://patchwork.freedesktop.org/series/69124/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Enable second dbuf slice for ICL and TGL

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Enable second dbuf slice for ICL and TGL URL : https://patchwork.freedesktop.org/series/69124/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2fdfc3b51c5b drm/i915: Enable second dbuf slice for ICL and TGL -:221:

Re: [Intel-gfx] [PATCH 01/12] drm: Inline drm_color_lut_extract()

2019-11-07 Thread Daniel Vetter
On Thu, Nov 07, 2019 at 05:17:14PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > This thing can get called several thousand times per LUT > so seems like we want to inline it to: > - avoid the function call overhead > - allow constant folding > > A quick synthetic test (w/o any hardware

Re: [Intel-gfx] [PATCH 1/5] drm: Add __drm_atomic_helper_crtc_state_reset() & co.

2019-11-07 Thread Daniel Vetter
On Thu, Nov 07, 2019 at 04:24:13PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Annoyingly __drm_atomic_helper_crtc_reset() does two > totally separate things: > a) reset the state to defaults values > b) assign the crtc->state pointer > > I just want a) without the b) so let's split

[Intel-gfx] [ANNOUNCEMENT] Documenting tests with igt_describe()

2019-11-07 Thread Arkadiusz Hiler
Hey all, IGT tests are largely undocumented and a lot of them are quite enigmatic if you haven't internalized the whole framework and are not familiar with naming conventions that some people use. To tackle this we require[0] documenting new tests with igt_describe()[1]. The idea is to provide

Re: [Intel-gfx] [PATCH v3 3/5] drm/i915/selftests: Replace mock_file hackery with drm's true fake

2019-11-07 Thread Daniel Vetter
On Thu, Nov 07, 2019 at 05:17:00PM +, Chris Wilson wrote: > Quoting Daniel Vetter (2019-11-07 08:39:24) > > On Wed, Nov 06, 2019 at 02:24:30PM +, Chris Wilson wrote: > > > As drm now exports a method to create an anonymous struct file around a > > > drm_device for internal use, make use of

Re: [Intel-gfx] [PATCH v3 3/5] drm/i915/selftests: Replace mock_file hackery with drm's true fake

2019-11-07 Thread Matthew Auld
On Wed, 6 Nov 2019 at 14:24, Chris Wilson wrote: > > As drm now exports a method to create an anonymous struct file around a > drm_device for internal use, make use of it to avoid our horrible hacks. > > Signed-off-by: Chris Wilson As per your eventual plan, fwiw, Reviewed-by: Matthew Auld

Re: [Intel-gfx] [PATCH v3 3/5] drm/i915/selftests: Replace mock_file hackery with drm's true fake

2019-11-07 Thread Chris Wilson
Quoting Daniel Vetter (2019-11-07 08:39:24) > On Wed, Nov 06, 2019 at 02:24:30PM +, Chris Wilson wrote: > > As drm now exports a method to create an anonymous struct file around a > > drm_device for internal use, make use of it to avoid our horrible hacks. > > > > Signed-off-by: Chris Wilson

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split a setting of MSA to MST and SST (rev2)

2019-11-07 Thread Patchwork
== Series Details == Series: drm/i915: Split a setting of MSA to MST and SST (rev2) URL : https://patchwork.freedesktop.org/series/69092/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7286 -> Patchwork_15173 Summary

Re: [Intel-gfx] [PATCH] drm/i915/gem: Safely acquire the ctx->vm when copying

2019-11-07 Thread Chris Wilson
Quoting Niranjan Vishwanathapura (2019-11-07 16:09:31) > On Wed, Nov 06, 2019 at 09:13:12AM +, Chris Wilson wrote: > >As we read the ctx->vm unlocked before cloning/exporting, we should > >validate our reference is correct before returning it. We already do for > >clone_vm() but were not so

Re: [Intel-gfx] [PATCH] drm/i915/gem: Safely acquire the ctx->vm when copying

2019-11-07 Thread Niranjan Vishwanathapura
On Wed, Nov 06, 2019 at 09:13:12AM +, Chris Wilson wrote: As we read the ctx->vm unlocked before cloning/exporting, we should validate our reference is correct before returning it. We already do for clone_vm() but were not so strict around get_ppgtt(). Signed-off-by: Chris Wilson ---

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/bios: store child devices in a list

2019-11-07 Thread Ville Syrjälä
On Thu, Nov 07, 2019 at 06:08:53PM +0200, Jani Nikula wrote: > Using the array is getting clumsy. Make things a bit more dynamic. > > Remove early returns on not having child devices when the end result > after "iterating" the empty list would be the same. > > v2: > - stick to previous naming of

[Intel-gfx] [PATCH] drm/i915: Taint the kernel on dumping the GEM ftrace buffer

2019-11-07 Thread Chris Wilson
As the ftrace buffer is single shot, once dumped it will not update. As such, it only provides information for the first bug and all subsequent bugs are noise. The goal of CI is to have zero bugs, so taint the kernel causing CI to reboot the machine; fix the bug and move on. Signed-off-by: Chris

[Intel-gfx] [PATCH v2 2/2] drm/i915/bios: pass devdata to parse_ddi_port

2019-11-07 Thread Jani Nikula
Allow accessing the parent structure later on. Drop const for allowing future modification as well. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_bios.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c

[Intel-gfx] [PATCH v2 1/2] drm/i915/bios: store child devices in a list

2019-11-07 Thread Jani Nikula
Using the array is getting clumsy. Make things a bit more dynamic. Remove early returns on not having child devices when the end result after "iterating" the empty list would be the same. v2: - stick to previous naming of child devices (Ville) - use kzalloc, handle failure - initialize list head

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