Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm: Handle connector tile support only for modes that match tile size

2019-12-16 Thread Tomi Sarvela
On 12/17/19 1:59 AM, Manasi Navare wrote: On Fri, Dec 13, 2019 at 10:54:55AM +0200, Tomi Sarvela wrote: On 12/12/19 11:28 PM, Manasi Navare wrote: The KBL failure does not look related to the changes in this patch series. Tomi, could you confirm if this is a false negative? Manasi The

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Ensure monotonic rc6

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Ensure monotonic rc6 URL : https://patchwork.freedesktop.org/series/70998/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578_full -> Patchwork_15798_full Summary ---

[Intel-gfx] [PATCH] drm/i915: Fix vGPU kernel context kmemleak

2019-12-16 Thread Zhenyu Wang
Current GVT allocates kernel context as vGPU submission context. For vGPU destroy, the kernel context needs to be close then released, otherwise context's vm ppgtt resource would cause memleak issue like below. This trys to add new helper to destroy kernel context for that. unreferenced object

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Add getfb2 ioctl (rev2)

2019-12-16 Thread Patchwork
== Series Details == Series: drm: Add getfb2 ioctl (rev2) URL : https://patchwork.freedesktop.org/series/67553/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15806 Summary --- **SUCCESS** No

Re: [Intel-gfx] linux-next: Tree for Dec 16 (drm_panel & intel_panel)

2019-12-16 Thread Randy Dunlap
m_panel_of_backlight") > > This commit is supposed to fix it. > > Sam > Hi Sam, I don't have the linux-next.git tree so I can't check that. I just built whatever is in linux-next of 20191216. -- ~Randy ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/7] drm/i915/guc: Merge communication_stop and communication_disable

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [v2,1/7] drm/i915/guc: Merge communication_stop and communication_disable URL : https://patchwork.freedesktop.org/series/71020/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15805

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/7] drm/i915/guc: Merge communication_stop and communication_disable

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [v2,1/7] drm/i915/guc: Merge communication_stop and communication_disable URL : https://patchwork.freedesktop.org/series/71020/ State : warning == Summary == $ dim checkpatch origin/drm-tip b1167fe23f5a drm/i915/guc: Merge communication_stop

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Eliminate the trylock for reading a timeline's hwsp (rev3)

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Eliminate the trylock for reading a timeline's hwsp (rev3) URL : https://patchwork.freedesktop.org/series/70997/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15804

Re: [Intel-gfx] linux-next: Tree for Dec 16 (drm_panel & intel_panel)

2019-12-16 Thread Sam Ravnborg
Hi Randy. On Mon, Dec 16, 2019 at 08:25:11AM -0800, Randy Dunlap wrote: > On 12/15/19 9:22 PM, Stephen Rothwell wrote: > > Hi all, > > > > Changes since 20191213: > > > > on x86_64: > > ld: drivers/gpu/drm/drm_panel.o: in function `drm_panel_of_backlight': > (.text+0x2ee): undefined reference

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,01/11] drm: Add __drm_atomic_helper_crtc_state_reset() & co.

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [v3,01/11] drm: Add __drm_atomic_helper_crtc_state_reset() & co. URL : https://patchwork.freedesktop.org/series/71009/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15803

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Eliminate the trylock for awaiting an earlier request

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915: Eliminate the trylock for awaiting an earlier request URL : https://patchwork.freedesktop.org/series/70994/ State : success == Summary == CI Bug Log - changes from CI_DRM_7576_full -> Patchwork_15796_full

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability (rev2)

2019-12-16 Thread Patchwork
== Series Details == Series: Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability (rev2) URL : https://patchwork.freedesktop.org/series/70961/ State : failure == Summary == Applying: capabilities: introduce CAP_SYS_PERFMON to kernel and user space Applying:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: Control panel and backlight enable GPIOs from VBT (rev2)

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Control panel and backlight enable GPIOs from VBT (rev2) URL : https://patchwork.freedesktop.org/series/70945/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15801

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Unpin vma->obj on early error

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Unpin vma->obj on early error URL : https://patchwork.freedesktop.org/series/70990/ State : success == Summary == CI Bug Log - changes from CI_DRM_7576_full -> Patchwork_15795_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915 / LPSS / mfd: Select correct PWM controller to use based on VBT (rev3)

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915 / LPSS / mfd: Select correct PWM controller to use based on VBT (rev3) URL : https://patchwork.freedesktop.org/series/69686/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15800

[Intel-gfx] [PATCH v4 i-g-t 2/2] tests/kms_getfb: Add getfb2 tests

2019-12-16 Thread Juston Li
From: Daniel Stone Mirroring addfb2, add tests for the new ioctl which will return us information about framebuffers containing multiple buffers, as well as modifiers. Changes since v3: - Add subtests to ensure handles aren't returned for non-root and non-master callers - Fix

[Intel-gfx] [PATCH v4 i-g-t 1/2] NOMERGE: Import drm.h up to 54ecb8f7028c

2019-12-16 Thread Juston Li
Depends on ummerged kernel code for getfb2 Rest of drm.h taken from: commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c Author: Linus Torvalds Date: Mon Sep 30 10:35:40 2019 -0700 Linux 5.4-rc1 Signed-off-by: Juston Li --- include/drm-uapi/drm.h | 39

[Intel-gfx] [PATCH v3] drm: Add getfb2 ioctl

2019-12-16 Thread Juston Li
From: Daniel Stone getfb2 allows us to pass multiple planes and modifiers, just like addfb2 over addfb. Changes since v2: - add privilege checks from getfb1 since handles should only be returned to master/root Changes since v1: - unused modifiers set to 0 instead of DRM_FORMAT_MOD_INVALID

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: Control panel and backlight enable GPIOs from VBT (rev2)

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Control panel and backlight enable GPIOs from VBT (rev2) URL : https://patchwork.freedesktop.org/series/70945/ State : warning == Summary == $ dim checkpatch origin/drm-tip ba8ffd907d53 pinctrl: Allow modules to use pinctrl_[un]register_mappings

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915 / LPSS / mfd: Select correct PWM controller to use based on VBT (rev3)

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915 / LPSS / mfd: Select correct PWM controller to use based on VBT (rev3) URL : https://patchwork.freedesktop.org/series/69686/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9a0b084effd9 ACPI / LPSS: Rename pwm_backlight pwm-lookup to

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix typecheck macro in GT_TRACE

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915: Fix typecheck macro in GT_TRACE URL : https://patchwork.freedesktop.org/series/70999/ State : failure == Summary == Applying: drm/i915: Fix typecheck macro in GT_TRACE Using index info to reconstruct a base tree... M

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Ensure monotonic rc6

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Ensure monotonic rc6 URL : https://patchwork.freedesktop.org/series/70998/ State : success == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15798 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/5] drm: Add __drm_atomic_helper_crtc_state_reset() & co. (rev3)

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm: Add __drm_atomic_helper_crtc_state_reset() & co. (rev3) URL : https://patchwork.freedesktop.org/series/69129/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7578 -> Patchwork_15797

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Apply lmem size restriction to get_pages

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/gem: Apply lmem size restriction to get_pages URL : https://patchwork.freedesktop.org/series/70981/ State : success == Summary == CI Bug Log - changes from CI_DRM_7574_full -> Patchwork_15791_full

[Intel-gfx] [PATCH v2 6/7] drm/i915/guc: Unify notify() functions

2019-12-16 Thread Daniele Ceraolo Spurio
The Gen11+ and the legacy function differ in the register and value written to interrupt the GuC. However, while on older gen the value matches a bit on the register, on Gen11+ the value is a SW defined payload that is sent to the FW. Since the FW behaves the same no matter what value we pass to

[Intel-gfx] [PATCH v2 7/7] HAX: force enable_guc=2 and WA i915#571

2019-12-16 Thread Daniele Ceraolo Spurio
To get a full run with GuC loading and HuC auth enabled. Signed-off-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 9 + drivers/gpu/drm/i915/i915_params.h | 2 +- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v2 4/7] drm/i915/guc/ct: Group request-related variables in a sub-structure

2019-12-16 Thread Daniele Ceraolo Spurio
For better isolation of the request tracking from the rest of the CT-related data. v2: split to separate patch, move next_fence to substructure (Michal) Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Cc: John Harrison Cc: Matthew Brost ---

[Intel-gfx] [PATCH v2 5/7] drm/i915/guc: Remove function pointers for send/receive calls

2019-12-16 Thread Daniele Ceraolo Spurio
Since we started using CT buffers on all gens, the function pointers can only be set to either the _nop() or the _ct() functions. Since the _nop() case applies to when the CT are disabled, we can just handle that case in the _ct() functions and call them directly. v2: keep intel_guc_send() and

[Intel-gfx] [PATCH v2 1/7] drm/i915/guc: Merge communication_stop and communication_disable

2019-12-16 Thread Daniele Ceraolo Spurio
The only difference from the GuC POV between guc_communication_stop and guc_communication_disable is that the former can be called after GuC has been reset. Instead of having two separate paths, we can just skip the call into GuC in the disabling path and re-use that. Note that by using the

[Intel-gfx] [PATCH v2 2/7] drm/i915/guc/ct: Drop guards in enable/disable calls

2019-12-16 Thread Daniele Ceraolo Spurio
We track the status of the GuC much more closely now and we expect the enable/disable functions to be correctly called only once. If this isn't true we do want to flag it as a flow failure (via the BUG_ON in the ctch functions) and not silently ignore the call. Suggested-by: Michal Wajdeczko

[Intel-gfx] [PATCH v2 3/7] drm/i915/guc/ct: Stop expecting multiple CT channels

2019-12-16 Thread Daniele Ceraolo Spurio
The GuC supports having multiple CT buffer pairs and we designed our implementation with that in mind. However, the different channels are not processed in parallel within the GuC, so there is very little advantage in having multiple channels (independent locks?), compared to the drawbacks (one

[Intel-gfx] [PATCH] drm/i915/gt: Eliminate the trylock for reading a timeline's hwsp

2019-12-16 Thread Chris Wilson
As we stash a pointer to the HWSP cacheline on the request, when reading it we only need confirm that the cacheline is still valid by checking that the request and timeline are still intact. v2: Protect hwsp_cachline with RCU Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

Re: [Intel-gfx] [PATCH v3 3/3] drm/i915: Add support for integrated privacy screens

2019-12-16 Thread Rajat Jain
On Thu, Dec 5, 2019 at 1:34 AM Rajat Jain wrote: > > Certain laptops now come with panels that have integrated privacy > screens on them. This patch adds support for such panels by adding > a privacy-screen property to the intel_connector for the panel, that > the userspace can then use to

Re: [Intel-gfx] [PATCH v2 2/7] perf/core: open access for CAP_SYS_PERFMON privileged process

2019-12-16 Thread Lubashev, Igor
On Mon, Dec 16, 2019 at 2:15 AM, Alexey Budankov wrote: > > Open access to perf_events monitoring for CAP_SYS_PERFMON privileged > processes. > For backward compatibility reasons access to perf_events subsystem remains > open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage > for

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Ensure monotonic rc6

2019-12-16 Thread Tvrtko Ursulin
On 16/12/2019 20:53, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-12-16 18:20:32) From: Tvrtko Ursulin Avoid rc6 counter going backward in close to 0% RC6 scenarios like: 15.005477996114,246,613 ns i915/rc6-residency/ 16.005876662667,657 ns

[Intel-gfx] [PATCH] drm/i915/gt: Eliminate the trylock for reading a timeline's hwsp

2019-12-16 Thread Chris Wilson
As we stash a pointer to the HWSP cacheline on the request, when reading it we only need confirm that the cacheline is still valid by checking that the request and timeline are still intact. v2: Protect hwsp_cachline with RCU Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- rcu helpers

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm: Handle connector tile support only for modes that match tile size

2019-12-16 Thread Manasi Navare
On Fri, Dec 13, 2019 at 10:54:55AM +0200, Tomi Sarvela wrote: > On 12/12/19 11:28 PM, Manasi Navare wrote: > >The KBL failure does not look related to the changes in this patch series. > >Tomi, could you confirm if this is a false negative? > > > >Manasi > > The failures with the patchset seem

Re: [Intel-gfx] [PATCH v3 06/11] drm/i915/display: Share intel_connector_needs_modeset()

2019-12-16 Thread Lucas De Marchi
On Mon, Dec 16, 2019 at 02:07:37PM -0800, Jose Souza wrote: intel_connector_needs_modeset() will be used outside of intel_display.c in a future patch so it would only be necessary to remove the state and add the prototype to the header file. But while at it, I simplified the arguments and moved

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Eliminate the trylock for awaiting an earlier request

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915: Eliminate the trylock for awaiting an earlier request URL : https://patchwork.freedesktop.org/series/70994/ State : success == Summary == CI Bug Log - changes from CI_DRM_7576 -> Patchwork_15796

Re: [Intel-gfx] [PATCH v3 01/11] drm: Add __drm_atomic_helper_crtc_state_reset() & co.

2019-12-16 Thread Lucas De Marchi
On Mon, Dec 16, 2019 at 02:07:32PM -0800, Jose Souza wrote: From: Ville Syrjälä Annoyingly __drm_atomic_helper_crtc_reset() does two totally separate things: a) reset the state to defaults values b) assign the crtc->state pointer I just want a) without the b) so let's split out part a) into

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Deal with inverted brightness on Thundersoft TST178 tablets

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915: Deal with inverted brightness on Thundersoft TST178 tablets URL : https://patchwork.freedesktop.org/series/70978/ State : success == Summary == CI Bug Log - changes from CI_DRM_7574_full -> Patchwork_15790_full

[Intel-gfx] [PATCH v3 07/11] drm/i915/tgl: Select master transcoder for MST stream

2019-12-16 Thread José Roberto de Souza
On TGL the blending of all the streams have moved from DDI to transcoder, so now every transcoder working over the same MST port must send its stream to a master transcoder and master will send to DDI respecting the time slots. So here adding all the CRTCs that shares the same MST stream if

[Intel-gfx] [PATCH v3 01/11] drm: Add __drm_atomic_helper_crtc_state_reset() & co.

2019-12-16 Thread José Roberto de Souza
From: Ville Syrjälä Annoyingly __drm_atomic_helper_crtc_reset() does two totally separate things: a) reset the state to defaults values b) assign the crtc->state pointer I just want a) without the b) so let's split out part a) into __drm_atomic_helper_crtc_state_reset(). And of course we'll do

[Intel-gfx] [PATCH v3 03/11] drm/i915: Introduce intel_crtc_{alloc, free}()

2019-12-16 Thread José Roberto de Souza
From: Ville Syrjälä We already have alloc/free helpers for planes, add the same for crtcs. The main benefit is we get to move all the annoying state initialization out of the main crtc_init() flow. Reviewed-by: José Roberto de Souza Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH v3 02/11] drm/i915: s/intel_crtc/crtc/ in intel_crtc_init()

2019-12-16 Thread José Roberto de Souza
From: Ville Syrjälä Let's get rid of the redundant intel_ prefix on our variables. Reviewed-by: José Roberto de Souza Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 32 ++-- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git

[Intel-gfx] [PATCH v3 06/11] drm/i915/display: Share intel_connector_needs_modeset()

2019-12-16 Thread José Roberto de Souza
intel_connector_needs_modeset() will be used outside of intel_display.c in a future patch so it would only be necessary to remove the state and add the prototype to the header file. But while at it, I simplified the arguments and moved it to a better place intel_atomic.c. That allowed us to

[Intel-gfx] [PATCH v3 04/11] drm/i915: Introduce intel_crtc_state_reset()

2019-12-16 Thread José Roberto de Souza
From: Ville Syrjälä We have a few places where we want to reset a crtc state to its default values. Let's add a helper for that. We'll need the new __drm_atomic_helper_crtc_state_reset() helper for this to allow us to just reset the state itself without clobbering the crtc->state pointer. And

[Intel-gfx] [PATCH v3 05/11] drm/i915: Introduce intel_plane_state_reset()

2019-12-16 Thread José Roberto de Souza
From: Ville Syrjälä For the sake of symmetry with the crtc stuff let's add a helper to reset the plane state to sane default values. For the moment this only gets caller from the plane init. Reviewed-by: José Roberto de Souza Signed-off-by: Ville Syrjälä ---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Unpin vma->obj on early error

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Unpin vma->obj on early error URL : https://patchwork.freedesktop.org/series/70990/ State : success == Summary == CI Bug Log - changes from CI_DRM_7576 -> Patchwork_15795

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset

2019-12-16 Thread Manasi Navare
On Mon, Dec 16, 2019 at 02:33:10PM -0800, Manasi Navare wrote: > On Mon, Dec 16, 2019 at 11:37:38PM +0200, Ville Syrjälä wrote: > > On Mon, Dec 16, 2019 at 11:13:09AM -0800, Manasi Navare wrote: > > > On Mon, Dec 16, 2019 at 04:37:38PM +0200, Ville Syrjälä wrote: > > > > On Wed, Dec 11, 2019 at

Re: [Intel-gfx] Plans for i915 GuC Submission with regards to IPTS/ME

2019-12-16 Thread Daniele Ceraolo Spurio
Hi, I can't comment on the ITPS side since I have never looked at that side of things, but I can give you an overview of why we turned off GuC submission and what are the short/medium term plans for it. TL;DR: The GuC submission interface is changed enough that the code you have is no

Re: [Intel-gfx] [PATCH v2 01/11] drm: Add __drm_atomic_helper_crtc_state_reset() & co.

2019-12-16 Thread kbuild test robot
Hi "José, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [cannot apply to drm-tip/drm-tip linus/master v5.5-rc2 next-20191213] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Call hsw_fdi_link_train() directly() (rev2)

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915: Call hsw_fdi_link_train() directly() (rev2) URL : https://patchwork.freedesktop.org/series/70905/ State : success == Summary == CI Bug Log - changes from CI_DRM_7574_full -> Patchwork_15788_full

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset

2019-12-16 Thread Manasi Navare
On Mon, Dec 16, 2019 at 11:37:38PM +0200, Ville Syrjälä wrote: > On Mon, Dec 16, 2019 at 11:13:09AM -0800, Manasi Navare wrote: > > On Mon, Dec 16, 2019 at 04:37:38PM +0200, Ville Syrjälä wrote: > > > On Wed, Dec 11, 2019 at 01:14:23PM -0800, Manasi Navare wrote: > > > > In case of tiled displays,

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Call hsw_fdi_link_train() directly()

2019-12-16 Thread Souza, Jose
On Mon, 2019-12-16 at 22:50 +0200, Ville Syrjälä wrote: > On Mon, Dec 16, 2019 at 08:37:28PM +, Souza, Jose wrote: > > On Fri, 2019-12-13 at 21:52 +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Remove the pointless vfunc detour for hsw_fdi_link_train() > > > and just call

[Intel-gfx] [PATCH v3 11/11] drm/i915/display: Add comment to a function that probably can be removed

2019-12-16 Thread José Roberto de Souza
This function is only called from port sync and it is identical to what will be executed again in intel_update_crtc() over port sync pipes. If it is really necessary it at least deserves a better name and a comment, leaving it to people working on port sync. Cc: Ville Syrjälä Cc: Maarten

[Intel-gfx] [PATCH v3 09/11] drm/i915/dp: Fix MST disable sequences

2019-12-16 Thread José Roberto de Souza
The disable sequence after wait for transcoder off was not correctly implemented. The MST disable sequence is basically the same for HSW, SKL, ICL and TGL, with just minor changes for TGL. So here calling a new MST function to do the MST sequences, most of the steps just moved from the post

[Intel-gfx] [PATCH v3 10/11] drm/i915/display: Check if pipe fastset is allowed by external dependencies

2019-12-16 Thread José Roberto de Souza
Check if fastset is allowed by external dependencies like other pipes and transcoders. Right now this patch only forces a fullmodeset in MST slaves of MST masters that needs a fullmodeset but it will be needed for port sync as well. v3: - moved handling to intel_atomic_check() this way is

[Intel-gfx] [PATCH v3 08/11] drm/i915/display: Always enables MST master pipe first

2019-12-16 Thread José Roberto de Souza
Due to DDB overlaps the pipe enabling sequence is not always crescent. As the previous patch selects the smallest pipe/transcoder in the MST stream to be master and it needs to be enabled first this changes were needed to guarantee that. So first lets enable all pipes that did not needed a

Re: [Intel-gfx] [PATCH] drm/i915: Fix WARN_ON condition for cursor plane ddb allocation

2019-12-16 Thread Ville Syrjälä
On Mon, Dec 16, 2019 at 01:36:19PM +0530, Vandita Kulkarni wrote: > In some cases like latency[level]==0, wm[level].res_lines>31, > min_ddb_alloc can be U16_MAX, exclude it from the WARN_ON. > > v2: Specify the cases in which we hit U16_MAX, indentation (Ville) > > Fixes: 10a7e07b68b9

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Pass old crtc state to intel_crtc_vblank_off()

2019-12-16 Thread Souza, Jose
On Fri, 2019-12-13 at 21:52 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > To make life easier in the future let's pass the old crtc state > to intel_crtc_vblank_off() just like we already do for its > counterpart intel_crtc_vblank_on(). Okay this helps the last patch Reviewed-by: José

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Pass old crtc state to skylake_scaler_disable()

2019-12-16 Thread Souza, Jose
On Fri, 2019-12-13 at 21:52 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > To make life easier in the future let's pass the old crtc state > to skylake_scaler_disable() just like we already do for > for its ancestor ironlake_pfit_disable(). > Okay this helps the last patch Reviewed-by:

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset

2019-12-16 Thread Manasi Navare
On Mon, Dec 16, 2019 at 07:11:20PM +0200, Ville Syrjälä wrote: > On Mon, Dec 16, 2019 at 08:40:24AM -0800, Manasi Navare wrote: > > On Mon, Dec 16, 2019 at 02:03:43PM +0200, Ville Syrjälä wrote: > > > On Fri, Dec 13, 2019 at 06:28:40PM -0800, Manasi Navare wrote: > > > > On Fri, Dec 13, 2019 at

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset

2019-12-16 Thread Ville Syrjälä
On Mon, Dec 16, 2019 at 11:13:09AM -0800, Manasi Navare wrote: > On Mon, Dec 16, 2019 at 04:37:38PM +0200, Ville Syrjälä wrote: > > On Wed, Dec 11, 2019 at 01:14:23PM -0800, Manasi Navare wrote: > > > In case of tiled displays, all the tiles are linke dto each other > > > for transcoder port sync.

Re: [Intel-gfx] [PATCH v2 rebased 07/11] drm/i915/tgl: Select master transcoder for MST stream

2019-12-16 Thread Ville Syrjälä
On Mon, Dec 16, 2019 at 07:07:52PM +, Souza, Jose wrote: > On Mon, 2019-12-16 at 09:23 -0800, José Roberto de Souza wrote: > > On Fri, 2019-12-13 at 22:56 +0200, Ville Syrjälä wrote: > > > On Thu, Dec 12, 2019 at 10:44:29PM +0200, Ville Syrjälä wrote: > > > > On Wed, Dec 11, 2019 at 10:45:22AM

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/connector: Add support for specifying panel_orientation on the kernel cmdline

2019-12-16 Thread Patchwork
== Series Details == Series: drm/connector: Add support for specifying panel_orientation on the kernel cmdline URL : https://patchwork.freedesktop.org/series/70975/ State : success == Summary == CI Bug Log - changes from CI_DRM_7574_full -> Patchwork_15787_full

Re: [Intel-gfx] [PATCH] drm/i915: Fix typecheck macro in GT_TRACE

2019-12-16 Thread Chris Wilson
Quoting Venkata Sandeep Dhanalakota (2019-12-16 18:53:32) > typecheck() macro creates an huge stack size causing > issues with static analysis with coverity, addressing > this with creating a local pointer. > > Fixes: 639f2f24895f ("drm/i915: Introduce new macros for tracing") > Cc: Joonas

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up full-ppgtt on Ivybridge

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Tidy up full-ppgtt on Ivybridge URL : https://patchwork.freedesktop.org/series/70987/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7574 -> Patchwork_15794 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Remove unneeded semicolon

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove unneeded semicolon URL : https://patchwork.freedesktop.org/series/70986/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7574 -> Patchwork_15793 Summary --- **FAILURE**

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT (rev2)

2019-12-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT (rev2) URL : https://patchwork.freedesktop.org/series/70952/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7574_full -> Patchwork_15786_full

[Intel-gfx] [PATCH v3 6/7] powerpc/perf: open access for CAP_SYS_PERFMON privileged process

2019-12-16 Thread Alexey Budankov
Open access to monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to the monitoring remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure monitoring is discouraged with respect to CAP_SYS_PERFMON capability.

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Ensure monotonic rc6

2019-12-16 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-12-16 18:20:32) > From: Tvrtko Ursulin > > Avoid rc6 counter going backward in close to 0% RC6 scenarios like: > > 15.005477996114,246,613 ns i915/rc6-residency/ > 16.005876662667,657 ns i915/rc6-residency/ > 17.006131417

[Intel-gfx] [PATCH v2 1/5] pinctrl: Allow modules to use pinctrl_[un]register_mappings

2019-12-16 Thread Hans de Goede
Currently only the drivers/pinctrl/devicetree.c code allows registering pinctrl-mappings which may later be unregistered, all other mappings are assumed to be permanent. Non-dt platforms may also want to register pinctrl mappings from code which is build as a module, which requires being able to

[Intel-gfx] [PATCH v2 2/5] drm/i915/dsi: Move poking of panel-enable GPIO to intel_dsi_vbt.c

2019-12-16 Thread Hans de Goede
On some older devices (BYT, CHT) which may use v2 VBT MIPI-sequences, we need to manually control the panel enable GPIO as v2 sequences do not do this. So far we have been carrying the code to do this on BYT/CHT devices with a Crystal Cove PMIC in vlv_dsi.c, but as this really is a shortcoming of

[Intel-gfx] [PATCH v2 3/5] drm/i915/dsi: Init panel-enable GPIO to low when the LCD is initially off (v2)

2019-12-16 Thread Hans de Goede
When the LCD has not been turned on by the firmware/GOP, because e.g. the device was booted with an external monitor connected over HDMI, we should not turn on the panel-enable GPIO when we request it. Turning on the panel-enable GPIO when we request it, means we turn it on too early in the

[Intel-gfx] [PATCH v2 5/5] drm/i915/dsi: Control panel and backlight enable GPIOs on BYT

2019-12-16 Thread Hans de Goede
On Bay Trail devices the MIPI power on/off sequences for DSI LCD panels do not control the LCD panel- and backlight-enable GPIOs. So far, when the VBT indicates we should use the SoC for backlight control, we have been relying on these GPIOs being configured as output and driven high by the Video

[Intel-gfx] [PATCH v2 0/5] drm/i915/dsi: Control panel and backlight enable GPIOs from VBT

2019-12-16 Thread Hans de Goede
Hi All, Here is v2 of my patch-series to make the i915 code control the SoC panel- and backlight-enable GPIOs on Bay Trail devices when the VBT indicates that the SoC should be used for backlight control. This fixes the panel not lighting up on various devices when booted with a HDMI monitor

[Intel-gfx] [PATCH v2 4/5] drm/i915/dsi: Move Crystal Cove PMIC panel GPIO lookup from mfd to the i915 driver

2019-12-16 Thread Hans de Goede
Move the Crystal Cove PMIC panel GPIO lookup-table from drivers/mfd/intel_soc_pmic_core.c to the i915 driver. The moved looked-up table is adding a GPIO lookup to the i915 PCI device and the GPIO subsys allows only one lookup table per device, The intel_soc_pmic_core.c code only adds

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Call hsw_fdi_link_train() directly()

2019-12-16 Thread Ville Syrjälä
On Mon, Dec 16, 2019 at 08:37:28PM +, Souza, Jose wrote: > On Fri, 2019-12-13 at 21:52 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Remove the pointless vfunc detour for hsw_fdi_link_train() > > and just call it directly. Also pass the encoder in so we > > can nuke the silly

[Intel-gfx] ✗ Fi.CI.IGT: failure for AUX power well fixes (rev4)

2019-12-16 Thread Patchwork
== Series Details == Series: AUX power well fixes (rev4) URL : https://patchwork.freedesktop.org/series/70857/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7554_full -> Patchwork_15737_full Summary --- **FAILURE**

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Nuke .post_pll_disable() for DDI platforms

2019-12-16 Thread Souza, Jose
On Fri, 2019-12-13 at 21:52 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > HSW+ platforms call encoder .post_disable() and .post_pll_disable() > back to back. And since we don't even disable the PLL in between > let's just move everything into .post_disable(). > > intel_dp_mst does

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Call hsw_fdi_link_train() directly()

2019-12-16 Thread Souza, Jose
On Fri, 2019-12-13 at 21:52 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Remove the pointless vfunc detour for hsw_fdi_link_train() > and just call it directly. Also pass the encoder in so we > can nuke the silly encoder loop within. > > Cc: José Roberto de Souza > Cc: Manasi Navare

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Tidy up full-ppgtt on Ivybridge

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Tidy up full-ppgtt on Ivybridge URL : https://patchwork.freedesktop.org/series/70987/ State : warning == Summary == $ dim checkpatch origin/drm-tip 41de7d1ed45d drm/i915/gt: Tidy up full-ppgtt on Ivybridge -:191: WARNING:MEMORY_BARRIER: memory barrier

[Intel-gfx] [CI 1/3] ACPI / LPSS: Rename pwm_backlight pwm-lookup to pwm_soc_backlight

2019-12-16 Thread Hans de Goede
At least Bay Trail (BYT) and Cherry Trail (CHT) devices can use 1 of 2 different PWM controllers for controlling the LCD's backlight brightness. Either the one integrated into the PMIC or the one integrated into the SoC (the 1st LPSS PWM controller). So far in the LPSS code on BYT we have skipped

[Intel-gfx] [CI 3/3] drm/i915: DSI: select correct PWM controller to use based on the VBT

2019-12-16 Thread Hans de Goede
At least Bay Trail (BYT) and Cherry Trail (CHT) devices can use 1 of 2 different PWM controllers for controlling the LCD's backlight brightness. Either the one integrated into the PMIC or the one integrated into the SoC (the 1st LPSS PWM controller). So far in the LPSS code on BYT we have skipped

[Intel-gfx] [CI 0/3] drm/i915 / LPSS / mfd: Select correct PWM controller to use based on VBT

2019-12-16 Thread Hans de Goede
Hi All, Somehow the CI system did not pick up this series the first time, there are no test results recorded for it: https://patchwork.freedesktop.org/series/69685 So this is a resend for CI to do its thing. As soon as CI is happy with this I will push this to drm-intel-next-queued. Regards,

[Intel-gfx] [CI 2/3] mfd: intel_soc_pmic: Rename pwm_backlight pwm-lookup to pwm_pmic_backlight

2019-12-16 Thread Hans de Goede
At least Bay Trail (BYT) and Cherry Trail (CHT) devices can use 1 of 2 different PWM controllers for controlling the LCD's backlight brightness. Either the one integrated into the PMIC or the one integrated into the SoC (the 1st LPSS PWM controller). So far in the LPSS code on BYT we have

[Intel-gfx] [PATCH v3 7/7] parisc/perf: open access for CAP_SYS_PERFMON privileged process

2019-12-16 Thread Alexey Budankov
Open access to monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to the monitoring remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure monitoring is discouraged with respect to CAP_SYS_PERFMON capability.

[Intel-gfx] [PATCH v3 5/7] trace/bpf_trace: open access for CAP_SYS_PERFMON privileged process

2019-12-16 Thread Alexey Budankov
Open access to bpf_trace monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to bpf_trace monitoring remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure bpf_trace monitoring is discouraged with respect to

[Intel-gfx] [PATCH v3 4/7] drm/i915/perf: open access for CAP_SYS_PERFMON privileged process

2019-12-16 Thread Alexey Budankov
Open access to i915_perf monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to i915_perf subsystem remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure i915_perf monitoring is discouraged with respect to

[Intel-gfx] ✗ Fi.CI.BAT: failure for Correct function name in comment

2019-12-16 Thread Patchwork
== Series Details == Series: Correct function name in comment URL : https://patchwork.freedesktop.org/series/70985/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7574 -> Patchwork_15792 Summary --- **FAILURE**

[Intel-gfx] [PATCH v3 3/7] perf tool: extend Perf tool with CAP_SYS_PERFMON capability support

2019-12-16 Thread Alexey Budankov
Extend error messages to mention CAP_SYS_PERFMON capability as an option to substitute CAP_SYS_ADMIN capability for secure system performance monitoring and observability. Make perf_event_paranoid_check() to be aware of CAP_SYS_PERFMON capability. Signed-off-by: Alexey Budankov ---

[Intel-gfx] [PATCH v3 2/7] perf/core: open access for CAP_SYS_PERFMON privileged process

2019-12-16 Thread Alexey Budankov
Open access to perf_events monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to perf_events subsystem remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure perf_events monitoring is discouraged with respect to

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Apply lmem size restriction to get_pages

2019-12-16 Thread Patchwork
== Series Details == Series: drm/i915/gem: Apply lmem size restriction to get_pages URL : https://patchwork.freedesktop.org/series/70981/ State : success == Summary == CI Bug Log - changes from CI_DRM_7574 -> Patchwork_15791 Summary

[Intel-gfx] [PATCH v3 1/7] capabilities: introduce CAP_SYS_PERFMON to kernel and user space

2019-12-16 Thread Alexey Budankov
Introduce CAP_SYS_PERFMON capability devoted to secure system performance monitoring and observability so that CAP_SYS_PERFMON would assist CAP_SYS_ADMIN capability in its governing role for perf_events, i915_perf and other subsystems of the kernel. CAP_SYS_PERFMON intends to harden system

[Intel-gfx] [PATCH v3 0/7] Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability

2019-12-16 Thread Alexey Budankov
Currently access to perf_events, i915_perf and other performance monitoring and observability subsystems of the kernel is open for a privileged process [1] with CAP_SYS_ADMIN capability enabled in the process effective set [2]. This patch set introduces CAP_SYS_PERFMON capability devoted to

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correct function name in comment

2019-12-16 Thread Patchwork
== Series Details == Series: Correct function name in comment URL : https://patchwork.freedesktop.org/series/70985/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7ba9ec5f5746 Correct function name in comment -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset

2019-12-16 Thread Manasi Navare
On Mon, Dec 16, 2019 at 04:37:38PM +0200, Ville Syrjälä wrote: > On Wed, Dec 11, 2019 at 01:14:23PM -0800, Manasi Navare wrote: > > In case of tiled displays, all the tiles are linke dto each other > > for transcoder port sync. So in intel_atomic_check() we need to make > > sure that we add all

Re: [Intel-gfx] [PATCH v2 rebased 07/11] drm/i915/tgl: Select master transcoder for MST stream

2019-12-16 Thread Souza, Jose
On Mon, 2019-12-16 at 09:23 -0800, José Roberto de Souza wrote: > On Fri, 2019-12-13 at 22:56 +0200, Ville Syrjälä wrote: > > On Thu, Dec 12, 2019 at 10:44:29PM +0200, Ville Syrjälä wrote: > > > On Wed, Dec 11, 2019 at 10:45:22AM -0800, José Roberto de Souza > > > wrote: > > > > On TGL the

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Use BDB_GENERAL_FEATURES VBT block info for builtin panel-orientation

2019-12-16 Thread Hans de Goede
Hi, On 16-12-2019 14:39, Ville Syrjälä wrote: On Sun, Dec 15, 2019 at 10:33:07PM +0100, Hans de Goede wrote: Some devices with a builtin panel have the panel mounted upside down, this is indicated by the rotate_180 bit in the BDB_GENERAL_FEATURES VBT block. We store this info in

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