[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: stop checking for NULL vma->obj

== Series Details == Series: drm/i915: stop checking for NULL vma->obj URL : https://patchwork.freedesktop.org/series/101054/ State : success == Summary == CI Bug Log - changes from CI_DRM_11329_full -> Patchwork_22490_full Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709

== Series Details == Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 URL : https://patchwork.freedesktop.org/series/101070/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11330 -> Patchwork_22494

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/gmbus: move some local bus variables within loops

== Series Details == Series: series starting with [1/2] drm/i915/gmbus: move some local bus variables within loops URL : https://patchwork.freedesktop.org/series/101046/ State : success == Summary == CI Bug Log - changes from CI_DRM_11327_full -> Patchwork_22487_full

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709

== Series Details == Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 URL : https://patchwork.freedesktop.org/series/101070/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709

== Series Details == Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 URL : https://patchwork.freedesktop.org/series/101070/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1d33c55682a1 drm/i915/dg2: Add preemption changes for

[Intel-gfx] [PATCH v2 2/2] drm/i915/dg2: Add debugfs to control global preemption setting

From: Akeem G Abodunrin Since DG2 and beyond only support global preemption enable/disable (see Wa_14015141709), userspace no longer has a way to control preemption on a per-context basis. Preemption is globally enabled by default, but the UMD teams have requested that we provide a debugfs

[Intel-gfx] [PATCH v2 1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709

From: Akeem G Abodunrin Starting with DG2, preemption can no longer be controlled using userspace on a per-context basis. Instead, the hardware only allows us to enable or disable preemption in a global, system-wide basis. Also, we lose the ability to specify the preemption granularity (such as

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/fbdev: fixup setting screen_size

== Series Details == Series: series starting with [CI,1/2] drm/i915/fbdev: fixup setting screen_size URL : https://patchwork.freedesktop.org/series/101045/ State : success == Summary == CI Bug Log - changes from CI_DRM_11327_full -> Patchwork_22486_full

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Add CDCLK checks to atomic check phase

== Series Details == Series: Add CDCLK checks to atomic check phase URL : https://patchwork.freedesktop.org/series/101068/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M]

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: avoid concurrent writes to aux_inv (rev5)

== Series Details == Series: drm/i915: avoid concurrent writes to aux_inv (rev5) URL : https://patchwork.freedesktop.org/series/100772/ State : success == Summary == CI Bug Log - changes from CI_DRM_11330 -> Patchwork_22492 Summary ---

[Intel-gfx] [PATCH 5/5] drm/i915/display: Add cdclk checks to atomic check

Checking cdclk conditions during atomic check and preparing for commit phase so we can have atomic commit as simple as possible. Add the specific steps to be taken during cdclk changes, prepare for squashing, crawling and modeset scenarios. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa ---

[Intel-gfx] [PATCH 4/5] drm/i915/display: Add drm_i915_private to intel_cdclk_needs_modeset()

The change is to be able to have access to the in-flight state. Changing this one functions, trickles the change to intel_cdclk_changed() Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_cdclk.c| 22 ++- drivers/gpu/drm/i915/display/intel_cdclk.h| 3

[Intel-gfx] [PATCH 3/5] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl

Apart from checking if crawling can be performed, accommodate accessing in-flight cdclk state for any changes that are needed during commit phase. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 18 +- 1 file changed, 9

[Intel-gfx] [PATCH 2/5] drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash

Apart from checking if squashing can be performed, accommodate accessing in-flight cdclk state for any changes that are needed during commit phase. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++-- 1 file changed, 11

[Intel-gfx] [PATCH 1/5] drm/i915/display: Add CDCLK actions to intel_cdclk_state

This is a prep patch for what the rest of the series does. Add existing actions that change cdclk - squash, crawl, modeset to intel_cdclk_state so we have access to the cdclk values that are in transition. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa ---

[Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase

This version splits the original patch into simpler units. The intention is to check for squashing, crawling conditions at atomic check phase and prepare for commit phase. This basically means the in-flight cdclk state is available. intel_cdclk_can_squash(), intel_cdclk_can_crawl() and

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Add preemption changes for Wa_14015141709

On Fri, Mar 04, 2022 at 12:13:12PM +0200, Jani Nikula wrote: > On Thu, 03 Mar 2022, Matt Roper wrote: > > From: Akeem G Abodunrin > > > > Starting with DG2, preemption can no longer be controlled using userspace > > on a per-context basis. Instead, the hardware only allows us to enable or > >

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid concurrent writes to aux_inv (rev5)

== Series Details == Series: drm/i915: avoid concurrent writes to aux_inv (rev5) URL : https://patchwork.freedesktop.org/series/100772/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: avoid concurrent writes to aux_inv (rev5)

== Series Details == Series: drm/i915: avoid concurrent writes to aux_inv (rev5) URL : https://patchwork.freedesktop.org/series/100772/ State : warning == Summary == $ dim checkpatch origin/drm-tip eb286fbe8a6e drm/i915: avoid concurrent writes to aux_inv -:198: CHECK:BRACES: Unbalanced

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: rework the error handling in *_dpll_params

== Series Details == Series: drm/i915: rework the error handling in *_dpll_params URL : https://patchwork.freedesktop.org/series/101062/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11330 -> Patchwork_22491 Summary

[Intel-gfx] [PATCH] drm/i915: avoid concurrent writes to aux_inv

From: Fei Yang GPU hangs have been observed when multiple engines write to the same aux_inv register at the same time. To avoid this each engine should only invalidate its own auxiliary table. The function gen12_emit_flush_xcs() currently invalidate the auxiliary table for all engines because

[Intel-gfx] [PATCH] drm/i915: avoid concurrent writes to aux_inv

From: Fei Yang GPU hangs have been observed when multiple engines write to the same aux_inv register at the same time. To avoid this each engine should only invalidate its own auxiliary table. The function gen12_emit_flush_xcs() currently invalidate the auxiliary table for all engines because

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for use dynamic-debug under drm.debug api (rev2)

On Tue, Mar 1, 2022 at 1:57 PM Patchwork wrote: > > == Series Details == > > Series: use dynamic-debug under drm.debug api (rev2) > URL : https://patchwork.freedesktop.org/series/100289/ > State : warning > > == Summary == > > $ dim checkpatch origin/drm-tip > c2ed9cc02d9c dyndbg: fix

Re: [Intel-gfx] [PATCH] drm/i915: rework the error handling in *_dpll_params

On Fri, Mar 04, 2022 at 11:11:54PM +0200, Ville Syrjälä wrote: > On Fri, Mar 04, 2022 at 01:03:55PM -0800, t...@redhat.com wrote: > > From: Tom Rix > > > > Clang static analysis reports this issue > > intel_dpll.c:472:31: warning: The left operand of '-' > > is a garbage value

Re: [Intel-gfx] [PATCH] drm/i915: rework the error handling in *_dpll_params

On Fri, Mar 04, 2022 at 01:03:55PM -0800, t...@redhat.com wrote: > From: Tom Rix > > Clang static analysis reports this issue > intel_dpll.c:472:31: warning: The left operand of '-' > is a garbage value [core.UndefinedBinaryOperatorResult] > this_err = abs(clock.dot - target); >

[Intel-gfx] [PATCH] drm/i915: rework the error handling in *_dpll_params

From: Tom Rix Clang static analysis reports this issue intel_dpll.c:472:31: warning: The left operand of '-' is a garbage value [core.UndefinedBinaryOperatorResult] this_err = abs(clock.dot - target); ~ ^ In a loop clock.dot is set on successful call to

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

Hi Suraj On 3/4/2022 6:16 AM, Kandpal, Suraj wrote: Hi, Hi, Hi Abhinav, Hi Laurent Ok sure, I can take this up but I need to understand the proposal a little bit more before proceeding on this. So we will discuss this in another email where we specifically talk about the connector changes.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: stop checking for NULL vma->obj

== Series Details == Series: drm/i915: stop checking for NULL vma->obj URL : https://patchwork.freedesktop.org/series/101054/ State : success == Summary == CI Bug Log - changes from CI_DRM_11329 -> Patchwork_22490 Summary ---

Re: [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Do not conflate lrc_desc with GuC id for registration

On 3/4/2022 03:59, Jani Nikula wrote: On Thu, 24 Feb 2022, john.c.harri...@intel.com wrote: From: John Harrison The LRC descriptor pool is going away. So, stop using it as a check for context registration, use the GuC id instead (being the thing that actually gets registered with the GuC).

[Intel-gfx] ✓ Fi.CI.IGT: success for vm- and vma cleanups (rev2)

== Series Details == Series: vm- and vma cleanups (rev2) URL : https://patchwork.freedesktop.org/series/100945/ State : success == Summary == CI Bug Log - changes from CI_DRM_11326_full -> Patchwork_22485_full Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: stop checking for NULL vma->obj

== Series Details == Series: drm/i915: stop checking for NULL vma->obj URL : https://patchwork.freedesktop.org/series/101054/ State : warning == Summary == $ dim checkpatch origin/drm-tip e09ec7ec1180 drm/i915: stop checking for NULL vma->obj -:9: ERROR:GIT_COMMIT_ID: Please use git commit

[Intel-gfx] ✗ Fi.CI.BAT: failure for Some more bits for small BAR enabling

== Series Details == Series: Some more bits for small BAR enabling URL : https://patchwork.freedesktop.org/series/101052/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11329 -> Patchwork_22489 Summary ---

Re: [Intel-gfx] [PATCH 7/8] drm/i915: fixup the initial fb base on DG1

On Fri, Mar 04, 2022 at 05:23:32PM +, Matthew Auld wrote: > The offset we get looks to be the exact start of DSM, but the > inital_plane_vma expects the address to be relative. > > Signed-off-by: Matthew Auld > Cc: Thomas Hellström > --- > .../drm/i915/display/intel_plane_initial.c| 22

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Some more bits for small BAR enabling

== Series Details == Series: Some more bits for small BAR enabling URL : https://patchwork.freedesktop.org/series/101052/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Some more bits for small BAR enabling

== Series Details == Series: Some more bits for small BAR enabling URL : https://patchwork.freedesktop.org/series/101052/ State : warning == Summary == $ dim checkpatch origin/drm-tip a3f0e7b2e0d0 drm/i915/lmem: don't treat small BAR as an error 2cdb743c5a4e drm/i915/stolen: don't treat small

Re: [Intel-gfx] [PATCH] drm/i915: stop checking for NULL vma->obj

On Fri, 2022-03-04 at 17:42 +, Matthew Auld wrote: > This is no longer possible since e6e1a304d759 ("drm/i915: vma is > always > backed by an object."). > > Signed-off-by: Matthew Auld > Cc: Thomas Hellström LGTM.  Reviewed-by: Thomas Hellström > --- >  drivers/gpu/drm/i915/i915_vma.c |

[Intel-gfx] [PATCH] drm/i915: stop checking for NULL vma->obj

This is no longer possible since e6e1a304d759 ("drm/i915: vma is always backed by an object."). Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/i915_vma.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git

Re: [Intel-gfx] [PATCH] drm/i915/gtt: reduce overzealous alignment constraints for GGTT

On 3/3/22 11:02, Matthew Auld wrote: Currently this will enforce both 2M alignment and padding for any LMEM pages inserted into the GGTT. However, this was only meant to be applied to the compact-pt layout with the ppGTT. For the GGTT we can reduce the alignment and padding to 64K. Bspec:

Re: [Intel-gfx] [CI 1/2] drm/i915/fbdev: fixup setting screen_size

On 3/4/22 10:59, Matthew Auld wrote: Since we are actually mapping the object and not the vma, when dealing with LMEM, we should be careful and use the backing store size here, since the vma->node.size could have all kinds of funny padding constraints, which could result in us writing to OOB

Re: [Intel-gfx] [CI 2/2] drm/i915: limit the async bind to bind_async_flags

On 04/03/2022 16:41, Thomas Hellström wrote: On Fri, 2022-03-04 at 09:59 +, Matthew Auld wrote: If the vm doesn't request async binding, like for example with the dpt, then we should be able to skip the async path and avoid calling i915_vm_lock_objects() altogether. Currently if we have a

[Intel-gfx] [PATCH 8/8] drm/i915: fixup the initial fb on DG2

On DG2+ the initial fb shouldn't be placed anywhere close to DSM, and so should just be allocated directly from LMEM. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/display/intel_plane_initial.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff

[Intel-gfx] [PATCH 7/8] drm/i915: fixup the initial fb base on DG1

The offset we get looks to be the exact start of DSM, but the inital_plane_vma expects the address to be relative. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- .../drm/i915/display/intel_plane_initial.c| 22 +++ 1 file changed, 18 insertions(+), 4 deletions(-) diff

[Intel-gfx] [PATCH 6/8] drm/i915/display: Check mappable aperture when pinning preallocated vma

From: CQ Tang When system does not have mappable aperture, ggtt->mappable_end=0. In this case if we pass PIN_MAPPABLE when pinning vma, the pinning code will return -ENOSPC. So conditionally set PIN_MAPPABLE if HAS_GMCH(). Suggested-by: Chris P Wilson Signed-off-by: CQ Tang Cc: Radhakrishna

[Intel-gfx] [PATCH 4/8] drm/i915/buddy: tweak CONTIGUOUS rounding

If this is an actual range allocation, and not some bias thing then the resultant allocation will already be naturally contiguous without needing any power-of-two rounding. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 3 ++- 1 file

[Intel-gfx] [PATCH 5/8] drm/i915/ttm: wire up the object offset

For the ttm backend we can use existing placements fpfn and lpfn to force the allocator to place the object at the requested offset, potentially evicting stuff if the spot is currently occupied. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- .../gpu/drm/i915/gem/i915_gem_object_types.h

[Intel-gfx] [PATCH 3/8] drm/i915: add i915_gem_object_create_region_at()

Add a generic interface for allocating an object at some specific offset, and convert stolen over. Later we will want to hook this up to different backends. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- .../drm/i915/display/intel_plane_initial.c| 4 +-

[Intel-gfx] [PATCH 2/8] drm/i915/stolen: don't treat small BAR as an error

From: Akeem G Abodunrin On client platforms with reduced LMEM BAR, we should be able to continue with driver load with reduced io_size. Instead of using the BAR size to determine the how large stolen should be, we should instead use the ADDR_RANGE register to figure this out(at least on

[Intel-gfx] [PATCH 1/8] drm/i915/lmem: don't treat small BAR as an error

Just pass along the probed io_size. The backend should be able to utilize the entire range here, even if some of it is non-mappable. It does leave open with what to do with stolen local-memory. Signed-off-by: Matthew Auld Cc: Thomas Hellström Reviewed-by: Thomas Hellström ---

[Intel-gfx] [PATCH 0/8] Some more bits for small BAR enabling

The leftover bits around dealing with stolen-local memory + small BAR, plus some related fixes. -- 2.34.1

Re: [Intel-gfx] [CI 2/2] drm/i915: limit the async bind to bind_async_flags

On Fri, 2022-03-04 at 09:59 +, Matthew Auld wrote: > If the vm doesn't request async binding, like for example with the > dpt, > then we should be able to skip the async path and avoid calling > i915_vm_lock_objects() altogether. Currently if we have a moving > fence > set for the BO(even

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for Bump DMC to v2.16 on ADL-P (rev2)

On Fri, Mar 04, 2022 at 12:08:43PM +, Patchwork wrote: > == Series Details == > > Series: Bump DMC to v2.16 on ADL-P (rev2) > URL : https://patchwork.freedesktop.org/series/100666/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_11320_full -> Patchwork_22480_full

Re: [Intel-gfx] [igt-dev] [PATCH v2 i-g-t] lib/intel_mmio: Fix mmapped resources not unmapped on fini

Hi Kamil, Thanks for review. On Friday, 4 March 2022 16:14:05 CET Kamil Konieczny wrote: > Hi Janusz, > > Dnia 2022-03-01 at 15:07:55 +0100, Janusz Krzysztofik napisał(a): > > Commit 5f3cfa485eb4 ("lib: Use safe wrappers around libpciaccess > > initialization functions") took care of not

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/xehp: Support platforms with CCS engines but no RCS

On Fri, Mar 04, 2022 at 01:45:31PM +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/2] drm/i915/xehp: Support platforms with CCS > engines but no RCS > URL : https://patchwork.freedesktop.org/series/101019/ > State : success > > == Summary == > > CI Bug Log

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display/vrr: Reset VRR capable property on a long hpd (rev5)

== Series Details == Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd (rev5) URL : https://patchwork.freedesktop.org/series/98801/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11322_full -> Patchwork_22484_full

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gmbus: use to_intel_gmbus() instead of open coding

On Fri, Mar 04, 2022 at 12:14:26PM +0200, Jani Nikula wrote: > We have a helper for getting at the enclosing gmbus struct from the > embedded i2c_adapter, use it. > > Signed-off-by: Jani Nikula Series is Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/intel_gmbus.c | 18

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dg2: Add preemption changes for Wa_14015141709

== Series Details == Series: drm/i915/dg2: Add preemption changes for Wa_14015141709 URL : https://patchwork.freedesktop.org/series/101023/ State : success == Summary == CI Bug Log - changes from CI_DRM_11322_full -> Patchwork_22483_full

Re: [Intel-gfx] [igt-dev] [PATCH v2 i-g-t] lib/intel_mmio: Fix mmapped resources not unmapped on fini

Hi Janusz, Dnia 2022-03-01 at 15:07:55 +0100, Janusz Krzysztofik napisał(a): > Commit 5f3cfa485eb4 ("lib: Use safe wrappers around libpciaccess > initialization functions") took care of not leaking memory allocated by > pci_system_init() but didn't take care of users potentially attempting to >

Re: [Intel-gfx] [PATCH v2 13/13] drm/i915: Make the PIPESC rect relative to the entire bigjoiner area

On Thu, Mar 03, 2022 at 02:41:23PM -0800, Navare, Manasi wrote: > On Wed, Feb 23, 2022 at 03:13:15PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > When using bigjoiner it's useful to know the offset of each > > individual pipe in the whole set of joined pipes. Let's include > >

[Intel-gfx] ✗ Fi.CI.IGT: failure for Improve anti-pre-emption w/a for compute workloads (rev4)

== Series Details == Series: Improve anti-pre-emption w/a for compute workloads (rev4) URL : https://patchwork.freedesktop.org/series/100428/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11322_full -> Patchwork_22482_full

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

Hi, > > Hi, > > > > Hi Abhinav, > > > > > Hi Laurent > > > > > > > > > > Ok sure, I can take this up but I need to understand the > > > > > proposal a little bit more before proceeding on this. So we will > > > > > discuss this in another email where we specifically talk about the > connector

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v2,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event()

== Series Details == Series: series starting with [v2,1/2] drm: Add HPD state to drm_connector_oob_hotplug_event() URL : https://patchwork.freedesktop.org/series/101048/ State : failure == Summary == Applying: drm: Add HPD state to drm_connector_oob_hotplug_event() Using index info to

Re: [Intel-gfx] [PATCH] drm/selftests: fix a shift-out-of-bounds bug

Am 03.03.22 um 21:16 schrieb Arunpravin: pass the correct size value computed using the max_order. [ 68.124177][ T1] UBSAN: shift-out-of-bounds in include/linux/log2.h:67:13 [ 68.125333][ T1] shift exponent 4294967295 is too large for 32-bit type 'long unsigned int' [ 68.126563][ T1] CPU: 0

Re: [Intel-gfx] [PATCH 2/6] treewide: remove using list iterator after loop body as a ptr

On Thu, 3 Mar 2022 12:18:24 +, Daniel Thompson wrote: > On Thu, Mar 03, 2022 at 03:26:57PM +0800, Xiaomeng Tong wrote: > > On Thu, 3 Mar 2022 04:58:23 +, David Laight wrote: > > > on 3 Mar 2022 10:27:29 +0800, Xiaomeng Tong wrote: > > > > The problem is the mis-use of iterator outside the

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

On Fri, 4 Mar 2022 at 13:47, Kandpal, Suraj wrote: > > Hi, > > > Hi Abhinav, > > > > Hi Laurent > > > > > > > > Ok sure, I can take this up but I need to understand the proposal a > > > > little bit more before proceeding on this. So we will discuss this > > > > in another email where we

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

Hi, On Fri, 4 Mar 2022 at 12:56, Kandpal, Suraj wrote: > > Hi Abhinav, > > Hi Laurent > > > > Ok sure, I can take this up but I need to understand the proposal a little > > bit > > more before proceeding on this. So we will discuss this in another email > > where we specifically talk about the

[Intel-gfx] [PATCH v2 1/2] drm: Add HPD state to drm_connector_oob_hotplug_event()

In some implementations, such as the Qualcomm platforms, the display driver has no way to query the current HPD state and as such it's impossible to distinguish between disconnect and attention events. Add a parameter to drm_connector_oob_hotplug_event() to pass the HPD state. Also push the test

[Intel-gfx] [PATCH v2 2/2] drm/msm/dp: Implement oob_hotplug_event()

The Qualcomm DisplayPort driver contains traces of the necessary plumbing to hook up USB HPD, in the form of the dp_hpd module and the dp_usbpd_cb struct. Use this as basis for implementing the oob_hotplug_event() callback, by amending the dp_hpd module with the missing logic. Overall the

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/xehp: Support platforms with CCS engines but no RCS

== Series Details == Series: series starting with [1/2] drm/i915/xehp: Support platforms with CCS engines but no RCS URL : https://patchwork.freedesktop.org/series/101019/ State : success == Summary == CI Bug Log - changes from CI_DRM_11321_full -> Patchwork_22481_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gmbus: move some local bus variables within loops

== Series Details == Series: series starting with [1/2] drm/i915/gmbus: move some local bus variables within loops URL : https://patchwork.freedesktop.org/series/101046/ State : success == Summary == CI Bug Log - changes from CI_DRM_11327 -> Patchwork_22487

Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: Make the heartbeat play nice with long pre-emption timeouts

On 03/03/2022 19:09, John Harrison wrote: Actions: 1) Get a number from compute/OpenCL people for what they say is minimum preempt timeout for default out of the box Linux desktop experience. That would be the one that has been agreed upon by both linux software arch and all UMD teams and

[Intel-gfx] ✓ Fi.CI.IGT: success for Bump DMC to v2.16 on ADL-P (rev2)

== Series Details == Series: Bump DMC to v2.16 on ADL-P (rev2) URL : https://patchwork.freedesktop.org/series/100666/ State : success == Summary == CI Bug Log - changes from CI_DRM_11320_full -> Patchwork_22480_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/fbdev: fixup setting screen_size

== Series Details == Series: series starting with [CI,1/2] drm/i915/fbdev: fixup setting screen_size URL : https://patchwork.freedesktop.org/series/101045/ State : success == Summary == CI Bug Log - changes from CI_DRM_11327 -> Patchwork_22486

Re: [Intel-gfx] [PATCH v2 1/8] drm/i915/guc: Do not conflate lrc_desc with GuC id for registration

On Thu, 24 Feb 2022, john.c.harri...@intel.com wrote: > From: John Harrison > > The LRC descriptor pool is going away. So, stop using it as a check for > context registration, use the GuC id instead (being the thing that > actually gets registered with the GuC). > > Also, rename the

Re: [Intel-gfx] [PATCH 08/11] drm/i915: Replace bxt_clk_div with struct dpll

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > bxt_clk_div is basically the same as struct dpll. Just use the latter. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 50 ++- > 1 file

Re: [Intel-gfx] [PATCH 07/11] drm/i915: Store the m2 divider as a whole in bxt_clk_div

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Get rid of the pointless m2 int vs. frac split in bxt_clk_div > and just store the whole divider as one. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 33 +++ > 1 file

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Add preemption changes for Wa_14015141709

On 03/03/2022 22:42, Matt Roper wrote: From: Akeem G Abodunrin Starting with DG2, preemption can no longer be controlled using userspace on a per-context basis. Instead, the hardware only allows us to enable or disable preemption in a global, system-wide basis. Also, we lose the ability to

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/fbdev: fixup setting screen_size

== Series Details == Series: series starting with [CI,1/2] drm/i915/fbdev: fixup setting screen_size URL : https://patchwork.freedesktop.org/series/101016/ State : success == Summary == CI Bug Log - changes from CI_DRM_11320_full -> Patchwork_22479_full

Re: [Intel-gfx] [PATCH 06/11] drm/i915: Use designated initializers for bxt_dp_clk_val[]

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Use designated initializers to make it clear what is what, > and to decouple us from the specific ordering of the members. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- >

Re: [Intel-gfx] [PATCH 05/11] drm/i915: Remove bxt m2_frac_en

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Remove the pointless m2_frac_en from bxt_clk_div. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 18 -- > 1 file changed, 8 insertions(+),

Re: [Intel-gfx] [PATCH 03/11] drm/i915: Clean up some struct/array initializers

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Use the simple '= {}' form to initialize empty arrays/structs. > Also add some missing whitespace. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 18

Re: [Intel-gfx] [PATCH 02/11] drm/i915: Move a bunch of stuff into rodata from the stack

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Toss a bunch if constants into .rodata drom the stack. Also > shrink the types of some of the arrays to reduce the size. > > bloat-o-meter -c intel_dpll_mgr.o: > add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-86 (-86) > Function

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Nuke skl_wrpll_context_init()

On Tue, 01 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > We can trivially replace skl_wrpll_context_init() with a single > designated initializer. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 +++-- >

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move framestart_delay to crtc_state

On Mon, 21 Feb 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > We need to make framestart_delay dynamic for DRRS on PCH > ports. To that end move it into the crtc state. As a bonus > we get state check+dump for it. Will also allow us to get > rid of the somewhat questionable

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

Hi, > > Hi Abhinav, > > > Hi Laurent > > > > > > Ok sure, I can take this up but I need to understand the proposal a > > > little bit more before proceeding on this. So we will discuss this > > > in another email where we specifically talk about the connector changes. > > > > > > Also, I am

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/selftests: fix a shift-out-of-bounds bug

== Series Details == Series: drm/selftests: fix a shift-out-of-bounds bug URL : https://patchwork.freedesktop.org/series/101012/ State : success == Summary == CI Bug Log - changes from CI_DRM_11320_full -> Patchwork_22478_full Summary

Re: [Intel-gfx] [PATCH v3] drm/i915/psr: Set "SF Partial Frame Enable" also on full update

On Fri, 25 Feb 2022, Jouni Högander wrote: > Currently we are observing occasional screen flickering when > PSR2 selective fetch is enabled. More specifically glitch seems > to happen on full frame update when cursor moves to coords > x = -1 or y = -1. > > According to Bspec SF Single full frame

[Intel-gfx] [PATCH 2/2] drm/i915/gmbus: use to_intel_gmbus() instead of open coding

We have a helper for getting at the enclosing gmbus struct from the embedded i2c_adapter, use it. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_gmbus.c | 18 +- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git

[Intel-gfx] [PATCH 1/2] drm/i915/gmbus: move some local bus variables within loops

Limit the scope. Suggested-by: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_gmbus.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Add preemption changes for Wa_14015141709

On Thu, 03 Mar 2022, Matt Roper wrote: > From: Akeem G Abodunrin > > Starting with DG2, preemption can no longer be controlled using userspace > on a per-context basis. Instead, the hardware only allows us to enable or > disable preemption in a global, system-wide basis. Also, we lose the >

[Intel-gfx] [CI 2/2] drm/i915: limit the async bind to bind_async_flags

If the vm doesn't request async binding, like for example with the dpt, then we should be able to skip the async path and avoid calling i915_vm_lock_objects() altogether. Currently if we have a moving fence set for the BO(even though it might have signalled), we still take the async patch

[Intel-gfx] [CI 1/2] drm/i915/fbdev: fixup setting screen_size

Since we are actually mapping the object and not the vma, when dealing with LMEM, we should be careful and use the backing store size here, since the vma->node.size could have all kinds of funny padding constraints, which could result in us writing to OOB address. v2(Chris): - Prefer vma->size

Re: [Intel-gfx] [PATCH 5/6] drm/rcar_du: changes to rcar-du driver resulting from drm_writeback_connector structure changes

Hi Abhinav, > Hi Laurent > > Ok sure, I can take this up but I need to understand the proposal a little bit > more before proceeding on this. So we will discuss this in another email > where we specifically talk about the connector changes. > > Also, I am willing to take this up once the encoder

Re: [Intel-gfx] [PATCH 4/5] drm/i915/gmbus: alloc intel_gmbus dynamically

On Thu, 03 Mar 2022, Ville Syrjälä wrote: > On Thu, Mar 03, 2022 at 08:19:30PM +0200, Jani Nikula wrote: >> Allocate the individual intel_gmbus structs dynamically. This lets us >> hide struct intel_gmbus inside intel_gmbus.c completely. Also use the >> cleanup function on the error path to avoid

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix bandwith related cdclk calculations (rev2)

== Series Details == Series: drm/i915: Fix bandwith related cdclk calculations (rev2) URL : https://patchwork.freedesktop.org/series/98975/ State : success == Summary == CI Bug Log - changes from CI_DRM_11320_full -> Patchwork_22477_full

[Intel-gfx] ✓ Fi.CI.BAT: success for vm- and vma cleanups (rev2)

== Series Details == Series: vm- and vma cleanups (rev2) URL : https://patchwork.freedesktop.org/series/100945/ State : success == Summary == CI Bug Log - changes from CI_DRM_11326 -> Patchwork_22485 Summary --- **SUCCESS** No

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for vm- and vma cleanups (rev2)

== Series Details == Series: vm- and vma cleanups (rev2) URL : https://patchwork.freedesktop.org/series/100945/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH v3 3/3] drm/i915/gem: Remove some unnecessary code

The test for vma should always return true, and when assigning -EBUSY to ret, the variable should already have that value. Signed-off-by: Thomas Hellström Reviewed-by: Niranjana Vishwanathapura --- drivers/gpu/drm/i915/i915_gem.c | 32 ++-- 1 file changed, 14

[Intel-gfx] [PATCH v3 2/3] drm/i915: Remove the vma refcount

Now that i915_vma_parked() is taking the object lock on vma destruction, and the only user of the vma refcount, i915_gem_object_unbind() also takes the object lock, remove the vma refcount. v3: Documentation update. Signed-off-by: Thomas Hellström Reviewed-by: Niranjana Vishwanathapura ---

[Intel-gfx] [PATCH v3 0/3] vm- and vma cleanups

The first patch of the series addresses a vm open count bug by removing the vm open count. The second patch removes the vma refcount that is no longer needed; the vma is kept a live by taking the vm refcount and object lock. Finally the last patch removes some unnecessary code. There should be

[Intel-gfx] [PATCH v3 1/3] drm/i915: Remove the vm open count

vms are not getting properly closed. Rather than fixing that, Remove the vm open count and instead rely on the vm refcount. The vm open count existed solely to break the strong references the vmas had on the vms. Now instead make those references weak and ensure vmas are destroyed when the vm is

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