On Tue, Sep 26, 2023 at 08:15:40PM +0300, Jani Nikula wrote:
> We've been gradually separating display code from the rest of the i915
> driver code over the past few years. We can't get much further than this
> without some more drastic changes.
>
> One of them is separating struct
-Original Message-
From: Sripada, Radhakrishna
Sent: Friday, October 20, 2023 2:32 PM
To: Roper, Matthew D ;
intel-gfx@lists.freedesktop.org
Cc: Cavitt, Jonathan
Subject: RE: [PATCH v2] drm/i915/mcr: Hold GT forcewake during steering
operations
> > -Original Message-
> > From:
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, October 19, 2023 10:33 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Roper, Matthew D ; Sripada, Radhakrishna
> ; Cavitt, Jonathan
> Subject: [PATCH v2] drm/i915/mcr: Hold GT forcewake during steering operations
>
> The
-Original Message-
From: Hajda, Andrzej
Sent: Friday, October 20, 2023 5:09 AM
To: intel-gfx@lists.freedesktop.org
Cc: Nirmoy Das ; Shyti, Andi
; Cavitt, Jonathan ; Das,
Nirmoy ; Hajda, Andrzej
Subject: [PATCH v2 3/4] drm/i915: Add WABB blit for Wa_16018031267 /
Wa_16018063123
>
>
-Original Message-
From: Hajda, Andrzej
Sent: Friday, October 20, 2023 5:09 AM
To: intel-gfx@lists.freedesktop.org
Cc: Nirmoy Das ; Shyti, Andi
; Cavitt, Jonathan ; Das,
Nirmoy
Subject: [PATCH v2 4/4] drm/i915: Set copy engine arbitration for
Wa_16018031267 / Wa_16018063123
>
>
-Original Message-
From: Hajda, Andrzej
Sent: Friday, October 20, 2023 5:09 AM
To: intel-gfx@lists.freedesktop.org
Cc: Nirmoy Das ; Shyti, Andi
; Cavitt, Jonathan ; Chris
Wilson ; Hajda, Andrzej
Subject: [PATCH v2 1/4] drm/i915: Enable NULL PTE support for vm scratch
>
> From:
-Original Message-
From: Hajda, Andrzej
Sent: Friday, October 20, 2023 5:09 AM
To: intel-gfx@lists.freedesktop.org
Cc: Nirmoy Das ; Shyti, Andi
; Cavitt, Jonathan ; Hajda,
Andrzej ; Chris Wilson
Subject: [PATCH v2 2/4] drm/i915: Reserve some kernel space per vm
>
> Reserve two pages
On Thu, Oct 19, 2023 at 01:04:40PM -0300, Gustavo Sousa wrote:
Quoting Lucas De Marchi (2023-10-18 19:24:41-03:00)
With MTL adding PICA between the port and the real phy, the path
add for DG2 stopped being followed and newer platforms are simply using
the older path for TC phys. LNL is no
When the driver unbinds, pmu is unregistered and i915->uabi_engines is
set to RB_ROOT. Due to this, when i915 PMU tries to stop the engine
events, it issues a warn_on because engine lookup fails.
All perf hooks are taking care of this using a pmu->closed flag that is
set when PMU unregisters. The
Reviewed-by: Juha-Pekka Heikkila
On 12.10.2023 10.21, Jouni Högander wrote:
Xe and i915 objects have differing implementation. Use intel_bo_to_drm_bo
instead of obj->base as xe_bo doesn't have base pointer.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_fb.c | 4 ++--
Reviewed-by: Juha-Pekka Heikkila
On 12.10.2023 10.21, Jouni Högander wrote:
As a preparation for Xe we want to remove all i915_gem_object details away
from frontbuffer tacking code. Due to this move releasing gem object
reference to i915_gem_object_set_frontbuffer.
Signed-off-by: Jouni
From: Jonathan Cavitt
Apply WABB blit for Wa_16018031267 / Wa_16018063123.
Additionally, update the lrc selftest to exercise the new
WABB changes.
Co-developed-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 3 +
From: Jonathan Cavitt
Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.
Signed-off-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 3 +++
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5
From: Jonathan Cavitt
Enable NULL PTE support for vm scratch pages.
The use of NULL PTEs in teh vm scratch pages requires us to change how
the i915 gem_contexts live selftest perform vm_isolation: instead of
checking the scratch pages are isolated and don't affect each other, we
check that all
Reserve two pages in each vm for kernel space to use for things
such as workarounds.
v2: use real memory, do not decrease vm.total
Suggested-by: Chris Wilson
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 38
Hi all,
This the series from Jonathan:
[PATCH v12 0/4] Apply Wa_16018031267 / Wa_16018063123
taken over by me.
Changes in this version are described in the patches, in short:
- use real memory as WABB destination,
- address CI compains - do not decrease vm.total,
- minor reordering.
Regards
Hi Janusz,
On 2023-10-11 at 16:17:45 +0200, Janusz Krzysztofik wrote:
> Recent improvements to the kernel kunit framework allow us to obtain a
> list of test cases provided by a kunit test module without actually
> running them. Use that feature to get a list of expected test cases
> before we
Hi Janusz,
On 2023-10-11 at 16:17:40 +0200, Janusz Krzysztofik wrote:
> There was an attempt to parse KTAP reports in the background while a kunit
> test module is loading. However, since dynamic sub-subtests can be
> executed only from the main thread, that attempt was not quite successful,
> as
On Wed, 2023-10-18 at 20:59 +0300, Ville Syrjälä wrote:
> On Wed, Oct 18, 2023 at 07:13:12PM +0200, Maarten Lankhorst wrote:
> >
> >
> > On 2023-10-18 17:38, Ville Syrjälä wrote:
> > > On Mon, Oct 16, 2023 at 11:08:03AM +0300, Jouni Högander wrote:
> > > > We are preparing for Xe driver. Xe
We are preparing for Xe driver. Xe driver doesn't have i915_sw_fence
implementation. Lets drop i915_sw_fence usage from display code and
use dma_fence interfaces directly.
For this purpose stack dma fences from related objects into new plane
state. Drm_gem_plane_helper_prepare_fb can be used for
This workaround is primarily implemented by the BIOS. However if the
BIOS applies the workaround it will reserve a small piece of our DSM
(which should be at the top, right below the WOPCM); we just need to
keep that region reserved so that nothing else attempts to re-use it.
v2: Declare regs in
On 19/10/2023 19:28, Umesh Nerlige Ramappa wrote:
When the driver unbinds, pmu is unregistered and i915->uabi_engines is
set to RB_ROOT. Due to this, when i915 PMU tries to stop the engine
events, it issues a warn_on because engine lookup fails.
All perf hooks are taking care of this using a
Hello Lorenzo,
> -Original Message-
> From: Lorenzo Stoakes
> Sent: Friday, October 20, 2023 12:08 PM
> To: Borah, Chaitanya Kumar
> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani
> Subject: Re: Regression on linux-next (next-20231016)
>
> On Fri, 20 Oct
On Fri, 20 Oct 2023 at 06:52, Borah, Chaitanya Kumar
wrote:
>
> Hello Lorenzo,
>
> Hope you are doing well. I am Chaitanya from the linux graphics team in Intel.
>
> This mail is regarding a regression we are seeing in our CI runs[1] on
> linux-next repository.
>
Thanks for reporting :) It is
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