ille.syrj...@linux.intel.com>
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
lib/Makefile.sources | 2 +
lib/igt.h| 1 +
lib/igt_dummyload.c | 274 +++
lib/igt_dummyl
On 10/28/2016 07:02 PM, Ville Syrjälä wrote:
> On Fri, Oct 28, 2016 at 06:47:26PM +0300, Abdiel Janulgue wrote:
>> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
>> Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
>> Signed-off-by: Abdiel Janulgue <abdiel.janul.
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
tests/gem_wait.c | 125 ---
1 file changed, 7 insertions(+), 118 deleti
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
tests/kms_flip.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_fl
Generalized from auto-tuned GPU dummy workload in gem_wait and kms_flip
v2 : Add recursive batch feature from Chris
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
li
consume exactly a specific
amount of time.
v2: Add recursive batch feature from Chris and use in gem_wait and
kms_flip. I've retained the previous auto-tuned dummy load
functions. Let me know if we need to drop those.
Abdiel Janulgue (3):
lib: add igt_dummyload
igt/gem_wait: Use
On 10/13/2016 06:17 PM, Daniel Vetter wrote:
> On Thu, Oct 13, 2016 at 10:49:39AM +0100, Chris Wilson wrote:
>> On Thu, Oct 13, 2016 at 12:31:13PM +0300, Abdiel Janulgue wrote:
>>>
>>>
>>> On 10/12/2016 03:07 PM, Chris Wilson wrote:
>>>> On Wed, O
On 10/12/2016 03:07 PM, Chris Wilson wrote:
> On Wed, Oct 12, 2016 at 02:59:53PM +0300, Abdiel Janulgue wrote:
>> Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
>> ---
>> tests/gem_wait.c | 77
>> +-
Generalized from auto-tuned GPU dummy workload in gem_wait and kms_flip
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
lib/Makefile.sources | 2 +
lib/igt.h| 1 +
lib/igt_dummyload.c | 419 ++
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
tests/kms_flip.c | 191 +++
1 file changed, 10 insertions(+), 181 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 065ad66..93cf391 100644
--- a
that is dynamically tuned to consume a
specific amount of time.
This functionality is generalized to lib from existing features in
gem_wait and kms_flip. In the future, we could update test cases
that could benefit from auto-tuned dummy workloads to use this
new api.
Abdiel Janulgue (3):
lib: add
Signed-off-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
---
tests/gem_wait.c | 77 +---
1 file changed, 12 insertions(+), 65 deletions(-)
diff --git a/tests/gem_wait.c b/tests/gem_wait.c
index 461efdb..24a5f5e 100644
--- a
ilson <ch...@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuopp...@intel.com>
> Cc: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
Tested-by: Abdiel Janulgue <abdiel.janul...@linux.intel.com>
> Signed-off-by: Michał Winiarski <michal.winiar...@intel.com>
&g
On 07/06/2015 11:28 AM, Daniel Vetter wrote:
On Thu, Jul 02, 2015 at 11:15:40AM +0100, Chris Wilson wrote:
On Wed, Jul 01, 2015 at 10:12:23AM +0300, Abdiel Janulgue wrote:
Ensures that the batch buffer is executed by the resource streamer
v2: Don't skip 115 for the exec flags (Jani Nikula
-by: Kenneth Graunke kenn...@whitecape.org
Cc: Kenneth Graunke kenn...@whitecape.org
Cc: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_dma.c | 3 +++
drivers/gpu/drm/i915/i915_drv.h | 3 +++
include/uapi/drm/i915_drm.h
...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 14 ++
include/uapi/drm/i915_drm.h| 7 ++-
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
On 06/24/2015 09:30 AM, Abdiel Janulgue wrote:
On 06/16/2015 03:41 PM, Abdiel Janulgue wrote:
This will let userspace know whether Resource Streamer is supported
in the kernel.
v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after
I915_PARAM_HAS_GPU_RESET.
v3: Only advertise
On 06/16/2015 03:41 PM, Abdiel Janulgue wrote:
This will let userspace know whether Resource Streamer is supported
in the kernel.
v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after
I915_PARAM_HAS_GPU_RESET.
v3: Only advertise RS support for hardware that supports it.
Ping. Any
Graunke kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_dma.c | 3 +++
include/uapi/drm/i915_drm.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index
This will let userspace know whether Resource Streamer is supported
in the kernel.
v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after
I915_PARAM_HAS_GPU_RESET.
Suggested-by: Kenneth Graunke kenn...@whitecape.org
Cc: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue
Adds support for enabling the resource streamer on the legacy
ringbuffer for HSW and GEN8.
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c
Ensures that the batch buffer is executed by the resource streamer
v2: Don't skip 115 for the exec flags (Jani Nikula)
Testcase: igt/gem_exec_params
Cc: Jani Nikula jani.nik...@intel.com
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul
This will let userspace know whether Resource Streamer is supported
in the kernel.
Suggested-by: Kenneth Graunke kenn...@whitecape.org
Cc: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_dma.c | 3 +++
include
Streamer context save and restore for Execlists.
Cc: ville.syrj...@linux.intel.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/intel_lrc.c | 8 ++--
drivers/gpu/drm/i915/intel_lrc.h | 1 +
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git
)
Suggested-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_context.c | 4 +++-
drivers/gpu/drm/i915/i915_reg.h | 5 -
2 files changed, 7 insertions
Make sure resource streamer flags works only in correct ring in
addition to checking next flag after the RS boundary fails.
v2: Make sure we reject RS on pre-hsw.
v3: Don't skip 115 for the exec flags (Jani Nikula)
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Abdiel Janulgue
On 06/08/2015 07:10 PM, Ville Syrjälä wrote:
On Mon, Jun 08, 2015 at 01:04:07PM +0300, Abdiel Janulgue wrote:
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1
Hi,
Although most of this patches were alread reviewed, I am resending them
due to additional changes suggested by Jani Nikula. In addition
Mesa folks want RS to be working with hiccups on GEN8 as well so
I added the necessary support for that platform as well.
Changes since last posting:
- Make
RS save restore for GEN8
Cc: ville.syrj...@linux.intel.com
Suggested-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_context.c | 4 +++-
drivers/gpu/drm
Cc: kenn...@whitecape.org
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_dma.c| 3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 14 ++
include/uapi/drm/i915_drm.h
terribly sorry for the typos:
On 06/08/2015 01:04 PM, Abdiel Janulgue wrote:
Although most of this patches were alread reviewed, I am resending them
*already
due to additional changes suggested by Jani Nikula. In addition
Mesa folks want RS to be working with hiccups on GEN8 as well so
On 05/18/2015 07:07 PM, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote:
On Mon, May 18, 2015 at 06:36:18PM +0300, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 11:31:56AM +0300, Abdiel Janulgue wrote:
Also clarify comments on context size that the extra
Make sure resource streamer flags works only in correct ring in
addition to checking next flag after the RS boundary fails.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_exec_params.c | 21 -
1 file
On 05/19/2015 11:26 AM, Daniel Vetter wrote:
On Tue, May 19, 2015 at 09:58:52AM +0300, Abdiel Janulgue wrote:
On 05/18/2015 07:07 PM, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote:
On Mon, May 18, 2015 at 06:36:18PM +0300, Ville Syrjälä wrote:
On Mon
On 05/18/2015 05:55 PM, Chris Wilson wrote:
On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
1-3:
Reviewed-by: Chris Wilson ch...@chris
Make sure resource streamer flags works only in correct ring in
addition to checking next flag after the RS boundary fails.
v2: Make sure we reject RS on pre-hsw.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_exec_params.c
Ensures that the batch buffer is executed by the resource streamer
Testcase: igt/gem_exec_params
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
drivers/gpu/drm
)
Suggested-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_context.c | 4 +++-
drivers/gpu/drm/i915/i915_reg.h | 5 -
2 files changed, 7 insertions
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_lrc.c| 3
Also clarify comments on context size that the extra state for
Resource Streamer is included.
Suggested-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
drivers/gpu/drm/i915/intel_ringbuffer.h| 1 +
include/uapi/drm/i915_drm.h
On 05/18/2015 12:01 PM, Daniel Vetter wrote:
On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
Maybe I missed them, but we also need a patch
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_exec_params.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c
index 54f0dc3..fd9d7bd 100644
--- a/tests/gem_exec_params.c
+++ b/tests
Hi,
On 05/13/2015 01:22 PM, Chris Wilson wrote:
On Wed, May 13, 2015 at 11:13:24AM +0300, Abdiel Janulgue wrote:
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Signed-off-by: Abdiel Janulgue abdiel.janul
On 05/12/2015 12:49 PM, Chris Wilson wrote:
On Mon, May 11, 2015 at 12:01:11PM +0300, Abdiel Janulgue wrote:
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c
Changes since initial posting:
- Don't split the conversion from args-flags to ring from its
subsequent EINVAL check (Chris Wilson ch...@chris-wilson.co.uk)
- Execlists support (Minu Mathai minu.mat...@intel.com)
--
Abdiel Janulgue (2):
drm/i915/hsw/bdw: Expose
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_lrc.c| 3
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
drivers/gpu/drm/i915/intel_ringbuffer.h| 1 +
include/uapi/drm/i915_drm.h
On 05/11/2015 12:26 PM, Chris Wilson wrote:
On Mon, May 11, 2015 at 12:01:10PM +0300, Abdiel Janulgue wrote:
This is a re-spin of my resource streamer patchset from a year ago.
The resource streamer is a hw-feature that helps in reducing commands
submitted by the CPU.
Did you check
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
drivers/gpu/drm/i915/intel_ringbuffer.h| 1 +
include/uapi/drm/i915_drm.h
This is a re-spin of my resource streamer patchset from a year ago.
The resource streamer is a hw-feature that helps in reducing commands
submitted by the CPU.
We have finally have the Mesa optimization that requires the use of
this interface.
Abdiel Janulgue (2):
drm/i915/hsw/bdw: Expose
Adds support for executing the resource streamer on BDW
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
On 11.06.2014 11:10, Jesse Barnes wrote:
On Tue, 6 May 2014 22:25:04 +0300
Abdiel Janulgue abdiel.janul...@linux.intel.com wrote:
From: Abdiel Janulgue abdiel.janul...@linux.intel.com
This is a re-spin of my resource streamer patchset from October
adapted to enable the feature on Broadwell
On Wednesday, May 07, 2014 02:49:31 PM Ville Syrjälä wrote:
I quickly cobbled together a hsw version of this and gave it a whirl on
one machine. Seems to work just fine here, and no lockups when switching
between hw and sw binding tables. Did you get the lockups on hsw even
with rendercopy?
Adds support for executing the resource streamer on BDW
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_ringbuffer.c |3 ++-
drivers/gpu/drm/i915/intel_ringbuffer.h |1 +
3 files changed, 4
From: Abdiel Janulgue abdiel.janul...@linux.intel.com
This is a re-spin of my resource streamer patchset from October
adapted to enable the feature on Broadwell instead.
The resource streamer is a hw-feature that helps in reducing commands
being submitted by the CPU. Haswell initially has
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |8
include/uapi/drm/i915_drm.h|7 ++-
2 files changed, 14 insertions(+), 1
and to verify if the resulting data is still correct.
Abdiel Janulgue (2):
rendercopy/bdw: Enable hw-generated binding tables
tests/gem_render_copy: Add option to test resource streamer
lib/gen8_render.h | 13 +++
lib/intel_batchbuffer.c | 12 ++
lib/intel_batchbuffer.h
Add option in basic test for the render_copy to test and toggle
hw-generated binding tables feature.
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_render_copy.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/tests/gem_render_copy.c b
Use on-chip hw-binding table generator to generate binding
tables when the test emits SURFACE_STATES packets. The hw generates
these binding table packets internally so we don't have to
allocate space on the batchbuffer.
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
lib
Add test that makes sure RS bit only gets executed on BDW and
on the render ring.
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_exec_params.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c
index
On Wednesday, May 07, 2014 12:38:04 AM Ville Syrjälä wrote:
On Tue, May 06, 2014 at 10:48:02PM +0300, Abdiel Janulgue wrote:
Use on-chip hw-binding table generator to generate binding
tables when the test emits SURFACE_STATES packets. The hw generates
these binding table packets internally
Hi all!
On Thursday, April 24, 2014 01:17:14 PM Ville Syrjälä wrote:
On Thu, Apr 24, 2014 at 11:25:15AM +0300, Abdiel Janulgue wrote:
On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote:
On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote:
Anyway I haven't tried
On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote:
On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote:
Anyway I haven't tried the work-around where we explictly only disable the
BT and RS on the other user-space clients (xorg driver in this case) when
Mesa is using RS
On Thursday, April 24, 2014 01:17:14 PM Ville Syrjälä wrote:
On Thu, Apr 24, 2014 at 11:25:15AM +0300, Abdiel Janulgue wrote:
On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote:
On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote:
Anyway I haven't tried the work
On Tuesday, April 22, 2014 07:20:58 PM Daniel Vetter wrote:
On Tue, Apr 22, 2014 at 04:23:12PM +0100, Chris Wilson wrote:
On Tue, Apr 22, 2014 at 06:16:34PM +0300, Abdiel Janulgue wrote:
This patch series enables resource streamer for xf86-video-intel UXA.
Fixes i965 Mesa driver
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
src/intel_options.c|1 +
src/intel_options.h|1 +
src/uxa/intel.h|3 +++
src/uxa/intel_driver.c | 10 +-
4 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/intel_options.c b
+++
src/uxa/intel.h |3 ++
src/uxa/intel_batchbuffer.c |7 ++--
src/uxa/intel_driver.c | 10 +-
8 files changed, 94 insertions(+), 19 deletions(-)
Abdiel Janulgue (2):
[PATCH 1/2] xf86-video-intel: Add ResourceStreamer option
[PATCH 2/2] xf86-video
Ensures that the batch buffer is executed by the resource streamer.
v3: - Make sure batch is only submitted on render ring and Haswell (Daniel)
- Separate EXEC and DISPATCH flags (Chris)
- Update __I915_EXEC_UNKNOWN_FLAGS (Kenneth)
Signed-off-by: Abdiel Janulgue abdiel.janul
v3: Use the I915_DISPATCH_RS flag to determine if batchbuffer needs
resource streamer bit.
Cc: Chris Wilson ch...@chris-wilson.co.uk
Cc: Daniel Vetter dan...@ffwll.ch
Cc: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915
Abdiel Janulgue (2):
drm/i915/hsw: Add I915_EXEC_RESOURCE_STREAMER flag
drm/i915/hsw: Enable resource streamer bit on MI_BATCH_BUFFER_START
--
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++
drivers/gpu/drm/i915/i915_reg.h| 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c
Ensures that the batch buffer is executed by the resource streamer.
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 ++
include/uapi/drm/i915_drm.h|5 +
2 files changed, 7 insertions(+)
diff --git
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_ringbuffer.c |7 ---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915
Daniel Vetter suggested at some point we need to implement getparam ioctl
so userspace can figure out whether kernel supports RS at runtime.
For now, this will do to support the corresponding RFC mesa patches.
Based on the work of: Lukasz Anaczkowski lukasz.anaczkow...@intel.com
Abdiel Janulgue
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 ++
include/uapi/drm/i915_drm.h|1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_ringbuffer.c |6 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915
Expose defines for resource streamer controls.
Based on the work of: Lukasz Anaczkowski lukasz.anaczkow...@intel.com
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
include/drm/i915_drm.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/i915_drm.h b/include
201 - 279 of 279 matches
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