Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tests/skl_ddb_allocation.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/tests/skl_ddb_allocation.c b/tests/skl_ddb_allocation.c
index 7faed0e..ba5f8ba 100644
--- a/tests
/show_bug.cgi?id=84265
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
drivers/gpu/drm/i915/intel_display.c | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git
size (Mika)
- base address size macro as pages (Mika)
v3: - rebased on top of current master (Mika)
- removed obsolete #includes (Mika)
- added copyright (Mika)
- render and component packing added (Mika)
Cc: Damien Lespiau damien.lesp...@intel.com
Cc: Armin Reese
On Tue, Oct 07, 2014 at 01:26:37PM +0300, Ville Syrjälä wrote:
On Mon, Oct 06, 2014 at 06:56:43PM +0100, Damien Lespiau wrote:
SKL will have a whole separate display regs file, so merge
base_display.txt into each platform file.
Please drop it from vlv/chv. It's not appropriate for those
Those registers are big core registers and weren't really relevant for
VLV/CHV. Drop them from the dump then.
Suggested-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump/cherryview | 1 -
tools/quick_dump/valleyview | 1
quick_dump was failing to load because of a non resolved symbol in the
python binding library. Let's add a small test that makes sure we can
run ./quick_dump.py --help, ie load the python package and the shim
library.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump
, let's simplify maintainance and just link against the library we're
building and using elsewhere.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump/Makefile.am | 17 -
tools/quick_dump/chipset_macro_wrap.c | 12
2 files changed, 8
...@ffwll.ch
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tests/gem_wait.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gem_wait.c b/tests/gem_wait.c
index 1320c7b..39d20b0 100644
--- a/tests/gem_wait.c
+++ b/tests/gem_wait.c
@@ -179,7 +179,7 @@ static void
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
overlay/x11/position.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/overlay/x11/position.c b/overlay/x11/position.c
index f430281..cd00353 100644
--- a/overlay/x11/position.c
+++ b/overlay/x11/position.c
@@ -76,10
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tests/gem_seqno_wrap.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tests/gem_seqno_wrap.c b/tests/gem_seqno_wrap.c
index 6772d1e..51fd88c 100644
--- a/tests/gem_seqno_wrap.c
+++ b/tests/gem_seqno_wrap.c
@@ -475,7 +475,6 @@ static
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump/skl_display.txt | 285 +++
1 file changed, 285 insertions(+)
create mode 100644 tools/quick_dump/skl_display.txt
diff --git a/tools/quick_dump/skl_display.txt b/tools/quick_dump
SKL will have a whole separate display regs file, so merge
base_display.txt into each platform file.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump/broadwell| 1 +
tools/quick_dump/cherryview | 1 +
tools
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump/chipset.i| 2 ++
tools/quick_dump/chipset_macro_wrap.c | 5 +
tools/quick_dump/quick_dump.py| 2 ++
tools/quick_dump/skylake | 1 +
4 files changed, 10 insertions(+)
create mode
From: Sonika Jindal sonika.jin...@intel.com
Add support for 180 degree rotation for primary and sprite planes
Signed-off-by: Sonika Jindal sonika.jin...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_display.c | 2 ++
drivers/gpu/drm/i915/intel_sprite.c
On Sat, Oct 04, 2014 at 10:53:31AM +0100, Damien Lespiau wrote:
From: Sonika Jindal sonika.jin...@intel.com
Add support for 180 degree rotation for primary and sprite planes
Signed-off-by: Sonika Jindal sonika.jin...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
On Thu, Oct 02, 2014 at 10:00:50AM +0200, Daniel Vetter wrote:
On Thu, Oct 02, 2014 at 01:30:48PM +1000, Dave Airlie wrote:
Hey guys,
so I have a haswell ULT laptop (lenovo t440s), and got access to a
Samsung single panel 4k monitor (no MST).
Now we detect the monitor fine, but
Hi Dave,
On Fri, Oct 03, 2014 at 07:12:53AM +1000, Dave Airlie wrote:
I thought we had an agreement that no features that were specific to
the non-open source userspace drivers would be merged to the kernel,
due to security and maintenance concerns, i.e. exactly this concern,
we now have to
HAS_IPS() has a '|| IS_BROADWELL()', no need to check for IS_BDW_ULT().
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
hsw_get_cdclk_freq() is really just HSW, so we can use IS_HSW_ULT()
instead of IS_ULT() there.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b
The quality of being a ULT or ULX package doesn't tell anything across
generations and so a global IS_ULT() macro doesn't make much sense, esp.
as we're adding new products.
So, spell out which ULT/ULX SKUs we are talking about here, namely HSW
and BDW.
Signed-off-by: Damien Lespiau damien.lesp
As stated in the few previous commits, IS_ULT/ULX() is better
per-platform as it has different consequences depending on the platform.
We now can get rid of it.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
1 file changed, 1 deletion(-)
diff
just discarded it in the PCH detection code.
--
Damien
Damien Lespiau (6):
drm/i915: Use IS_HSW_ULT() in a HSW specific code path
drm/i915: Use IS_HSW_ULT() in HAS_IPS()
drm/i915: Spell out IS_HSW/BDW_ULT() in intel_crt_present()
drm/i915: Use IS_HSW_ULT() in HSW CDCLK clock read-out
drm
No need to add the BDW pci ULT/ULX checks inside a if (IS_HASWELL(dev))
code path.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm
On Tue, Sep 30, 2014 at 11:19:37AM +0100, Thomas Wood wrote:
On 26 September 2014 14:19, Damien Lespiau damien.lesp...@intel.com wrote:
v2: Add more PCI IDs (Michael H. Nguyen)
v3: Synchronize one more with the kernel PCI IDs (Damien)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
On Fri, Sep 26, 2014 at 03:02:59PM +0100, Damien Lespiau wrote:
v2: Update to the latest PCI ids
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
---
Pushed the whole series to i-g-t.
--
Damien
On Tue, Sep 30, 2014 at 09:08:35AM -0300, Paulo Zanoni wrote:
+static int intel_gen9_queue_flip(struct drm_device *dev,
+struct drm_crtc *crtc,
+struct drm_framebuffer *fb,
+struct
.
Added commit note.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
Cc: Damien Lespiau damien.lesp...@intel.com
---
This still has the issue of taking every fw engine, not looking at the
ring we're queuing the work for. Also I'll add the note in a comment
above the whole block. It does
v2: Use the gen = 9 in the debugfs file condition (Ville)
Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 76 ++---
1 file changed, 62 insertions(+), 14
On Thu, Sep 25, 2014 at 03:06:17PM -0300, Paulo Zanoni wrote:
2014-09-25 14:58 GMT-03:00 Jesse Barnes jbar...@virtuousgeek.org:
This moved around on SKL, so we need to make sure we read/write the
correct regs.
v2: fixup WIN_POS offsets (Paulo)
zero out WIN_POS reg at disable time
On Tue, Sep 23, 2014 at 05:06:35PM -0300, Paulo Zanoni wrote:
2014-09-04 8:27 GMT-03:00 Damien Lespiau damien.lesp...@intel.com:
A few bits have changed in MI_DISPLAY_FLIP to accomodate the new planes.
DE_RRMR seems to have kept its plane flip bits backward compatible.
v2: Rebase on top
()
Don't use BUG() in default:
Use intel_crtc-unpin_work-gtt_offset
(Paulo)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 10 ++
drivers/gpu/drm/i915/intel_display.c | 66
2 files changed, 76 insertions
On Mon, Sep 29, 2014 at 05:50:57PM +, Eoff, Ullysses A wrote:
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of Jani Nikula
Sent: Monday, September 29, 2014 6:07 AM
To: Joe Konno; intel-gfx@lists.freedesktop.org
Subject: Re:
a few arguments
Make nth_active_pipe 0 indexed
Use sizeof(variable) instead of sizeof(type)
(Ville)
v6: Use the for_each_crtc() macro instead of list_for_each_entry()
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_pm.c | 148
On Fri, Sep 19, 2014 at 01:03:15PM +0300, Ville Syrjälä wrote:
diff --git a/drivers/gpu/drm/i915/intel_pm.c
b/drivers/gpu/drm/i915/intel_pm.c
index 0ddcbad..756ff16 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3393,6 +3393,15 @@ static void
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
intel/intel_bufmgr_gem.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index
v2: Add more PCI IDs (Michael H. Nguyen)
v3: Synchronize one more with the kernel PCI IDs (Damien)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Michael H. Nguyen michael.h.ngu...@intel.com
---
intel/intel_chipset.h
SBE has now to be explicitely told which channels of which components
are used by the pixel shader.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
---
lib/gen9_render.h | 5 +
lib/rendercopy_gen9.c | 4 +++-
2 files changed
From: Zhao Yakui yakui.z...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/gen9_render.h | 2 ++
lib
v2: Update to the latest PCI ids
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
---
lib/intel_chipset.h | 58 +++--
1 file changed, 52 insertions(+), 6 deletions(-)
diff --git a/lib
From: Zhao Yakui yakui.z...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
---
lib/rendercopy.h | 1 +
lib/rendercopy_gen9.c | 12 +++-
tools
gen9 uses the same bits as gen8.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
lib/instdone.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/lib/instdone.c
From: Xiang, Haihao haihao.xi...@intel.com
A value less than 4 might result in GPU hang on simulation
Signed-off-by: Xiang, Haihao haihao.xi...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/rendercopy_gen9
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
lib/intel_chipset.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/intel_chipset.c b/lib/intel_chipset.c
index 0828e44..fafd232
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
scripts/list-workarounds | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/list-workarounds b/scripts/list-workarounds
index 5a84ee8..620d02f 100755
--- a/scripts/list-workarounds
+++ b/scripts/list-workarounds
From: Zhao Yakui yakui.z...@intel.com
This is ported from that on BDW.
v2: Only bump the prefix when we need to program the instruction
differently with the previous generations.
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
assembler/disasm-main.c | 4 ++--
assembler/main.c| 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
From: Zhao Yakui yakui.z...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/rendercopy_gen9.c | 8 +---
1 file
From: Zhao Yakui yakui.z...@intel.com
This is from that on BDW. Without it, the pixel pipeline can't work well.
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien
From: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/gen8_media.h | 3 +++
lib/media_fill_gen9.c | 3 ++-
2 files changed, 5 insertions
From: Zhao Yakui yakui.z...@intel.com
The different cache agent type is defined for SKL although it still uses
the same function ID as the previous generations.
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau
From: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
assembler/gram.y | 40 ++--
1 file changed, 30 insertions
Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
assembler/brw_defines.h | 2 ++
assembler/gen8_instruction.c | 20
assembler/gen8_instruction.h | 2 ++
assembler/gram.y | 16 ++--
4 files changed, 38
From: Zhao Yakui yakui.z...@intel.com
The FORCE_MEDIA_AWAKE bit is added for the PIPELINE_SELECTION command and
some instructions requires that the media enginee is awake.
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien
From: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/media_fill_gen9.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff
From: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/gen8_media.h | 4
lib/media_fill_gen9.c | 4
2 files changed, 8 insertions
From: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/Makefile.sources | 1 +
lib/media_fill.c | 16 +++
lib/media_fill.h | 7
From: Xiang, Haihao haihao.xi...@intel.com
Signed-off-by: Xiang, Haihao haihao.xi...@intel.com
[Ben: Reordered if tree]
Signed-off-by: Ben Widawsky benjamin.widaw...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/intel_batchbuffer.c | 6 +-
1 file changed, 5
(...) is not used for gen6/gen7/gen8. Hence it is
reused as cache agent for SKL as that on ILK.
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Signed-off-by: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
assembler/gram.y | 22
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tests/kms_cursor_crc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 718699d..c348d7a 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -79,7 +79,6 @@ static
On Thu, Sep 25, 2014 at 11:17:00AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Write and reads following the block changed use engine specific use counters
and unless that is matched here force wake use counting goes bad. Same
force wake is attempted to be
On Thu, Sep 25, 2014 at 01:43:31PM +0100, Tvrtko Ursulin wrote:
On 09/25/2014 01:05 PM, Mika Kuoppala wrote:
Damien Lespiau damien.lesp...@intel.com writes:
On Thu, Sep 25, 2014 at 11:17:00AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Write and reads
On Thu, Sep 25, 2014 at 07:48:34AM -0700, Jesse Barnes wrote:
Damien, did you want to make these changes as part of your re-post or
should I send an updated patch to replace this one?
I wasn't planning to go through this one but let the author works for
his commit :)
--
Damien
Hi Jesse,
Mind looking at those review comments?
--
Damien
On Tue, Sep 23, 2014 at 05:50:29PM -0300, Paulo Zanoni wrote:
2014-09-04 8:27 GMT-03:00 Damien Lespiau damien.lesp...@intel.com:
From: Jesse Barnes jbar...@virtuousgeek.org
This moved around on SKL, so we need to make sure we
On Fri, Sep 19, 2014 at 01:05:02PM +0300, Ville Syrjälä wrote:
If we're going to be paranoid I think we should disable all higher WM
levels whose latency is lower than any of the lower levels. And I
think we'll want something like dev_priv-wm.max_wm_level instead of
relying on the zero
On Wed, Sep 17, 2014 at 03:07:51PM +0300, Ville Syrjälä wrote:
On Thu, Sep 04, 2014 at 12:27:13PM +0100, Damien Lespiau wrote:
From: Pradeep Bhat pradeep.b...@intel.com
This patch implements the watermark algorithm and its necessary
functions. Two function pointers skl_update_wm
in skl_compute_plane_wm()
(Damien Lespiau)
v7: Spell out allocation
skl_ddb_ functions should have the ddb as first argument
Make the skl_ddb_alloc_changed() parameters const
(Damien)
v8: Rebase on top of the crtc-primary changes
v9: Split the staging results structure to not exceed the 1Kb stack
-by: Ville Syrjälä ville.syrj...@linux.intel.com (v4)
Signed-off-by: Pradeep Bhat pradeep.b...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm
v2: Fix the 3rd plane/cursor logic (Pradeep Bhat)
v3: Fix one-by-one error in the DDB allocation code
v4: Rebase on top of the skl_pipe_pixel_rate() argument change
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_pm.c | 150
.
The skl_wm_values struct is now made more generic across planes
and cursor planes for all pipes.
v3: implemented the plane/cursor split.
v4: Change the wm union back to a structure (Ville, Daniel)
Signed-off-by: Pradeep Bhat pradeep.b...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
the trickle feed bit now that we don't do a RMW (Rodrigo,
Damien)
Add a comment about the stride unit (Rodrigo)
Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com (v1,5,6,7)
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch (v2,3
:26 AM, Damien Lespiau damien.lesp...@intel.com
wrote:
We need to provide a vfunc that will make the code in intel_dp_aux_ch()
loop once to start the AUX transaction. The return value (clock divider)
is unused on SKL, so just return 1.
Signed-off-by: Damien Lespiau
Vivi rodrigo.v...@intel.com
On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau damien.lesp...@intel.com
wrote:
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
On Tue, Sep 16, 2014 at 06:50:47PM -0700, Rodrigo Vivi wrote:
isn't fdi_link_training needed?
No, it's not. SKL doesn't have FDI.
--
Damien
if not: Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com
On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau damien.lesp...@intel.com
wrote
On Wed, Sep 17, 2014 at 11:41:54AM -0700, Rodrigo Vivi wrote:
Oh cool here are the actual fixes on de_pipe int bits!
I agree with Daniel that a separated function would be better, but what is
here is right anyway so
Took a note about that. Will have to wait for when the situation has
On Wed, Sep 17, 2014 at 03:18:21PM -0700, Rodrigo Vivi wrote:
Where can I find these pch device id definitions?
You'll have to trust Satheesh on that, it's not something we have
documented in the GPU specs.
--
Damien
On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau damien.lesp
things settle and
have a full W/A pass at that point.
--
Damien
On Wed, Sep 17, 2014 at 12:00 PM, Rodrigo Vivi rodrigo.v...@gmail.com
wrote:
Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
damien.lesp...@intel.com wrote
On Wed, Sep 17, 2014 at 05:59:24PM +0200, Daniel Vetter wrote:
On Wed, Sep 17, 2014 at 02:59:00PM +0100, Damien Lespiau wrote:
On Wed, Sep 10, 2014 at 09:39:53PM +0300, Ville Syrjälä wrote:
+struct skl_wm_values {
+ bool dirty[I915_MAX_PIPES];
+ uint32_t wm_linetime
On Wed, Sep 17, 2014 at 01:47:54PM +0300, Ville Syrjälä wrote:
On Thu, Sep 04, 2014 at 12:27:12PM +0100, Damien Lespiau wrote:
We now need to allocate space in the DDB for planes being scanned out
ourselves. The data structure to represent an allocation mirrors what
we'll need to write
On Mon, Sep 22, 2014 at 05:06:11PM +0300, Ville Syrjälä wrote:
+struct skl_pipe_wm {
+ struct skl_wm_level wm[8];
+ struct skl_wm_level trans_wm;
+ uint32_t linetime;
+};
+
struct intel_crtc {
struct drm_crtc base;
enum pipe pipe;
@@ -431,9 +437,11 @@ struct
Hi Satheesh,
On Wed, Sep 17, 2014 at 03:07:51PM +0300, Ville Syrjälä wrote:
+static bool skl_compute_plane_wm(struct skl_pipe_wm_parameters *p,
+ struct intel_plane_wm_parameters *p_params,
+ uint16_t max_page_buff_alloc,
+
On Tue, Sep 16, 2014 at 03:53:12PM +0100, Thomas Wood wrote:
On 4 September 2014 12:26, Damien Lespiau damien.lesp...@intel.com wrote:
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
On Fri, Sep 19, 2014 at 02:31:56PM +0100, Tvrtko Ursulin wrote:
Reviewed-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
Thanks for the review, pushed the patch.
--
Damien
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
Hi Daniel,
On Mon, Jul 07, 2014 at 11:04:55PM +0200, Daniel Vetter wrote:
On Thu, Jul 03, 2014 at 08:12:35AM +0100, Damien Lespiau wrote:
This reverts commit 02f6bcccf7c324115747aae2f0addd6af5d321cd.
The OA buffer can contain global data (in particular, not linked to a
context
Hi Imre,
I actually had some question there as well:
On Tue, Sep 16, 2014 at 03:35:15PM +0300, Imre Deak wrote:
@@ -7685,24 +7689,32 @@ EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
BIT(POWER_DOMAIN_PORT_DDI_C_2_LANES) | \
BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \
generations and uncertainty
about its usefulness.
v2: Improved error handling in feature detection per review comments.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
---
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
Pushed a slightly modified version of this patch as libdrm now has
When handling the error on GEM_CLOSE, we weren't freeing the allocated
page. Plug that.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
intel/intel_bufmgr_gem.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
-by: Pradeep Bhat pradeep.b...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 37 +
1 file changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index
On Wed, Sep 10, 2014 at 09:39:53PM +0300, Ville Syrjälä wrote:
+struct skl_wm_values {
+ bool dirty[I915_MAX_PIPES];
+ uint32_t wm_linetime[I915_MAX_PIPES];
+ uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
+ uint32_t cursor[I915_MAX_PIPES][8];
+ uint32_t
On Wed, Sep 17, 2014 at 10:38:36AM -0400, Rodrigo Vivi wrote:
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
tools/intel_reg_dumper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 4bc299c..f88bd9f
On Wed, Sep 17, 2014 at 01:08:50PM -0400, Rodrigo Vivi wrote:
v2: a more generic fix to cover current and future platforms (Damien).
Cc: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
(not needed for igt, but still)
Reviewed-by: Damien Lespiau
On Thu, Sep 04, 2014 at 03:21:16PM +0200, Daniel Vetter wrote:
On Thu, Sep 04, 2014 at 12:27:04PM +0100, Damien Lespiau wrote:
SKL Uses the same hardware for all planes now, so called universal
planes. Ie both the primary planes and sprite planes share the same
logic. This patch implements
.w...@intel.com (v1)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com (v2)
---
drivers/gpu/drm/i915/i915_drv.h | 5 +-
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_uncore.c | 175 +++-
3 files changed, 184 insertions(+), 2
On Wed, Sep 10, 2014 at 09:04:04PM +0300, Ville Syrjälä wrote:
+#define PLANE_WM_TRANS_1(pipe) \
+ _PIPE(pipe, PLANE_WM_TRANS_1_A_0, PLANE_WM_TRANS_1_B_0)
+#define PLANE_WM_TRANS_2(pipe) \
+ _PIPE(pipe, PLANE_WM_TRANS_2_A_0,
On Mon, Sep 15, 2014 at 02:05:56PM +0200, Daniel Vetter wrote:
This replicates what we've done in i915 in
commit 31e4b89acbd7b19c9a8557e6e660a583a0b97daa
Author: Damien Lespiau damien.lesp...@intel.com
Date: Mon Aug 18 13:51:00 2014 +0100
drm/i915: Print the pipe on which the vblank
that it's clearer how to use this
when running tests.
Cc: Rodrigo Vivi rodrigo.v...@intel.com
Cc: Damien Lespiau damien.lesp...@intel.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
Looks good to me.
Acked-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
lib/igt_aux.c
On Fri, Sep 05, 2014 at 11:25:30AM +0300, Ville Syrjälä wrote:
+/* SKL GT Driver Mailbox registers for reading memory latencies */
+#define GEN9_MAILBOX_DATA1 0x13812C
+#define GEN9_MAILBOX_READ_MEM_LAT(0x6)
+#define GEN9_MAILBOX_READ_TIMEOUT150
Timeout not
-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5a7adb1..56cccde 100644
in case a revert is needed (for testing or otherwise).
--
Damien
Damien Lespiau (2):
drm/i915: Use anonymous union/struct to save space taken by latency
values
drm/i915: Clear PCODE_DATA1 on SNB+
drivers/gpu/drm/i915/i915_drv.h | 38 +-
drivers/gpu/drm
Suggested-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 38 +-
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b
On Fri, Sep 05, 2014 at 11:42:32AM +0300, Ville Syrjälä wrote:
On Fri, Sep 05, 2014 at 09:29:33AM +0100, Damien Lespiau wrote:
On Fri, Sep 05, 2014 at 11:25:30AM +0300, Ville Syrjälä wrote:
+/* SKL GT Driver Mailbox registers for reading memory latencies */
+#define GEN9_MAILBOX_DATA1
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