le.ceraolospu...@intel.com>
Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Cc: Oscar Mateo <oscar.ma...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
intel.com>
Regards,
Michal
Does anyone else have any concern or can this patch be merged?
+1 about being merged, and since I've been using this patch you could say,
Tested-by: Michel Thierry <michel.thie...@intel.com>
___
Intel-gfx mailing list
I
rsu...@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
3 files changed,
ize in
emit_stop_watchdog. (Chris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.
/reset_engine/ (Chris)
Define count as unsigned int (Tvrtko)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
-
/WA_REG_WR_GUC_RESTORE).
v5: Only ask guc to reapply workarounds in case of render reset (Daniele).
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Jeff McGee <jeff.mc...@intel.com>
Signed-off-
/resume/reset (Daniele).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i9
. If it
is deemed useful, it can be extended to report each engine separately.
v2: s/engine_reset/reset_engine/, use union in uapi to not break compatibility.
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Michel Thierry
(magic 8-ball predicts this will change
again later on, so future-proof it). (Daniele)
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Mi
gned-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++
drivers/gpu/drm/i915/i915_irq.c | 12 +-
drivers/gp
, but it has been
seen at least once in CI.
References: https://intel-gfx-ci.01.org/CI/Trybot_831/
Reported-by: Antonio Argenziano <antonio.argenzi...@intel.com>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Th
<arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 6 +++---
drivers/gpu/drm/i915/i915_params.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/
it regardless of submission mode. (Chris)
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Jeff McGee <jeff.mc...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c| 24 +++
dr
luvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 045
Check that we can reset specific engines, also check the fallback to
full reset if something didn't work.
v2: rebase.
v3: use RESET_ENGINE_IN_PROGRESS flag.
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/selftests/intel_hangcheck.c
ika.kuopp...@linux.intel.com>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 48 -
drivers/gpu/drm/i915/i915_drv.h
t;michal.winiar...@intel.com>
Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hi...@intel.com>
Cc: Oscar Mateo <oscar.ma...@intel.com>
Reviewed-by: Michał Winiarski <michal.winiar...@intel.com> (v2)
Signed-off-by: Michel Thierry <michel
in i915_engine_info too (Chris).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/
ris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-of
eset
_readiness_.
Daniele Ceraolo Spurio (1):
drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder
Michel Thierry (19):
drm/i915: Look for active requests earlier in the reset path
drm/i915: Update i915.reset to handle engine resets
drm/i915: Modify error handler for per engine
-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> (v5)
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 14 +++---
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
2 files cha
,
provide a simple debugfs entry to see the number of times media reset
has happened.
v2: Remove unnecessary struct_mutex, _get_dirty_page and kmap_atomic;
use READ_ONCE. (Chris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
dri
Save the watchdog threshold (in us) as part of the engine state.
v2: Only do it for gen8+ (and prevent a missing-case warn).
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gpu_error.c | 12 -
On 5/18/2017 2:16 PM, Chris Wilson wrote:
On Thu, May 18, 2017 at 02:11:15PM -0700, Michel Thierry wrote:
And store the active request so that we only search for it once; this
applies for reset-engine and full reset.
v2: Check for request completion inside _prepare_engine, don't use
ECANCELED
Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 14 ++--
drivers/gpu/drm/i915/i915_drv.h | 6 --
drivers/gpu/drm/i915/i915_gem.c | 38 -
dri
On 5/18/2017 11:22 AM, Michel Thierry wrote:
fixes
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
rebase mistake
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
it the
engine hangcheck obj.
v4: Rename commit, change i915_gem_reset_request to just confirm the
active_request is still incomplete, instead of engine_stalled (Chris).
Suggested-by: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
fixes
On 5/18/2017 12:56 AM, Chris Wilson wrote:
On Wed, May 17, 2017 at 06:11:06PM -0700, Michel Thierry wrote:
On 17/05/17 13:52, Chris Wilson wrote:
On Wed, May 17, 2017 at 01:41:34PM -0700, Michel Thierry wrote:
@@ -2827,21 +2829,35 @@ int i915_gem_reset_prepare_engine(struct
intel_engine_cs
On 17/05/17 13:52, Chris Wilson wrote:
On Wed, May 17, 2017 at 01:41:34PM -0700, Michel Thierry wrote:
@@ -2827,21 +2829,35 @@ int i915_gem_reset_prepare_engine(struct
intel_engine_cs *engine)
if (engine_stalled(engine)) {
request = i915_gem_find_active_request(engine
ed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 18 ++
drivers/gpu/drm/i915/i915_drv.h | 3 ++-
drivers/gpu/drm/i915/i915_gem.c | 42 +++--
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
4 f
On 16/05/17 00:54, Chris Wilson wrote:
On Mon, May 15, 2017 at 03:25:27PM -0700, Michel Thierry wrote:
On 5/15/2017 2:47 PM, Chris Wilson wrote:
On Mon, May 15, 2017 at 10:31:58PM +0100, Chris Wilson wrote:
On Mon, May 15, 2017 at 02:20:01PM -0700, Michel Thierry wrote:
@@ -2827,21 +2830,34
On 5/15/2017 2:47 PM, Chris Wilson wrote:
On Mon, May 15, 2017 at 10:31:58PM +0100, Chris Wilson wrote:
On Mon, May 15, 2017 at 02:20:01PM -0700, Michel Thierry wrote:
@@ -2827,21 +2830,34 @@ int i915_gem_reset_prepare_engine(struct
intel_engine_cs *engine)
if (engine_stalled(engine
inside _prepare_engine, don't use
ECANCELED, remove unnecessary null checks (Chris).
Suggested-by: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 21 +--
drivers/gpu/drm/i915/i91
(Chris).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com
..@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 13 +
drivers/gpu/drm/i915/i915_drv.h | 8
drivers/gpu/drm/i915/i915_irq.c | 24
drivers/gpu/drm/i915/i915_pci
On 5/12/2017 2:09 PM, Chris Wilson wrote:
On Fri, May 12, 2017 at 01:55:11PM -0700, Michel Thierry wrote:
On 5/8/2017 11:31 AM, Michel Thierry wrote:
On 4/29/2017 7:19 AM, Chris Wilson wrote:
On Thu, Apr 27, 2017 at 04:12:42PM -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.si
On 5/8/2017 11:31 AM, Michel Thierry wrote:
On 4/29/2017 7:19 AM, Chris Wilson wrote:
On Thu, Apr 27, 2017 at 04:12:42PM -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
...
+}
+
intel_prepare_reset(dev_priv);
set_bit(I915_RESET_HANDOFF,
On 12/05/17 12:06, Chris Wilson wrote:
On Fri, May 12, 2017 at 06:55:35PM +0100, Chris Wilson wrote:
On Fri, May 12, 2017 at 06:49:09PM +0100, Chris Wilson wrote:
We have always excluded the top-page of the Global GTT to prevent
prefetching past the end of the address space. We have been lax
On 4/29/2017 7:19 AM, Chris Wilson wrote:
On Thu, Apr 27, 2017 at 04:12:42PM -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
This is a preparatory patch which modifies error handler to do per engine
hang recovery. The actual patch which impl
On 27/04/17 16:50, Chris Wilson wrote:
On Thu, Apr 27, 2017 at 04:12:43PM -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
This change implements support for per-engine reset as an initial, less
intrusive hang recovery option to be attempted before fallin
On 29/04/17 07:21, Chris Wilson wrote:
On Thu, Apr 27, 2017 at 04:12:44PM -0700, Michel Thierry wrote:
From: Mika Kuoppala <mika.kuopp...@linux.intel.com>
To perform engine reset we first disable engine to capture its state. This
is done by issuing a reset request. Because we are r
On 28/04/17 00:40, Tvrtko Ursulin wrote:
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -46,9 +46,9 @@ static int __intel_uc_reset_hw(struct
drm_i915_private *dev_priv)
int ret;
u32 guc_status;
-ret = intel_guc_reset(dev_priv);
+ret =
On 4/27/2017 4:50 PM, Chris Wilson wrote:
-static void engine_retire_requests(struct intel_engine_cs *engine)
+void engine_retire_requests(struct intel_engine_cs *engine)
Fortunately stray chunk. I was about to scream.
This chunk has been there for quite a long time, at least since v4...
On 4/27/2017 4:58 PM, Chris Wilson wrote:
On Thu, Apr 27, 2017 at 04:12:52PM -0700, Michel Thierry wrote:
+#define WA_REG_WR_GUC_RESTORE(addr, val) do { \
+ const int r = guc_wa_add(dev_priv, (addr), (val)); \
+ if (r) \
+ return r
/resume/reset (Daniele).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i9
@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 29 ++
drivers/gpu/drm/i915/i915_gem_context.c | 95 +
drivers/gpu/drm/i915/intel_lrc.c| 5 +-
include/uapi/drm/i915_dr
: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i
ize in
emit_stop_watchdog. (Chris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.
;ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 37 +
drivers/gpu/drm/i915/i915_drv.h | 6 --
drivers/gpu/drm/i915/i915_gem.c | 37 -
3 files
linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 6 +++---
drivers/gpu/drm/i915/i915_params.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
dif
Check that we can reset specific engines, also check the fallback to
full reset if something didn't work.
v2: rebase.
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 147 +++
1 file changed, 147 inse
t;michal.winiar...@intel.com>
Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hi...@intel.com>
Cc: Oscar Mateo <oscar.ma...@intel.com>
Reviewed-by: Michał Winiarski <michal.winiar...@intel.com> (v2)
Signed-off-by: Michel Thierry <michel
,
provide a simple debugfs entry to see the number of times media reset
has happened.
v2: Remove unnecessary struct_mutex, _get_dirty_page and kmap_atomic;
use READ_ONCE. (Chris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
dri
rovide this information in debugfs.
v2: s/engine_reset/reset_engine/ (Chris)
Define count as unsigned int (Tvrtko)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signe
gned-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++
drivers/gpu/drm/i915/i915_irq.c | 12 +-
drivers/gp
: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 60 ++--
drivers/gpu/drm/i915/i915_drv.h | 12 +++-
drivers/
it regardless of submission mode. (Chris)
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Jeff McGee <jeff.mc...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c| 42 +
Save the watchdog threshold (in us) as part of the engine state.
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++
2 files changed, 8 insertions(+), 4 deletions(-)
diff
intel_guc_reset sounds more like the microcontroller is the one performing
a reset, while in this case is the opposite. intel_reset_guc not only
makes it clearer, it follows the other intel_reset functions available.
Cc: Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com>
Signed-off-by:
an Lister <ian.lis...@intel.com>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 15 +++
drivers/gpu/drm/i915/i91
ensure the same.
v2: Include reset engine count in i915_engine_info too (Chris).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie
ers we will
have to restore after reset (s/I915_GUC_REG_WRITE/WA_REG_WR_GUC_RESTORE).
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Jeff McGee <jeff.mc...@intel.com>
Signed-off-by: Michel Thierry &
uv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 3eb
support
drm/i915/guc: Provide register list to be saved/restored during engine
reset
Daniele Ceraolo Spurio (1):
drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder
Michel Thierry (11):
drm/i915: Cancel reset-engine if we couldn't find an active request
drm/i915: Add engine re
. If it
is deemed useful, it can be extended to report each engine separately.
v2: s/engine_reset/reset_engine/, use union in uapi to not break compatibility.
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Michel Thierry
On 27/04/17 11:20, Tvrtko Ursulin wrote:
On 27/04/2017 19:14, Michel Thierry wrote:
On 12/04/17 09:22, Michel Thierry wrote:
On 12/04/17 08:58, Chris Wilson wrote:
On Wed, Apr 12, 2017 at 04:48:42PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Look
On 12/04/17 09:22, Michel Thierry wrote:
On 12/04/17 08:58, Chris Wilson wrote:
On Wed, Apr 12, 2017 at 04:48:42PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Looks like intel_guc_reset had the ability to sleep under the
uncore spinlock since f
restarted.
Thanks, one less patch for me (and I arrived late to the party, I see
it's already merged).
Suggested-by: Michel Thierry <michel.thie...@intel.com>
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thie...@intel.com>
Cc: Mika Ku
On 20/04/17 17:17, Michel Thierry wrote:
Hmm. Interesting. This relies on i915_gem_retire_requests() (i.e.
struct_mutex) to skip replaying innocent requests, but here we should be
asserting that we do have the hung request.
i.e.
request = i915_gem_find_active_request(engine);
if (!request
On 21/04/17 13:21, Chris Wilson wrote:
On Fri, Apr 21, 2017 at 01:10:37PM -0700, Daniele Ceraolo Spurio wrote:
On 21/04/17 13:07, Michel Thierry wrote:
On 20/04/17 10:29, Michel Thierry wrote:
On 20/04/17 09:39, Daniele Ceraolo Spurio wrote:
On 20/04/17 04:33, Joonas Lahtinen wrote
On 20/04/17 10:29, Michel Thierry wrote:
On 20/04/17 09:39, Daniele Ceraolo Spurio wrote:
On 20/04/17 04:33, Joonas Lahtinen wrote:
On ke, 2017-04-19 at 11:35 -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
GuC expects a list of register
On 19/04/17 03:49, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:20PM -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
This change implements support for per-engine reset as an initial, less
intrusive hang recovery option to be attempted before fallin
On 20/04/17 09:39, Daniele Ceraolo Spurio wrote:
On 20/04/17 04:33, Joonas Lahtinen wrote:
On ke, 2017-04-19 at 11:35 -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
GuC expects a list of registers from the driver which are saved/restored
during
On 20/04/17 01:52, Chris Wilson wrote:
On Wed, Apr 19, 2017 at 06:09:00PM -0700, Michel Thierry wrote:
This patch is missing:
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index c1013af0b910..a8bdea43a217 100644
--- a/drivers/gpu/drm/i915
On 18/04/17 13:23, Michel Thierry wrote:
Final enablement patch for GPU hang detection using watchdog timeout.
Using the gem_context_setparam ioctl, users can specify the desired
timeout value in microseconds, and the driver will do the conversion to
'timestamps'.
The recommended default
On 19/04/17 03:27, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:29PM -0700, Michel Thierry wrote:
This patch adds per engine reset and recovery (TDR) support when GuC is
used to submit workloads to GPU.
In the case of i915 directly submission to ELSP, driver manages hang
detection
m>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Jeff McGee <jeff.mc...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h| 3 ++
drivers/gpu/drm/i
On 19/04/17 10:51, Chris Wilson wrote:
On Wed, Apr 19, 2017 at 10:11:37AM -0700, Michel Thierry wrote:
On 19/04/17 03:20, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:31PM -0700, Michel Thierry wrote:
*** General ***
Watchdog timeout (or "media engine reset") is
On 19/04/17 03:20, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:31PM -0700, Michel Thierry wrote:
*** General ***
Watchdog timeout (or "media engine reset") is a feature that allows
userland applications to enable hang detection on individual batch buffers.
The detection
On 18/04/17 17:26, Daniele Ceraolo Spurio wrote:
On 18/04/17 13:23, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
GuC expects a list of registers from the driver which are saved/restored
during engine reset. The type of value to be saved is controlled by
fla
On 18/04/17 16:06, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 02:36:14PM -0700, Michel Thierry wrote:
On 18/04/17 14:20, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:32PM -0700, Michel Thierry wrote:
@@ -1329,10 +1331,29 @@ static int gen8_emit_bb_start(struct
drm_i915_gem_request
On 18/04/17 14:40, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:19PM -0700, Michel Thierry wrote:
From: Arun Siluvery <arun.siluv...@linux.intel.com>
This is a preparatory patch which modifies error handler to do per engine
hang recovery. The actual patch which implements this se
On 18/04/17 14:20, Chris Wilson wrote:
On Tue, Apr 18, 2017 at 01:23:32PM -0700, Michel Thierry wrote:
@@ -1329,10 +1331,29 @@ static int gen8_emit_bb_start(struct
drm_i915_gem_request *req,
req->ctx->ppgtt->pd_dirty_rings &=
~intel_engine_fla
: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i
t;michal.winiar...@intel.com>
Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hi...@intel.com>
Cc: Oscar Mateo <oscar.ma...@intel.com>
Reviewed-by: Michał Winiarski <michal.winiar...@intel.com> (v2)
Signed-off-by: Michel Thierry <michel
N9 onwards, the stop counter bit is
the same for all engines.
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel
o need to preserve
head/tail either, be extra paranoid and save whitelisted registers (Daniele).
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Jeff McGee <jeff.mc...@intel.com>
Signe
Check that we can reset specific engines, also check the fallback to
full reset if something didn't work.
v2: rebase.
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 147 +++
1 file changed, 147 inse
. If it
is deemed useful, it can be extended to report each engine separately.
v2: s/engine_reset/reset_engine/, use union in uapi to not break compatibility.
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Michel Thierry
t;jeff.mc...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c| 43 +-
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_guc_submission.c | 48 ++
dr
Save the watchdog threshold (in us) as part of the engine state.
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++
2 files changed, 8 insertions(+), 4 deletions(-)
diff
of
combined start_watchdog, bb_start and stop_watchdog to avoid any error
after emitting bb_start.
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Ian Lister <ian.lis...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Th
Daniele Ceraolo Spurio (1):
drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder
Michel Thierry (11):
drm/i915: Fix stale comment about I915_RESET_IN_PROGRESS flag
drm/i915: Rename gen8_(un)request_engine_reset to
gen8_reset_engine_start/cancel
drm/i915: Add engine reset co
not?).
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 29 +
drivers/gpu/drm/i915/i915_g
/resume/reset (Daniele).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_guc_submission.c | 21 ++---
drivers/gpu/drm/i91
,
provide a simple debugfs entry to see the number of times media reset
has happened.
v2: Remove unnecessary struct_mutex, _get_dirty_page and kmap_atomic;
use READ_ONCE. (Chris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
dri
uv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 3eb
o need to call
revoke/restore_fences and _retire_requests (Chris).
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Tomas Elf <tomas@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
linux.intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_params.c | 6 +++---
drivers/gpu/drm/i915/i915_params.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
dif
As all other functions related to resetting engines are using
reset_engine.
v2: remove _request_ and use start/cancel instead (Chris)
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 8
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