Plane source,destination size limit, as well as scaler ratio limits are published by drm plane properties.
Scaling requirement is calculated as required scaling = (src*0x10000)/dst. Required ratio always should be less than scaling_max_down_ratio or nv12_scaling_max_down_ratio property values. Other available scaler objects in this patch are 1) min_src_size - minimum plane source size allowed 2) max_src_size - maximum plane source size allowed 3) min_dst_size - minimum destination size allowed Change-Id: I496aa3410addc9742491ea786ffb6d1eb78c19a6 Tracked-On: https://jira01.devtools.intel.com/browse/OAM-14270 Signed-off-by: Nabendu Maiti <nabendu.bikash.ma...@intel.com> Reviewed-on: https://android.intel.com:443/454423 --- drivers/gpu/drm/i915/i915_drv.h | 7 ++++ drivers/gpu/drm/i915/intel_atomic_plane.c | 49 +++++++++++++++++++++- drivers/gpu/drm/i915/intel_display.c | 70 +++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 9 ++++ drivers/gpu/drm/i915/intel_sprite.c | 3 ++ 5 files changed, 136 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6f1e0f1..b7856d33 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1902,6 +1902,13 @@ struct drm_i915_private { struct drm_property *broadcast_rgb_property; struct drm_property *force_audio_property; + /* scaler properties */ + struct drm_property *prop_max_downscale_ratio; + struct drm_property *prop_max_nv12_downscale_ratio; + struct drm_property *prop_min_src_size; + struct drm_property *prop_max_src_size; + struct drm_property *prop_min_dst_size; + /* hda/i915 audio component */ struct i915_audio_component *audio_component; bool audio_component_registered; diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c index 7de7721..c4c87dc 100644 --- a/drivers/gpu/drm/i915/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c @@ -228,8 +228,53 @@ intel_plane_atomic_get_property(struct drm_plane *plane, struct drm_property *property, uint64_t *val) { - DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name); - return -EINVAL; + struct drm_i915_private *dev_priv = state->plane->dev->dev_private; + struct intel_plane_state *intel_state = to_intel_plane_state(state); + struct intel_plane *intel_plane = to_intel_plane(plane); + enum plane plane_id = intel_plane->plane; + enum pipe pipe = intel_plane->pipe; + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + int cdclk = dev_priv->cdclk_freq; + int crtc_clock = crtc->hwmode.crtc_clock; + + /* + * scaling ratio is calculated as following. + * required scaling = (src*0x10000)/dst. + * We store the values in packed BCD format, to stop precision loss + * We keep MSB 16bit for Integer and 16bit for fraction + * i.e 6.75 is represented as 0110.0111010100000000 + */ + if (INTEL_INFO(state->plane->dev)->gen == 9) { + if (cdclk && crtc_clock) { + intel_plane->max_down_ratio = + min(((SKL_MAX_DOWNSCALE_RATIO << 16) - 1), + (1 << 8) * ((cdclk << 8) / crtc_clock)); + + /* For primary plane & 1st sprite plane plane id :0 */ + if ((pipe != PIPE_C) && (plane_id == 0)) { + intel_plane->nv12_max_down_ratio = + min((SKL_MAX_NV12_DOWNSCALE_RATIO << + 16) - 1, + (1 << 8) * ((cdclk << 8) / + crtc_clock)); + } + } + } + + if (property == dev_priv->prop_max_downscale_ratio) { + *val = intel_plane->max_down_ratio; + } else if (property == dev_priv->prop_max_nv12_downscale_ratio) { + *val = intel_plane->nv12_max_down_ratio; + } else if (property == dev_priv->prop_min_src_size) { + *val = intel_plane->min_src_size; + } else if (property == dev_priv->prop_max_src_size) { + *val = intel_plane->max_src_size; + } else if (property == dev_priv->prop_min_dst_size) { + *val = intel_plane->min_dst_size; + } else { + DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name); + return -EINVAL; + } } /** diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ff60241..e3ebd04 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14095,6 +14095,9 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev, if (INTEL_INFO(dev)->gen >= 4) intel_create_rotation_property(dev, primary); + if (INTEL_INFO(dev)->gen == 9) + intel_create_scaler_props(dev, primary); + drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs); return &primary->base; @@ -14124,6 +14127,73 @@ void intel_create_rotation_property(struct drm_device *dev, struct intel_plane * plane->base.state->rotation); } +void +intel_create_scaler_props(struct drm_device *dev, struct intel_plane *plane) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + if (!dev_priv->prop_max_downscale_ratio) { + dev_priv->prop_max_downscale_ratio = + drm_property_create_object(dev, DRM_MODE_PROP_ATOMIC, + "scaling_max_down_ratio", + DRM_MODE_OBJECT_PLANE); + } + if (!dev_priv->prop_max_nv12_downscale_ratio) { + dev_priv->prop_max_nv12_downscale_ratio = + drm_property_create_object(dev, DRM_MODE_PROP_ATOMIC, + "nv12_scaling_max_down_ratio", + DRM_MODE_OBJECT_PLANE); + } + if (!dev_priv->prop_min_src_size) { + dev_priv->prop_min_src_size = drm_property_create_object(dev, + DRM_MODE_PROP_ATOMIC, "min_src_size", + DRM_MODE_OBJECT_PLANE); + } + if (!dev_priv->prop_max_src_size) { + dev_priv->prop_max_src_size = drm_property_create_object(dev, + DRM_MODE_PROP_ATOMIC, "max_src_size", + DRM_MODE_OBJECT_PLANE); + } + if (!dev_priv->prop_min_dst_size) { + dev_priv->prop_min_dst_size = drm_property_create_object(dev, + DRM_MODE_PROP_ATOMIC, "min_dst_size", + DRM_MODE_OBJECT_PLANE); + } + + plane->max_down_ratio = DRM_PLANE_HELPER_NO_SCALING; + plane->nv12_max_down_ratio = DRM_PLANE_HELPER_NO_SCALING; + plane->min_src_size = 0; + plane->max_src_size = 0; + plane->min_dst_size = 0; + + if (INTEL_INFO(dev)->gen == 9) { + plane->min_src_size = ((SKL_MIN_SRC_W << 16) | SKL_MIN_SRC_H); + plane->max_src_size = ((SKL_MAX_SRC_W << 16) | SKL_MAX_SRC_H); + plane->min_dst_size = ((SKL_MIN_DST_W << 16) | SKL_MIN_DST_H); + } + + if (dev_priv->prop_max_downscale_ratio) + drm_object_attach_property(&plane->base.base, + dev_priv->prop_max_downscale_ratio, + plane->max_down_ratio); + if (dev_priv->prop_max_nv12_downscale_ratio) + drm_object_attach_property(&plane->base.base, + dev_priv->prop_max_nv12_downscale_ratio, + plane->nv12_max_down_ratio); + if (dev_priv->prop_min_src_size) + drm_object_attach_property(&plane->base.base, + dev_priv->prop_min_src_size, + plane->min_src_size); + if (dev_priv->prop_max_src_size) + drm_object_attach_property(&plane->base.base, + dev_priv->prop_max_src_size, + plane->max_src_size); + if (dev_priv->prop_min_dst_size) + drm_object_attach_property(&plane->base.base, + dev_priv->prop_min_dst_size, + plane->min_dst_size); +} + static int intel_check_cursor_plane(struct drm_plane *plane, struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index beed9e8..05a859f 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -351,6 +351,8 @@ struct intel_initial_plane_config { #define SKL_MAX_DST_W 4096 #define SKL_MIN_DST_H 8 #define SKL_MAX_DST_H 4096 +#define SKL_MAX_DOWNSCALE_RATIO 3 +#define SKL_MAX_NV12_DOWNSCALE_RATIO 2 struct intel_scaler { int in_use; @@ -698,6 +700,10 @@ struct intel_plane { int max_downscale; uint32_t frontbuffer_bit; + /*scaling props*/ + u32 min_src_size, max_src_size, min_dst_size, max_dst_size; + u32 max_down_ratio, nv12_max_down_ratio; + /* Since we need to change the watermarks before/after * enabling/disabling the planes, we need to store the parameters here * as the other pieces of the struct may not reflect the values we want @@ -1196,6 +1202,9 @@ intel_rotation_90_or_270(unsigned int rotation) void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *plane); +void +intel_create_scaler_props(struct drm_device *dev, struct intel_plane *plane); + void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv, enum pipe pipe); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 0f3e230..5dac10b 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1120,6 +1120,9 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) intel_create_rotation_property(dev, intel_plane); + if (INTEL_INFO(dev)->gen == 9) + intel_create_scaler_props(dev, intel_plane); + drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs); return 0; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
