[Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode

2023-05-04 Thread Stanislav Lisovskiy
Display to communicate display pipe count/CDCLK/voltage configuration to Pcode for more accurate power accounting for DG2. Existing sequence is only sending the voltage value to the Pcode. Adding new sequence with current cdclk associate with voltage value masking. Adding pcode request when any

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode

2023-05-03 Thread Govindapillai, Vinod
Hi Stan On Tue, 2023-04-25 at 11:13 +0300, Stanislav Lisovskiy wrote: > Display to communicate display pipe count/CDCLK/voltage configuration > to Pcode for more accurate power accounting for DG2. > Existing sequence is only sending the voltage value to the Pcode. > Adding new sequence with

[Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode

2023-04-25 Thread Stanislav Lisovskiy
Display to communicate display pipe count/CDCLK/voltage configuration to Pcode for more accurate power accounting for DG2. Existing sequence is only sending the voltage value to the Pcode. Adding new sequence with current cdclk associate with voltage value masking. Adding pcode request when any

[Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode

2023-03-20 Thread Stanislav Lisovskiy
Display to communicate display pipe count/CDCLK/voltage configuration to Pcode for more accurate power accounting for gen >= 12. Existing sequence is only sending the voltage value to the Pcode. Adding new sequence with current cdclk associate with voltage value masking. Adding pcode request when

[Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-03-17 Thread Stanislav Lisovskiy
Display to communicate display pipe count/CDCLK/voltage configuration to Pcode for more accurate power accounting for gen >= 12. Existing sequence is only sending the voltage value to the Pcode. Adding new sequence with current cdclk associate with voltage value masking. Adding pcode request when

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-03-07 Thread Jani Nikula
On Tue, 07 Mar 2023, "Lisovskiy, Stanislav" wrote: > On Tue, Mar 07, 2023 at 12:23:59PM +0200, Jani Nikula wrote: >> On Tue, 07 Mar 2023, "Lisovskiy, Stanislav" >> wrote: >> > On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote: >> >> On Mon, 27 Feb 2023, Stanislav Lisovskiy >> >>

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-03-07 Thread Lisovskiy, Stanislav
On Tue, Mar 07, 2023 at 12:23:59PM +0200, Jani Nikula wrote: > On Tue, 07 Mar 2023, "Lisovskiy, Stanislav" > wrote: > > On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote: > >> On Mon, 27 Feb 2023, Stanislav Lisovskiy > >> wrote: > >> > Display to communicate display pipe

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-03-07 Thread Jani Nikula
On Tue, 07 Mar 2023, "Lisovskiy, Stanislav" wrote: > On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote: >> On Mon, 27 Feb 2023, Stanislav Lisovskiy >> wrote: >> > Display to communicate display pipe count/CDCLK/voltage configuration >> > to Pcode for more accurate power accounting

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-03-07 Thread Lisovskiy, Stanislav
On Mon, Mar 06, 2023 at 08:14:35PM +0200, Jani Nikula wrote: > On Mon, 27 Feb 2023, Stanislav Lisovskiy > wrote: > > Display to communicate display pipe count/CDCLK/voltage configuration > > to Pcode for more accurate power accounting for gen >= 12. > > Existing sequence is only sending the

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-03-06 Thread Jani Nikula
On Mon, 27 Feb 2023, Stanislav Lisovskiy wrote: > Display to communicate display pipe count/CDCLK/voltage configuration > to Pcode for more accurate power accounting for gen >= 12. > Existing sequence is only sending the voltage value to the Pcode. > Adding new sequence with current cdclk

[Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-02-27 Thread Stanislav Lisovskiy
Display to communicate display pipe count/CDCLK/voltage configuration to Pcode for more accurate power accounting for gen >= 12. Existing sequence is only sending the voltage value to the Pcode. Adding new sequence with current cdclk associate with voltage value masking. Adding pcode request when

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-02-27 Thread kernel test robot
://anongit.freedesktop.org/drm/drm-tip drm-tip patch link: https://lore.kernel.org/r/20230227095253.22415-1-stanislav.lisovskiy%40intel.com patch subject: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately config: i386-randconfig-r033-20230227 (https

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-02-27 Thread kernel test robot
://anongit.freedesktop.org/drm/drm-tip drm-tip patch link: https://lore.kernel.org/r/20230227095253.22415-1-stanislav.lisovskiy%40intel.com patch subject: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately config: x86_64-defconfig (https://download.01.org

Re: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-02-27 Thread kernel test robot
://anongit.freedesktop.org/drm/drm-tip drm-tip patch link: https://lore.kernel.org/r/20230227095253.22415-1-stanislav.lisovskiy%40intel.com patch subject: [Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately config: x86_64-rhel-8.3 (https://download.01

[Intel-gfx] [PATCH] drm/i915/display: Communicate display power demands to pcode more accurately

2023-02-27 Thread Stanislav Lisovskiy
Display to communicate display pipe count/CDCLK/voltage configuration to Pcode for more accurate power accounting for gen >= 12. Existing sequence is only sending the voltage value to the Pcode. Adding new sequence with current cdclk associate with voltage value masking. Adding pcode request when