On Mon, 21 Nov 2011 14:55:51 +0800
Fang, XunX xunx.f...@intel.com wrote:
void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
@@ -902,8 +924,9 @@ MODULE_LICENSE(GPL and additional rights);
/* We give fast paths for the really cool registers */
#define NEEDS_FORCE_WAKE(dev_priv,
PM
To: Jesse Barnes
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: add multi-threaded forcewake support
On Fri, 18 Nov 2011 14:48:39 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
So the ECOBUS reg *is* in the GT power well. Which means in order to
read
On IVB C0+ with newer BIOSes, the forcewake handshake has changed. There's
now a bitfield for different driver components to keep the GT powered
on. On Linux, we centralize forcewake handling in one place, so we
still just need a single bit, but we need to use the new registers if MT
forcewake
On Fri, 18 Nov 2011 11:36:32 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
+ while (count++ 50 (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) 1))
You said this should be 16
+ I915_WRITE_NOTRACE(FORCEWAKE_MT, (115) | 1);
and this should be 16 too
+ if
On Fri, 18 Nov 2011 14:01:00 -0800
Keith Packard kei...@keithp.com wrote:
On Fri, 18 Nov 2011 11:36:32 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
+ while (count++ 50 (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) 1))
You said this should be 16
No this one should be looking at the
On Fri, 18 Nov 2011 14:12:03 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
No this one should be looking at the bottom bit, so I think it's ok.
Sorry, bad mail edit. There's one 15 in both force_wake_mt_put and
force_wake_mt_get and they both need to be 16:
+void
On Fri, 18 Nov 2011 14:35:22 -0800
Keith Packard kei...@keithp.com wrote:
On Fri, 18 Nov 2011 14:12:03 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
No this one should be looking at the bottom bit, so I think it's ok.
Sorry, bad mail edit. There's one 15 in both force_wake_mt_put
On Fri, 18 Nov 2011 14:48:39 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
So the ECOBUS reg *is* in the GT power well. Which means in order to
read it we have to disable RC6 altogether, forcibly, using the 0xa090
reg, set up force wake, then re-enable RC6.
Not surprising the ECOBUS
On Fri, 18 Nov 2011 15:27:14 -0800
Keith Packard kei...@keithp.com wrote:
On Fri, 18 Nov 2011 14:48:39 -0800, Jesse Barnes jbar...@virtuousgeek.org
wrote:
So the ECOBUS reg *is* in the GT power well. Which means in order to
read it we have to disable RC6 altogether, forcibly, using the
