[Intel-gfx] [PATCH 06/19] drm/i915/guc: Convert golden context init to dma_buf_map

[Lucas De Marchi]

Now the map is saved during creation, so use it to initialize the
golden context, reading from shmem and writing to either system or IO
memory.

Cc: Matt Roper <matthew.d.ro...@intel.com>
Cc: Thomas Hellström <thomas.hellst...@linux.intel.com>
Cc: Daniel Vetter <dan...@ffwll.ch>
Cc: John Harrison <john.c.harri...@intel.com>
Cc: Matthew Brost <matthew.br...@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 25 +++++++++++-----------
 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 01d2c1ead680..bcf52ac4fe35 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -473,18 +473,17 @@ static struct intel_engine_cs *find_engine_state(struct 
intel_gt *gt, u8 engine_
 
 static void guc_init_golden_context(struct intel_guc *guc)
 {
-       struct __guc_ads_blob *blob = guc->ads_blob;
        struct intel_engine_cs *engine;
        struct intel_gt *gt = guc_to_gt(guc);
+       struct dma_buf_map golden_context_map;
        u32 addr_ggtt, offset;
        u32 total_size = 0, alloc_size, real_size;
        u8 engine_class, guc_class;
-       u8 *ptr;
 
        if (!intel_uc_uses_guc_submission(&gt->uc))
                return;
 
-       GEM_BUG_ON(!blob);
+       GEM_BUG_ON(dma_buf_map_is_null(&guc->ads_map));
 
        /*
         * Go back and fill in the golden context data now that it is
@@ -492,15 +491,15 @@ static void guc_init_golden_context(struct intel_guc *guc)
         */
        offset = guc_ads_golden_ctxt_offset(guc);
        addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
-       ptr = ((u8 *)blob) + offset;
+
+       golden_context_map = DMA_BUF_MAP_INIT_OFFSET(&guc->ads_map, offset);
 
        for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; 
++engine_class) {
                if (engine_class == OTHER_CLASS)
                        continue;
 
                guc_class = engine_class_to_guc_class(engine_class);
-
-               if (!blob->system_info.engine_enabled_masks[guc_class])
+               if (!ads_blob_read(guc, 
system_info.engine_enabled_masks[guc_class]))
                        continue;
 
                real_size = intel_engine_context_size(gt, engine_class);
@@ -511,18 +510,20 @@ static void guc_init_golden_context(struct intel_guc *guc)
                if (!engine) {
                        drm_err(&gt->i915->drm, "No engine state recorded for 
class %d!\n",
                                engine_class);
-                       blob->ads.eng_state_size[guc_class] = 0;
-                       blob->ads.golden_context_lrca[guc_class] = 0;
+                       ads_blob_write(guc, ads.eng_state_size[guc_class], 0);
+                       ads_blob_write(guc, ads.golden_context_lrca[guc_class], 
0);
                        continue;
                }
 
-               GEM_BUG_ON(blob->ads.eng_state_size[guc_class] !=
+               GEM_BUG_ON(ads_blob_read(guc, ads.eng_state_size[guc_class]) !=
                           real_size - LRC_SKIP_SIZE);
-               GEM_BUG_ON(blob->ads.golden_context_lrca[guc_class] != 
addr_ggtt);
+               GEM_BUG_ON(ads_blob_read(guc, 
ads.golden_context_lrca[guc_class]) != addr_ggtt);
+
                addr_ggtt += alloc_size;
 
-               shmem_read(engine->default_state, 0, ptr, real_size);
-               ptr += alloc_size;
+               shmem_read_to_dma_buf_map(engine->default_state, 0,
+                                         &golden_context_map, real_size);
+               dma_buf_map_incr(&golden_context_map, alloc_size);
        }
 
        GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);
-- 
2.35.0