Disable GWL clock gating to prevent two different issues that
might cause hangs.
Please notice that one of the issues is pre-production only.
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.ma...@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 68f1b60..2b7b88b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8564,6 +8564,12 @@ static void icl_init_clock_gating(struct
drm_i915_private *dev_priv)
I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE,
(I915_READ(SLICE_UNIT_LEVEL_CLKGATE) |
MSCUNIT_CLKGATE_DIS));
+
+ /* Wa_1406680159:icl */
+ /* Wa_2201832410:icl (pre-prod, only until C0) */
+ I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE,
+ (I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE) |
+ GWUNIT_CLKGATE_DIS));
}
static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
--
1.9.1
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