On 10/09/2015 02:07 AM, David Woodhouse wrote:
> On Fri, 2015-10-09 at 10:47 +0200, Daniel Vetter wrote:
>> On Fri, Oct 09, 2015 at 08:56:24AM +0100, David Woodhouse wrote:
>>> On Fri, 2015-10-09 at 09:28 +0200, Daniel Vetter wrote:
Hm if this still works the same way as on older platform
On Fri, 2015-10-09 at 10:47 +0200, Daniel Vetter wrote:
> On Fri, Oct 09, 2015 at 08:56:24AM +0100, David Woodhouse wrote:
> > On Fri, 2015-10-09 at 09:28 +0200, Daniel Vetter wrote:
> > >
> > > Hm if this still works the same way as on older platforms then pagefaults
> > > just read all 0 and wri
On Fri, Oct 09, 2015 at 08:56:24AM +0100, David Woodhouse wrote:
> On Fri, 2015-10-09 at 09:28 +0200, Daniel Vetter wrote:
> >
> > Hm if this still works the same way as on older platforms then pagefaults
> > just read all 0 and writes go nowhere from the gpu. That generally also
> > explains ever
On Fri, 2015-10-09 at 09:28 +0200, Daniel Vetter wrote:
>
> Hm if this still works the same way as on older platforms then pagefaults
> just read all 0 and writes go nowhere from the gpu. That generally also
> explains ever-increasing numbers of the CS execution pointer since it's
> busy churning
On Fri, Oct 09, 2015 at 09:28:37AM +0200, Daniel Vetter wrote:
> On Thu, Oct 08, 2015 at 11:46:08PM +0100, David Woodhouse wrote:
> > On Thu, 2015-10-08 at 12:29 +0100, Tomas Elf wrote:
> > >
> > > Could someone clarify what this means from the TDR point of view,
> > > please? When you say "conte
On Thu, Oct 08, 2015 at 11:46:08PM +0100, David Woodhouse wrote:
> On Thu, 2015-10-08 at 12:29 +0100, Tomas Elf wrote:
> >
> > Could someone clarify what this means from the TDR point of view,
> > please? When you say "context blew up" I'm guessing that you mean that
> > come context caused the
On Thu, 2015-10-08 at 16:57 +0100, Chris Wilson wrote:
> Correct me if I am wrong, but it looks like i915_svm implements the
> lowlevel interface with the hardware, so by convention is intel_svm.c
I think the plan is to drop the driver-mode interface altogether and
use the OS-mode version that I p
On Thu, 2015-10-08 at 12:29 +0100, Tomas Elf wrote:
>
> Could someone clarify what this means from the TDR point of view,
> please? When you say "context blew up" I'm guessing that you mean that
> come context caused the fault handler to get involved somehow?
>
> Does this imply that the offend
On Fri, Sep 04, 2015 at 09:59:00AM -0700, Jesse Barnes wrote:
> New file with VT-d SVM and PASID handling functions and page table
> management. This belongs in the IOMMU code (along with some extra bits
> for waiting for invalidations and page faults to complete, flushing the
> device IOTLB, etc.
On 07/10/2015 17:14, Daniel Vetter wrote:
On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
On 10/07/2015 06:00 AM, David Woodhouse wrote:
On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
+
+ ret = handle_mm_fault(mm, vma, address,
+ desc.wr_
On 07/10/2015 17:14, Daniel Vetter wrote:
On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
On 10/07/2015 06:00 AM, David Woodhouse wrote:
On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
+
+ ret = handle_mm_fault(mm, vma, address,
+ desc.wr_
On Wed, Oct 07, 2015 at 10:26:20AM -0700, Jesse Barnes wrote:
> On 10/07/2015 10:17 AM, David Woodhouse wrote:
> > On Wed, 2015-10-07 at 09:28 -0700, Jesse Barnes wrote:
> >> On 10/07/2015 09:14 AM, Daniel Vetter wrote:
> >>> On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
> On 1
On 10/07/2015 10:17 AM, David Woodhouse wrote:
> On Wed, 2015-10-07 at 09:28 -0700, Jesse Barnes wrote:
>> On 10/07/2015 09:14 AM, Daniel Vetter wrote:
>>> On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
On 10/07/2015 06:00 AM, David Woodhouse wrote:
> On Fri, 2015-09-04 at 0
On Wed, 2015-10-07 at 09:28 -0700, Jesse Barnes wrote:
> On 10/07/2015 09:14 AM, Daniel Vetter wrote:
> > On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
> > > On 10/07/2015 06:00 AM, David Woodhouse wrote:
> > > > On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
> > > > > +
> >
On 10/07/2015 09:14 AM, Daniel Vetter wrote:
> On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
>> On 10/07/2015 06:00 AM, David Woodhouse wrote:
>>> On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
+
+ ret = handle_mm_fault(mm, vma, address,
+
On Wed, Oct 07, 2015 at 08:16:42AM -0700, Jesse Barnes wrote:
> On 10/07/2015 06:00 AM, David Woodhouse wrote:
> > On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
> >> +
> >> + ret = handle_mm_fault(mm, vma, address,
> >> + desc.wr_req ? FAULT_FLAG_WRITE : 0
On 10/07/2015 06:00 AM, David Woodhouse wrote:
> On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
>> +
>> + ret = handle_mm_fault(mm, vma, address,
>> + desc.wr_req ? FAULT_FLAG_WRITE : 0);
>> + if (ret & VM_FAULT_ERROR) {
>> + gpu_mm_segv
On Fri, 2015-09-04 at 09:59 -0700, Jesse Barnes wrote:
> +
> + ret = handle_mm_fault(mm, vma, address,
> + desc.wr_req ? FAULT_FLAG_WRITE : 0);
> + if (ret & VM_FAULT_ERROR) {
> + gpu_mm_segv(tsk, address, SEGV_ACCERR); /* ? */
> +
New file with VT-d SVM and PASID handling functions and page table
management. This belongs in the IOMMU code (along with some extra bits
for waiting for invalidations and page faults to complete, flushing the
device IOTLB, etc.)
FIXME:
need work queue for re-submitting contexts
TE bit handli
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