Initialize Haswell HDMI audio registers to generate an unsolicited
response to the audio controller driver to indicate that the controller
sequence should start.

Signed-off-by: Wang Xingchao <xingchao.w...@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   37 ++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 17020cd..b635bf6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5071,6 +5071,7 @@ static void ironlake_write_eld(struct drm_connector 
*connector,
                                     struct drm_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = connector->dev->dev_private;
+       struct drm_device *dev = crtc->dev;
        uint8_t *eld = connector->eld;
        uint32_t eldv;
        uint32_t i;
@@ -5079,12 +5080,18 @@ static void ironlake_write_eld(struct drm_connector 
*connector,
        int aud_config;
        int aud_cntl_st;
        int aud_cntrl_st2;
+       int pipe = to_intel_crtc(crtc)->pipe;
 
        if (HAS_PCH_IBX(connector->dev)) {
                hdmiw_hdmiedid = IBX_HDMIW_HDMIEDID_A;
                aud_config = IBX_AUD_CONFIG_A;
                aud_cntl_st = IBX_AUD_CNTL_ST_A;
                aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
+       } else if (IS_HASWELL(dev)) {
+               hdmiw_hdmiedid = HSW_AUD_EDID_DATA(pipe);
+               aud_cntl_st = HSW_AUD_DIP_ELD_CTRL(pipe);
+               aud_config = HSW_AUD_CFG(pipe);
+               aud_cntrl_st2 = HSW_AUD_PIN_ELD_CP_VLD;
        } else {
                hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID_A;
                aud_config = CPT_AUD_CONFIG_A;
@@ -5092,6 +5099,34 @@ static void ironlake_write_eld(struct drm_connector 
*connector,
                aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;
        }
 
+       if (IS_HASWELL(dev)) {
+               int tmp;
+               int aud_vld = HSW_AUD_PIN_ELD_CP_VLD;
+
+               DRM_DEBUG_DRIVER("HDMI: Haswell Audio initialize....\n");
+
+               /* Audio output enable */
+               DRM_DEBUG_DRIVER("HDMI audio: enable codec\n");
+               tmp = I915_READ(aud_vld);
+               tmp |= (AUDIO_OUTPUT_ENABLE_A | AUDIO_OUTPUT_ENABLE_B | 
AUDIO_OUTPUT_ENABLE_C);
+               I915_WRITE(aud_vld, tmp);
+
+               /* Set ELD valid state */
+               tmp = I915_READ(aud_vld);
+               DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%8x\n", tmp);
+               tmp |= (AUDIO_ELD_VALID_A | AUDIO_ELD_VALID_B | 
AUDIO_ELD_VALID_C);
+               I915_WRITE(aud_vld, tmp);
+               tmp = I915_READ(aud_vld);
+               DRM_DEBUG_DRIVER("HDMI audio: eld vld status=0x%8x\n", tmp);
+
+               /* Enable HDMI mode */
+               tmp = I915_READ(aud_config);
+               DRM_DEBUG_DRIVER("HDMI audio: audio conf: 0x%8x\n", tmp);
+               /* clear N_programing_enable and N_value_index */
+               tmp &= ~(AUD_CONFIG_N_VALUE_INDEX | AUD_CONFIG_N_PROG_ENABLE);
+               I915_WRITE(aud_config, tmp);
+       }
+
        i = to_intel_crtc(crtc)->pipe;
        hdmiw_hdmiedid += i * 0x100;
        aud_cntl_st += i * 0x100;
@@ -5135,6 +5170,8 @@ static void ironlake_write_eld(struct drm_connector 
*connector,
        i = I915_READ(aud_cntl_st);
        i &= ~IBX_ELD_ADDRESS;
        I915_WRITE(aud_cntl_st, i);
+       i = (i >> 29) & 0x3;            /* DIP_Port_Select, 0x1 = PortB */
+       DRM_DEBUG_DRIVER("port num:%d\n", i);
 
        len = min_t(uint8_t, eld[2], 21);       /* 84 bytes of hw ELD buffer */
        DRM_DEBUG_DRIVER("ELD size %d\n", len);
-- 
1.7.9.5

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