Initializing DRRS work to program lower refresh rate.

Signed-off-by: Vandana Kannan <vandana.kan...@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 36 ++++++++++++++++++++++++++++--------
 1 file changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index be9d90d..1ceec86 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4868,19 +4868,37 @@ static void intel_dp_set_drrs_state(struct drm_device 
*dev, int refresh_rate)
                I915_WRITE(reg, val);
        }
 
+       dev_priv->drrs.refresh_rate_type = index;
+
+       DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);
+}
+
+static void intel_edp_drrs_work(struct work_struct *work)
+{
+       struct drm_i915_private *dev_priv =
+               container_of(work, typeof(*dev_priv), drrs.work.work);
+       struct intel_dp *intel_dp = dev_priv->drrs.dp;
+
+       mutex_lock(&dev_priv->drrs.mutex);
+
+       if (!intel_dp)
+               goto unlock;
+
        /*
-        * mutex taken to ensure that there is no race between differnt
-        * drrs calls trying to update refresh rate. This scenario may occur
-        * in future when idleness detection based DRRS in kernel and
-        * possible calls from user space to set differnt RR are made.
+        * The delayed work can race with an invalidate hence we need to
+        * recheck. Since psr_flush first clears this and then reschedules we
+        * won't ever miss a flush when bailing out here.
         */
-       mutex_lock(&dev_priv->drrs.mutex);
+       if (dev_priv->drrs.busy_frontbuffer_bits)
+               goto unlock;
 
-       dev_priv->drrs.refresh_rate_type = index;
+       if (dev_priv->drrs.refresh_rate_type != DRRS_LOW_RR)
+               intel_dp_set_drrs_state(dev_priv->dev,
+                       intel_dp->attached_connector->panel.
+                       downclock_mode->vrefresh);
 
+unlock:
        mutex_unlock(&dev_priv->drrs.mutex);
-
-       DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);
 }
 
 static struct drm_display_mode *
@@ -4910,6 +4928,8 @@ intel_dp_drrs_init(struct intel_connector 
*intel_connector,
                return NULL;
        }
 
+       INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_edp_drrs_work);
+
        mutex_init(&dev_priv->drrs.mutex);
 
        dev_priv->drrs.type = dev_priv->vbt.drrs_type;
-- 
2.0.1

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