Configure TE interrupt as part of the vblank
enable call flow.

v2: Hide the private flags check inside configure_te (Jani)

v3: Fix the position of masking de_port_masked for DSI_TE.

v4: Simplify the caller of configure_te (Jani)

v5: Clear IIR, remove the usage of private_flags

v6: including icl_dsi header is not needed

Signed-off-by: Vandita Kulkarni <vandita.kulka...@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 50 +++++++++++++++++++++++++++++++--
 1 file changed, 48 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2631,12 +2631,47 @@ int ilk_enable_vblank(struct drm_crtc *crtc)
        return 0;
 }
 
+static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
+                                  bool enable)
+{
+       struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+       enum port port;
+       u32 tmp;
+
+       if (!(intel_crtc->mode_flags &
+           (I915_MODE_FLAG_DSI_USE_TE1 | I915_MODE_FLAG_DSI_USE_TE0)))
+               return false;
+
+       /* for dual link cases we consider TE from slave */
+       if (intel_crtc->mode_flags & I915_MODE_FLAG_DSI_USE_TE1)
+               port = PORT_B;
+       else
+               port = PORT_A;
+
+       tmp =  I915_READ(DSI_INTR_MASK_REG(port));
+       if (enable)
+               tmp &= ~DSI_TE_EVENT;
+       else
+               tmp |= DSI_TE_EVENT;
+
+       I915_WRITE(DSI_INTR_MASK_REG(port), tmp);
+
+       tmp = I915_READ(DSI_INTR_IDENT_REG(port));
+       I915_WRITE(DSI_INTR_IDENT_REG(port), tmp);
+
+       return true;
+}
+
 int bdw_enable_vblank(struct drm_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
-       enum pipe pipe = to_intel_crtc(crtc)->pipe;
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       enum pipe pipe = intel_crtc->pipe;
        unsigned long irqflags;
 
+       if (gen11_dsi_configure_te(intel_crtc, true))
+               return 0;
+
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
        bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -2702,9 +2737,13 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
 void bdw_disable_vblank(struct drm_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
-       enum pipe pipe = to_intel_crtc(crtc)->pipe;
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       enum pipe pipe = intel_crtc->pipe;
        unsigned long irqflags;
 
+       if (gen11_dsi_configure_te(intel_crtc, false))
+               return;
+
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
        bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -3400,6 +3439,13 @@ static void gen8_de_irq_postinstall(struct 
drm_i915_private *dev_priv)
        if (IS_GEN9_LP(dev_priv))
                de_port_masked |= BXT_DE_PORT_GMBUS;
 
+       if (INTEL_GEN(dev_priv) >= 11) {
+               enum port port;
+
+               if (intel_bios_is_dsi_present(dev_priv, &port))
+                       de_port_masked |= DSI0_TE | DSI1_TE;
+       }
+
        de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
                                           GEN8_PIPE_FIFO_UNDERRUN;
 
-- 
2.21.0.5.gaeb582a

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