Disable DPLS Gating around Panel Power on Sequence. WA:16023567976 Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com>
Suraj Kandpal (2): drm/i915: Add SCLKGATE_DIS register definition drm/i915/pps: Disable DPLS_GATING around pps sequence drivers/gpu/drm/i915/display/intel_pps.c | 12 ++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 4 ++++ 2 files changed, 16 insertions(+) -- 2.43.2
