[PATCH 008/123] drm/i915: pass dev_priv explicitly to PIPE_CRC_RES_4_IVB

[Jani Nikula]

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_CRC_RES_4_IVB register macro.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +-
 drivers/gpu/drm/i915/i915_reg.h                  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c 
b/drivers/gpu/drm/i915/display/intel_display_irq.c
index a17c258bb219..919ff34a7bb1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -367,7 +367,7 @@ static void ivb_pipe_crc_irq_handler(struct 
drm_i915_private *dev_priv,
                                     intel_uncore_read(&dev_priv->uncore, 
PIPE_CRC_RES_1_IVB(dev_priv, pipe)),
                                     intel_uncore_read(&dev_priv->uncore, 
PIPE_CRC_RES_2_IVB(dev_priv, pipe)),
                                     intel_uncore_read(&dev_priv->uncore, 
PIPE_CRC_RES_3_IVB(dev_priv, pipe)),
-                                    intel_uncore_read(&dev_priv->uncore, 
PIPE_CRC_RES_4_IVB(pipe)),
+                                    intel_uncore_read(&dev_priv->uncore, 
PIPE_CRC_RES_4_IVB(dev_priv, pipe)),
                                     intel_uncore_read(&dev_priv->uncore, 
PIPE_CRC_RES_5_IVB(pipe)));
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 248312e6e06e..2544d2f0220c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1653,7 +1653,7 @@
 #define PIPE_CRC_RES_1_IVB(dev_priv, pipe)     _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_1_A_IVB)
 #define PIPE_CRC_RES_2_IVB(dev_priv, pipe)     _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_2_A_IVB)
 #define PIPE_CRC_RES_3_IVB(dev_priv, pipe)     _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_3_A_IVB)
-#define PIPE_CRC_RES_4_IVB(pipe)       _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_4_A_IVB)
+#define PIPE_CRC_RES_4_IVB(dev_priv, pipe)     _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_4_A_IVB)
 #define PIPE_CRC_RES_5_IVB(pipe)       _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_5_A_IVB)
 
 #define PIPE_CRC_RES_RED(pipe)         _MMIO_TRANS2(dev_priv, pipe, 
_PIPE_CRC_RES_RED_A)
-- 
2.39.2