On Tue, 2024-03-12 at 18:44 +0200, Ville Syrjälä wrote:
> On Fri, Mar 08, 2024 at 01:00:39PM +0200, Jouni Högander wrote:
> > Increasing number of fast wake sync pulses seem to fix problems
> > with
> > certain PSR panels. This should be ok for other panels as well as
> > the eDP
> > specification
On Fri, Mar 08, 2024 at 01:00:39PM +0200, Jouni Högander wrote:
> Increasing number of fast wake sync pulses seem to fix problems with
> certain PSR panels. This should be ok for other panels as well as the eDP
> specification allows 10...16 precharge pulses and we are still within that
> range.
>
Increasing number of fast wake sync pulses seem to fix problems with
certain PSR panels. This should be ok for other panels as well as the eDP
specification allows 10...16 precharge pulses and we are still within that
range.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9739
Signed-off
