Chris Wilson writes:
> The physical object is treated as permanently pinned. If we fail to take
> this initial pin during i915_gem_object_attach_phys() we need to revert
> it back to an ordinary shmemfs object before reporting the failure.
>
> v2: git-add
>
> Reported-by: Mika Kuoppala
> Signed-
On Wed, Feb 15, 2017 at 10:21:08PM +0100, Takashi Iwai wrote:
> On Wed, 15 Feb 2017 20:15:50 +0100,
> ville.syrj...@linux.intel.com wrote:
> >
> > From: Ville Syrjälä
> >
> > Simply doing 'xset dpms force off' while playback is active seems
> > sufficient to anger lockdep [1]. And it's of course
This function becomes a lot simpler when having passed both the old and
new state to it. Looking at all callers, it seems that old_plane_state
is never NULL so the check can be dropped.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_atomic_helper.c | 7 ---
drivers/gpu/drm/drm_pla
There are new iterator macros that annotate whether the new or old
state should be used. This is better than using a state that depends on
whether it's called before or after swap. For clarity, also rename the
variables from $obj_state to (old,new)_$obj_state as well.
Signed-off-by: Maarten Lankho
On Tue, 14 Feb 2017, Madhav Chauhan wrote:
> From: Deepak M
>
> For GEMINILAKE, dphy param reg values are programmed in terms
> of HS byte clock count while for older platforms in terms of
> HS ddr clk count.
>
> v2: Added comments to clarify ddr clock count calculation
> v3: Use multiplier varia
After atomic commit, these macros should be used in place of
get_existing_state. Also after commit get_xx_state should no longer
be used because it may not have the required locks.
The calls to drm_atomic_get_existing_$obj_state should no longer be
used, and converted over to these new calls.
Cha
There are new iterator macros that annotate whether the new or old
state should be used. This is better than using a state that depends on
whether it's called before or after swap. For clarity, also rename the
variables from $obj_state to (old,new)_$obj_state as well.
Changes since v1:
- Use old/n
Fifth iteration. Instead of trying to convert all drivers straight away,
implement all macros that are required to get state working.
Old situation:
Use obj->state, which can refer to old or new state.
Use drm_atomic_get_(existing_)obj_state, which can refer to new or old state.
Use for_each_obj_i
This is a straightforward conversion that converts all the users of
get_existing_state in atomic core to use get_old_state or get_new_state
Changes since v1:
- Fix using the wrong state in drm_atomic_helper_update_legacy_modeset_state.
Changes since v2:
- Use the correct state in disable_outputs()
On Tue, 14 Feb 2017, Madhav Chauhan wrote:
> From: Deepak M
>
> Program the clk lane and tlpx time count registers
> to configure DSI PHY.
>
> v2: Addressed Jani's Review comments(renamed bit field macros)
> v3: Program clk lane timing reg same as dphy param reg.
> v4: Removed "line over 80 chara
On Thu, Feb 16, 2017 at 11:31:01AM +0200, Ander Conselvan De Oliveira wrote:
> On Wed, 2017-02-15 at 13:59 +0200, Imre Deak wrote:
> > So far the sync_hw hook wasn't called for power wells not belonging to
> > any power domain, that is the GEN9 PW1 and MISC_IO power wells. This
> > wasn't a problem
== Series Details ==
Series: drm: handle override/firmware edid at the lowest level
URL : https://patchwork.freedesktop.org/series/19764/
State : failure
== Summary ==
Series 19764v1 drm: handle override/firmware edid at the lowest level
https://patchwork.freedesktop.org/api/1.0/series/19764/r
On Tue, 14 Feb 2017, Madhav Chauhan wrote:
> From: Deepak M
>
> v2: Addressed Jani's Review comments(renamed bit field macros)
> v3: Jani's Review comment for aligning code to platforms and added
> wrapper functions.
> v4: Corrected enable/disable seuqence as per BSPEC
>
> Signed-off-by: Deepak M
On Tue, 14 Feb 2017, Madhav Chauhan wrote:
> From: Deepak M
>
> PLL divider range for GLK is different than that of
> BXT, hence adding the GLK range check in this patch.
>
> v2: Code restructure using min and max ratio variables (Ander)
>
> Signed-off-by: Deepak M
> Signed-off-by: Madhav Chauha
On Thu, Feb 16, 2017 at 11:43:06AM +0200, Ander Conselvan De Oliveira wrote:
> On Wed, 2017-02-15 at 13:59 +0200, Imre Deak wrote:
> > Atm, in the power well sync_hw hook we are clearing all BIOS request
> > bits, not just the one corresponding to the given power well. This could
> > turn off an un
On Tue, 14 Feb 2017, Madhav Chauhan wrote:
> From: Deepak M
>
> Register MIPI_CLOCK_CTRL is applicable only
> for BXT platform. Future platform have other
> registers to program the escape clock dividers.
>
> Signed-off-by: Deepak M
> Signed-off-by: Madhav Chauhan
Reviewed-by: Jani Nikula
>
On Tue, 14 Feb 2017, Madhav Chauhan wrote:
> From: Deepak M
>
> Dual link Z-inversion overlap field is present
> in MIPI_CTRL register unlike the older platforms,
> hence setting the same in this patch.
>
> Signed-off-by: Deepak M
> Signed-off-by: Madhav Chauhan
Pushed this one patch to dinq.
On Wed, 15 Feb 2017, Bob Paauwe wrote:
> On Wed, 8 Feb 2017 16:20:54 +0530
> Vidya Srinivas wrote:
>
>> From: Uma Shankar
>>
>> Fix the Sequence to program BXT DSI Latch and ULPS.
>>
>> Signed-off-by: Uma Shankar
>> Signed-off-by: Vidya Srinivas
>
> Reviewed-by: Bob Paauwe
Pushed this one
On Wed, 15 Feb 2017, Bob Paauwe wrote:
> On Wed, 8 Feb 2017 16:20:56 +0530
> Vidya Srinivas wrote:
>
>> From: Uma Shankar
>>
>> Disable device ready before MIPI port shutdown command.
>> This helps to avoid mipi split screen issues.
>>
>> Signed-off-by: Uma Shankar
>> Signed-off-by: Vidya Sri
On Tue, 14 Feb 2017, Patchwork wrote:
> drivers/gpu/drm/i915/intel_dsi_pll.c: In function ‘intel_compute_dsi_pll’:
> drivers/gpu/drm/i915/intel_dsi_pll.c:513:45: error: ‘dsi_ratio_max’ may be
> used uninitialized in this function [-Werror=maybe-uninitialized]
> if (dsi_ratio < dsi_ratio_min ||
On Wed, 15 Feb 2017, Bob Paauwe wrote:
> On Wed, 8 Feb 2017 16:20:57 +0530
> Vidya Srinivas wrote:
>
>> From: Uma Shankar
>>
>> Enable support for BXT DSI dual link mode.
>>
>> Signed-off-by: Uma Shankar
>> Signed-off-by: Vidya Srinivas
>
> Reviewed-by: Bob Paauwe
This doesn't apply becaus
On Tue, Feb 14, 2017 at 11:00 AM, Ville Syrjälä
wrote:
> On Tue, Feb 14, 2017 at 10:48:10AM -0800, Palmer Dabbelt wrote:
>> On Tue, 14 Feb 2017 07:01:54 PST (-0800), ville.syrj...@linux.intel.com
>> wrote:
>> > On Fri, Feb 10, 2017 at 02:44:20PM -0800, Palmer Dabbelt wrote:
>> >> DisplayPort no l
On Wed, Feb 15, 2017 at 06:58:13PM -0800, Palmer Dabbelt wrote:
> On Tue, Feb 14, 2017 at 11:00 AM, Ville Syrjälä
> wrote:
> > On Tue, Feb 14, 2017 at 10:48:10AM -0800, Palmer Dabbelt wrote:
> >> On Tue, 14 Feb 2017 07:01:54 PST (-0800), ville.syrj...@linux.intel.com
> >> wrote:
> >> > On Fri, Fe
From: Ville Syrjälä
Apparently some DP sinks are a little nuts and cause HPD to drop
intermittently during modesets. This happens eg. on an ASUS PB287Q.
In oder to recover from this we can't really use the previous
connector status to determine if the link needs retraining, so let's
just ignore t
== Series Details ==
Series: drm/i915: Unwind conversion to i915_gem_phys_ops on failure (rev2)
URL : https://patchwork.freedesktop.org/series/19708/
State : failure
== Summary ==
Series 19708v2 drm/i915: Unwind conversion to i915_gem_phys_ops on failure
https://patchwork.freedesktop.org/api/1
If the waiter was currently running, assume it hasn't had a chance
to process the pending interupt (e.g, low priority task on a loaded
system) and wait until it sleeps before declaring a missed interrupt.
References: https://bugs.freedesktop.org/show_bug.cgi?id=99816
Signed-off-by: Chris Wilson
C
On Thu, 16 Feb 2017, Madhav Chauhan wrote:
> As per BSPEC, valid cdclk values for glk are 79.2, 158.4, 316.8 Mhz.
> Practically we can achive only 99% of these cdclk values(HW team
> checking on this). So cdclk should be calculated for the given pixclk as
> per that otherwise it may lead to screen
On Thu, Feb 16, 2017 at 12:36:43PM +0200, Jani Nikula wrote:
> Make the function useful for resetting, not just setting, the ELD.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_edid.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gp
On Thu, 16 Feb 2017 07:30:07 PST (-0800), ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Apparently some DP sinks are a little nuts and cause HPD to drop
> intermittently during modesets. This happens eg. on an ASUS PB287Q.
> In oder to recover from this we can't really use the p
On Thu, Feb 16, 2017 at 12:36:45PM +0200, Jani Nikula wrote:
> Handle debugfs override edid and firmware edid at the low level to
> transparently and completely replace the real edid. Previously, we
> practically only used the modes from the override EDID, and none of the
> other data. This also pr
On Thu, Feb 16, 2017 at 07:39:29AM -0800, Palmer Dabbelt wrote:
> On Thu, 16 Feb 2017 07:30:07 PST (-0800), ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Apparently some DP sinks are a little nuts and cause HPD to drop
> > intermittently during modesets. This happens eg. on
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, February 16, 2017 8:49 PM
> To: Patchwork ; Chauhan, Madhav
>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for GLK MIPI DSI VIDEO MODE
> PATCHES (rev5)
>
On 15/02/17 23:44, Chris Wilson wrote:
On Wed, Feb 15, 2017 at 06:28:59PM -0800, Daniele Ceraolo Spurio wrote:
On 14/02/17 05:53, Joonas Lahtinen wrote:
-static void guc_disable_doorbell(struct intel_guc *guc,
-struct i915_guc_client *client)
+static int __dest
Take forcewake for the entire duration of reprogramming the RPS
thresholds. By itself it should not achieve much as instead of going
into the FIFO, we force the device to wake for the reprograming, but it
should help in regards to the next patch that introduces a read.
Signed-off-by: Chris Wilson
During initialisation, we set different flags for different
architectures - these should be preserved when we reload the RPS
thresholds. If we use a mmio read, it will first ensure that the
threshold registers are written before we apply the latch in RP_CONTROL.
Signed-off-by: Chris Wilson
Cc: Mi
Take forcewake for the entire duration of reprogramming the RPS
thresholds. By itself it should not achieve much as instead of going
into the FIFO, we force the device to wake for the reprograming, but it
should help in regards to the next patch that introduces a read.
Signed-off-by: Chris Wilson
== Series Details ==
Series: Moving the common engine/ring code to intel_engine_cs.c (rev2)
URL : https://patchwork.freedesktop.org/series/19706/
State : success
== Summary ==
Series 19706v2 Moving the common engine/ring code to intel_engine_cs.c
https://patchwork.freedesktop.org/api/1.0/serie
On Thu, Feb 16, 2017 at 11:01:29AM +0100, Hans de Goede wrote:
> Hi,
>
> On 15-02-17 15:59, Ville Syrjälä wrote:
> > On Wed, Feb 15, 2017 at 03:54:17PM +0100, Hans de Goede wrote:
> >> Hi Jani,
> >>
> >> As discussed here:
> >>
> >> https://bugs.freedesktop.org/show_bug.cgi?id=94894
> >>
> >> I've
On Thu, Feb 16, 2017 at 05:30:07PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Apparently some DP sinks are a little nuts and cause HPD to drop
> intermittently during modesets. This happens eg. on an ASUS PB287Q.
> In oder to recover from this we can't really use the pr
On Thu, Feb 16, 2017 at 09:07:53AM -0800, Manasi Navare wrote:
> On Thu, Feb 16, 2017 at 05:30:07PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Apparently some DP sinks are a little nuts and cause HPD to drop
> > intermittently during modesets. This happens eg. on
== Series Details ==
Series: drm/i915: Squelch any ktime/jiffie rounding errors for wait-ioctl
URL : https://patchwork.freedesktop.org/series/19780/
State : success
== Summary ==
Series 19780v1 drm/i915: Squelch any ktime/jiffie rounding errors for wait-ioctl
https://patchwork.freedesktop.org/
On Thu, Feb 16, 2017 at 07:18:57PM +0200, Ville Syrjälä wrote:
> On Thu, Feb 16, 2017 at 09:07:53AM -0800, Manasi Navare wrote:
> > On Thu, Feb 16, 2017 at 05:30:07PM +0200, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > Apparently some DP sinks are a little nuts
On Thu, Feb 16, 2017 at 09:24:09AM -0800, Manasi Navare wrote:
> On Thu, Feb 16, 2017 at 07:18:57PM +0200, Ville Syrjälä wrote:
> > On Thu, Feb 16, 2017 at 09:07:53AM -0800, Manasi Navare wrote:
> > > On Thu, Feb 16, 2017 at 05:30:07PM +0200, ville.syrj...@linux.intel.com
> > > wrote:
> > > > From
On Thu, Dec 15, 2016 at 03:58:44PM +0100, Maarten Lankhorst wrote:
> Op 12-12-16 om 21:35 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > Track the plane fifo sizes under intel_crtc instead of under each
> > intel_plane. Avoids looping over the planes in a bunch of places,
>
On Thu, 16 Feb 2017, Ville Syrjälä wrote:
> On Thu, Feb 16, 2017 at 12:36:45PM +0200, Jani Nikula wrote:
>> Handle debugfs override edid and firmware edid at the low level to
>> transparently and completely replace the real edid. Previously, we
>> practically only used the modes from the override
On Thu, Dec 15, 2016 at 04:37:53PM +0100, Maarten Lankhorst wrote:
> Op 12-12-16 om 21:35 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > Check whether anything relevant has actually change when we compute new
> > watermarks for each plane in the state. If the watermarks for
On Thu, 16 Feb 2017 15:46:16 +0100,
Ville Syrjälä wrote:
>
> On Wed, Feb 15, 2017 at 10:21:08PM +0100, Takashi Iwai wrote:
> > On Wed, 15 Feb 2017 20:15:50 +0100,
> > ville.syrj...@linux.intel.com wrote:
> > >
> > > From: Ville Syrjälä
> > >
> > > Simply doing 'xset dpms force off' while playba
Hi Chris,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.10-rc8 next-20170216]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Defer
From: Ville Syrjälä
A rebased version of the two stage watermark support for VLV/CHV. Mostly
just cosmetic changes due to churn. I did clear out that unused
intel_plane_wm_parameters structure Maarten pointed out.
The sticking point in the last series was the active_planes bitmask, but
I've deci
From: Ville Syrjälä
Let's compute the watermarks first and the FIFO size second. This way we
can make sure the FIFO split is the most accommodating to the watermarks.
Previously we could have potentially computed a FIFO split that couldn't
accommodate the PM2 watermarks simply due to a bad split
From: Ville Syrjälä
In an effort to make the vlv/chv wm code look and behave more like the
ilk+ code, let's move the current active wms next to the
corresponding ilk wms.
Signed-off-by: Ville Syrjälä
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_drv.h | 3 +--
drivers/gpu/drm
From: Ville Syrjälä
Since the watermark registers arent double buffered on VLV/CHV, we'll
need to play around with intermediate watermarks same was as we do on
ILK-BDW.
The watermark registers on VLV/CHV contain inverted values, so to find
the intermediate watermark value we just take the minimu
From: Ville Syrjälä
In a lot of place we wish to know which planes on the crtc are actually
visible, or how many of them there are. Let's start tracking that in a
bitmask in the crtc state.
We already track enabled planes (ie. ones with an fb and crtc specified by
the user) but that's not quite
From: Ville Syrjälä
Move the vlv/chv FIFO size tracking into the crtc_state. As with the wms
for now this just acts as temporary storage.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_drv.h | 11 +--
drivers/gpu/drm/i915/intel_pm.c | 26 +++---
2 file
From: Ville Syrjälä
Remove crtc->wm.cxsr_allowed and just rely on crtc_state->disable_cxsr
instead. This was used only by vlv/chv to indicate whether to enable
cxsr in the wm computation. That doesn't really work anymore, and as far
as the optimal watermarks go we'll just consider the number of p
From: Ville Syrjälä
Track the plane fifo sizes under intel_crtc instead of under each
intel_plane. Avoids looping over the planes in a bunch of places,
and later we'll move this tracking into the crtc state properly.
v2: Nuke intel_plane_wm_parameters (Maarten)
Signed-off-by: Ville Syrjälä
Rev
From: Ville Syrjälä
Clear out the watermark for all disabled planes to 0. This is required
to avoid falsely thinking that the inherited watermarks are bogus in
case the watermark is actually higher than the FIFO size.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 17 +
From: Ville Syrjälä
Now that vlv/chv have more proper wm programming support, let's reduce
the the update_wm_{pre,post} flags to only cover the pre-ilk platforms.
When we finally convert those as well we can drop these flags entirely.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel
From: Ville Syrjälä
Check whether anything relevant has actually change when we compute new
watermarks for each plane in the state. If the watermarks for no
primary/sprite planes changed we don't have to recompute the FIFO split
or reprogram the DSBARB registers. And even the cursor watermarks di
From: Ville Syrjälä
Add tracepoints for display FIFO underruns. Makes it more convenient to
correlate the underruns with other display tracepoints.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 43 ++
drivers/gpu/drm/i915/intel_fifo_u
From: Ville Syrjälä
On VLV/CHV enabling sprite0 when sprite1 has already been enabled may
lead to an underrun. This only happens when sprite0 FIFO size is zero
prior to enabling it. Hence an effective workaround is to always
allocate at least one cacheline for sprite0 when sprite1 is active.
I'v
From: Ville Syrjälä
Add tracepoints for plane programming. The tracepoints will dump
the frame and scanline counters, so this can be used to verify eg. that
the plane gets reprogrammed at the right time with respect to watermark
programming (if we have appropriate tracepoints for that as well).
From: Ville Syrjälä
Add a tracepoint for observing changes in the cxsr state. The tracepoint
will dump out the frame and scanline counters for each pipe so that the
information can be compared with eg. plane update tracepoints.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h
From: Ville Syrjälä
We now compute the watermarks correctly, so just return an error if we
can't support the configuration.
Signed-off-by: Ville Syrjälä
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i9
From: Ville Syrjälä
Add tracepoints for observing the WM/FIFO programming on VLV/CHV. When
compared with the plane and pipe update tracepoints this can be used
to verify that everything is performed in the right sequence.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 71
From: Ville Syrjälä
Start computing the vlv/chv watermarks the atomic way, from the
.compute_pipe_wm() hook. We'll recompute the actual watermarks
for only planes that are part of the state, the other planes will
keep their watermark from the last time it was computed.
And the actual watermark p
From: Ville Syrjälä
Relocate the vlv/chv wm state to live under intel_crtc_state. Note
that for now this just behaves as a temporary storage. But it'll be
easier to conver the thing over to properly pre-computing the state
when it's already in the right place.
Signed-off-by: Ville Syrjälä
Revie
On Thu, 16 Feb 2017, "Chauhan, Madhav" wrote:
>> -Original Message-
>> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>> Sent: Thursday, February 16, 2017 8:49 PM
>> To: Patchwork ; Chauhan, Madhav
>>
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT:
On Thu, Feb 16, 2017 at 07:54:00PM +0200, Jani Nikula wrote:
> On Thu, 16 Feb 2017, Ville Syrjälä wrote:
> > On Thu, Feb 16, 2017 at 12:36:45PM +0200, Jani Nikula wrote:
> >> Handle debugfs override edid and firmware edid at the low level to
> >> transparently and completely replace the real edid.
== Series Details ==
Series: Assorted engine tidy (rev3)
URL : https://patchwork.freedesktop.org/series/19774/
State : success
== Summary ==
Series 19774v3 Assorted engine tidy
https://patchwork.freedesktop.org/api/1.0/series/19774/revisions/3/mbox/
fi-bdw-5557u total:252 pass:241 dwarn
On Fri, Feb 10, 2017 at 11:28:02AM +0100, Hans de Goede wrote:
> Listen for PMIC bus access notifications and get FORCEWAKE_ALL while
> the bus is accessed to avoid needing to do any forcewakes, which need
> PMIC bus access, while the PMIC bus is busy:
>
> This fixes errors like these showing up i
On 02/14/2017 05:53 AM, Joonas Lahtinen wrote:
Started adding proper teardown to guc_client_alloc, ended up removing
quite a few dead ends where errors communicating with the GuC were
silently ignored. There also seemed to be quite a few erronous
teardown actions performed in case of an error (
== Series Details ==
Series: series starting with [1/2] drm/i915: Postpone fake breadcrumb interrupt
until real interrupts cease
URL : https://patchwork.freedesktop.org/series/19784/
State : success
== Summary ==
Series 19784v1 Series without cover letter
https://patchwork.freedesktop.org/api
On Thu, 16 Feb 2017, Ville Syrjälä wrote:
> On Thu, Feb 16, 2017 at 07:54:00PM +0200, Jani Nikula wrote:
>> On Thu, 16 Feb 2017, Ville Syrjälä wrote:
>> > On Thu, Feb 16, 2017 at 12:36:45PM +0200, Jani Nikula wrote:
>> >> Handle debugfs override edid and firmware edid at the low level to
>> >> tr
On Thu, 16 Feb 2017, Ville Syrjälä wrote:
> On Fri, Feb 10, 2017 at 11:28:02AM +0100, Hans de Goede wrote:
>> Listen for PMIC bus access notifications and get FORCEWAKE_ALL while
>> the bus is accessed to avoid needing to do any forcewakes, which need
>> PMIC bus access, while the PMIC bus is busy
Applied and tested patch.
Reviewed-by: Robert Foss
On 2017-02-16 09:06 AM, Mika Kahola wrote:
kms_plane_lowres subtest pipe-C-tiling-none crashes when reading out
number of crtc. This patch fixes the bug on crtc readout.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99653
Fixes: 9de6
On Thu, Feb 16, 2017 at 08:59:13PM +0200, Jani Nikula wrote:
> On Thu, 16 Feb 2017, Ville Syrjälä wrote:
> > On Thu, Feb 16, 2017 at 07:54:00PM +0200, Jani Nikula wrote:
> >> On Thu, 16 Feb 2017, Ville Syrjälä wrote:
> >> > On Thu, Feb 16, 2017 at 12:36:45PM +0200, Jani Nikula wrote:
> >> >> Hand
== Series Details ==
Series: drm/atomic: Add accessor macros for all atomic state. (rev5)
URL : https://patchwork.freedesktop.org/series/17745/
State : success
== Summary ==
Series 17745v5 drm/atomic: Add accessor macros for all atomic state.
https://patchwork.freedesktop.org/api/1.0/series/17
I cant be the only one that have added .tags by mistake.
v2: Do not ignore .gitignore
v3: Move !.gitignore at the end, otherwise it'll ignore new .gitignore
files in another directory (Petri)
Cc: Petri Latvala
Cc: Joonas Lahtinen
Signed-off-by: Michel Thierry
---
.gitignore | 6 ++
1 file
== Series Details ==
Series: drm/i915: Fix DisplayPort Hotplug (rev2)
URL : https://patchwork.freedesktop.org/series/19601/
State : success
== Summary ==
Series 19601v2 drm/i915: Fix DisplayPort Hotplug
https://patchwork.freedesktop.org/api/1.0/series/19601/revisions/2/mbox/
fi-bdw-5557u
== Series Details ==
Series: drm/i915: Defer declaration of missed-interrupt until the waiter is
asleep
URL : https://patchwork.freedesktop.org/series/19791/
State : failure
== Summary ==
CC [M] drivers/gpu/drm/i915/gvt/cfg_space.o
CC [M] drivers/gpu/drm/i915/gvt/opregion.o
CC [M] dr
== Series Details ==
Series: series starting with [v2] drm/i915: Take forcewake for setting the RPS
thresholds (rev2)
URL : https://patchwork.freedesktop.org/series/19794/
State : failure
== Summary ==
Series 19794v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series
On Thu, Feb 16, 2017 at 03:42:20PM +0200, Joonas Lahtinen wrote:
> On to, 2017-02-16 at 12:54 +, Chris Wilson wrote:
> > We wait upon jiffies, but report the time elapsed using a
> > high-resolution timer. This discrepancy can lead to us timing out the
> > wait prior to us reporting the elapsed
This matches the description we got for release so,
Reviewed-by: Rodrigo Vivi
On Wed, Feb 15, 2017 at 5:29 PM, Anusha Srivatsa
wrote:
> Correct the comment in intel_huc.c that tells the motivation
> behind having HuC, a dedicated firmware for media.
>
> Cc: Lyncoln Cheng
> Cc: Rodrigo Vivi
> S
On Thu, Feb 16, 2017 at 02:21:55PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2] drm/i915: Remove struct_mutex for
> destroying framebuffers (rev2)
> URL : https://patchwork.freedesktop.org/series/19692/
> State : success
>
> == Summary ==
>
> Series 196
The GuC descriptor is big in size. If we use a local definition of
guc_desc we have a chance to overflow stack, so avoid it.
Also, Chris abhors scatterlists :)
v2: Rebased, helper function to retrieve the context descriptor,
s/ctx_pool_vma/ctx_pool/
Signed-off-by: Oscar Mateo
---
drivers/gpu/d
Onion teardown in a separate patch (since it addresses a separate problem).
On 02/16/2017 06:15 AM, Oscar Mateo wrote:
The GuC descriptor is big in size. If we use a local definition of
guc_desc we have a chance to overflow stack, so avoid it.
Also, Chris abhors scatterlists :)
v2: Rebased, h
Starting with intel_guc_loader, down to intel_guc_submission
and finally to intel_guc_log.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_guc_submission.c | 94 +
drivers/gpu/drm/i915/intel_guc_loader.c| 19 +-
drivers/gpu/drm/i915/intel_guc_log.c | 309
This goes on top of "Keep the ctx_pool_vaddr mapped, for easy access",
which is in turn goes on top of Joonas' "Sanitize GuC client
initialization". If the reviews go well and once Joonas finishes his
patch, I can resend everything as a series so that merging is easier.
-- Oscar
On 02/16/2017
== Series Details ==
Series: drm/i915: VLV/CHV two-stage watermarks (rev2)
URL : https://patchwork.freedesktop.org/series/16712/
State : success
== Summary ==
Series 16712v2 drm/i915: VLV/CHV two-stage watermarks
https://patchwork.freedesktop.org/api/1.0/series/16712/revisions/2/mbox/
fi-bdw-
I guess no one has needed to change the verbosity level of the GuC logs.
Signed-off-by: Oscar Mateo
---
tools/intel_guc_logger.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_guc_logger.c b/tools/intel_guc_logger.c
index 159a54e..c9ea60d 100644
--- a/tools/intel
On Thu, Feb 16, 2017 at 06:15:05AM -0800, Oscar Mateo wrote:
> static void guc_ctx_desc_init(struct intel_guc *guc,
> struct i915_guc_client *client)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
> struct intel_engine_cs *engine;
> struc
Display stream compression is supported on DP 1.4 DP
devices. This patch adds the corersponding DPCD
register definitions for DSC.
v2:
* Rebased on drm-tip
Signed-off-by: Manasi Navare
Cc: Jani Nikula
Cc: Paulo Zanoni
Cc: dri-de...@lists.freedesktop.org
---
include/drm/drm_dp_helper.h | 102 +
== Series Details ==
Series: drm: Add DPCD definitions for DP 1.4 DSC feature (rev3)
URL : https://patchwork.freedesktop.org/series/19666/
State : success
== Summary ==
Series 19666v3 drm: Add DPCD definitions for DP 1.4 DSC feature
https://patchwork.freedesktop.org/api/1.0/series/19666/revisi
Correct the comment in intel_huc.c that tells the motivation
behind having HuC, a dedicated firmware for media.
Cc: Lyncoln Cheng
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a
There is a new version of DMC available for Geminilake.
It's release notes only mention:
- Enhancement in the FW to restore the PG2 state
v2: Fixed the platform name on commit message.
Noticed by Jani S.
v3: cook on top of drm-tip without depending on kbl
one so CI can check.
v4: make v3
== Series Details ==
Series: i915/drm/HuC: Motivation behind having HuC (rev2)
URL : https://patchwork.freedesktop.org/series/19746/
State : success
== Summary ==
Series 19746v2 i915/drm/HuC: Motivation behind having HuC
https://patchwork.freedesktop.org/api/1.0/series/19746/revisions/2/mbox/
On 16 February 2017 at 19:49, Jani Nikula wrote:
>
> Hi Dave, this one superseeds [1]. Better to flush out the single uapi
> fix for v4.11 now so it's not forgotten.
Looks like I had already pulled, I just reverted Maarten's patch on
top of drm-next.
Dave.
___
== Series Details ==
Series: drm/i915: DMC 1.03 for Geminilake (rev5)
URL : https://patchwork.freedesktop.org/series/19081/
State : success
== Summary ==
Series 19081v5 drm/i915: DMC 1.03 for Geminilake
https://patchwork.freedesktop.org/api/1.0/series/19081/revisions/5/mbox/
fi-bdw-5557u
> -Original Message-
> From: Nikula, Jani
> Sent: Thursday, February 16, 2017 8:38 PM
> To: Chauhan, Madhav ; intel-
> g...@lists.freedesktop.org
> Cc: Conselvan De Oliveira, Ander ;
> Shankar, Uma ; Mukherjee, Indranil
> ; Saarinen, Jani ;
> Kamath, Sunil ; Deepak M
> ; Chauhan, Madhav
>
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